scsi/hifc: add hifc driver port manager module

driver inclusion
category: feature
bugzilla: NA

-----------------------------------------------------------------------

This module includes the tool channel for processing tool commands and
management commands for managing nport and hba resources.
Signed-off-by: NChenguangli <chenguangli2@huawei.com>
Reviewed-by: NZengweiliang <zengweiliang.zengweiliang@huawei.com>
Acked-by: NHanjun Guo <guohanjun@huawei.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>

drivers/scsi/huawei/hifc/hifc_dbgtool_knl.h

+/* SPDX-License-Identifier: GPL-2.0 */
+/* Huawei Hifc PCI Express Linux driver
+ * Copyright(c) 2017 Huawei Technologies Co., Ltd
+ *
+ */
+
+#ifndef __DBGTOOL_KNL_H__
+#define __DBGTOOL_KNL_H__
+
+enum dbg_tool_cmd {
+	DBGTOOL_CMD_API_RD = 0,
+	DBGTOOL_CMD_API_WR,
+
+	DBGTOOL_CMD_FFM_RD,
+	DBGTOOL_CMD_FFM_CLR,
+
+	DBGTOOL_CMD_PF_DEV_INFO_GET,
+
+	DBGTOOL_CMD_MSG_2_UP,
+
+	DBGTOOL_CMD_FREE_MEM,
+	DBGTOOL_CMD_NUM
+};
+
+struct api_cmd_rd {
+	u32 pf_id;
+	u8 dest;
+	u8 *cmd;
+	u16 size;
+	void *ack;
+	u16 ack_size;
+};
+
+struct api_cmd_wr {
+	u32 pf_id;
+	u8 dest;
+	u8 *cmd;
+	u16 size;
+};
+
+struct pf_dev_info {
+	u64 bar0_size;
+	u8 bus;
+	u8 slot;
+	u8 func;
+	u64 phy_addr;
+};
+
+/* Interrupt at most records, interrupt will be recorded in the FFM */
+#define FFM_RECORD_NUM_MAX 64
+
+struct ffm_intr_tm_info {
+	u8 node_id;
+	/* error level of the interrupt source */
+	u8 err_level;
+	/* Classification by interrupt source properties */
+	u16 err_type;
+	u32 err_csr_addr;
+	u32 err_csr_value;
+
+	u8 sec;         /* second*/
+	u8 min;         /* minute */
+	u8 hour;        /* hour */
+	u8 mday;        /* day */
+	u8 mon;         /* month */
+	u16 year;       /* year */
+};
+
+struct ffm_record_info {
+	u32 ffm_num;
+	struct ffm_intr_tm_info ffm[FFM_RECORD_NUM_MAX];
+};
+
+struct msg_2_up {
+	u8 pf_id;   /* which pf sends messages to the up */
+	u8 mod;
+	u8 cmd;
+	void *buf_in;
+	u16 in_size;
+	void *buf_out;
+	u16 *out_size;
+};
+
+struct dbgtool_param {
+	union {
+		struct api_cmd_rd api_rd;
+		struct api_cmd_wr api_wr;
+		struct pf_dev_info *dev_info;
+		struct ffm_record_info *ffm_rd;
+		struct msg_2_up msg2up;
+	} param;
+	char chip_name[16];
+};
+
+#ifndef MAX_CARD_NUM
+#define MAX_CARD_NUM 64
+#endif
+#define DBGTOOL_PAGE_ORDER 10
+
+int dbgtool_knl_init(void *vhwdev, void *chip_node);
+void dbgtool_knl_deinit(void *vhwdev, void *chip_node);
+int hifc_mem_mmap(struct file *filp, struct vm_area_struct *vma);
+void chipif_get_all_pf_dev_info(struct pf_dev_info *dev_info, int card_id,
+				void **g_func_handle_array);
+long dbgtool_knl_free_mem(int id);
+
+#endif

drivers/scsi/huawei/hifc/hifc_lld.h

+/* SPDX-License-Identifier: GPL-2.0 */
+/* Huawei Hifc PCI Express Linux driver
+ * Copyright(c) 2017 Huawei Technologies Co., Ltd
+ *
+ */
+
+#ifndef HIFC_LLD_H_
+#define HIFC_LLD_H_
+#include "unf_common.h"
+#define HIFC_PCI_VENDOR_ID   (0x19e5)
+#define HIFC_DRV_NAME        "hifc_sdk"
+#define HIFC_CHIP_NAME       "hifc"
+#define HIFC_DRV_VERSION     UNF_FC_VERSION
+
+struct hifc_lld_dev {
+	struct pci_dev *pdev;
+	void *hwdev;
+};
+
+extern struct list_head g_hinic_chip_list;
+
+/* Structure pcidev private*/
+struct hifc_pcidev {
+	struct pci_dev *pcidev;
+	void *hwdev;
+	struct card_node *chip_node;
+	struct hifc_lld_dev lld_dev;
+	/* Record the service object address,
+	 * such as hifc_dev and toe_dev, fc_dev
+	 */
+	void *uld_dev;
+	/* Record the service object name */
+	char uld_dev_name[IFNAMSIZ];
+	/* It is a the global variable for driver to manage
+	 * all function device linked list
+	 */
+	struct list_head node;
+
+	void __iomem *cfg_reg_base;
+	void __iomem *intr_reg_base;
+	u64 db_base_phy;
+	void __iomem *db_base;
+
+#if defined(__aarch64__)
+	void __iomem *dwqe_mapping;
+#else
+	struct io_mapping *dwqe_mapping;
+#endif
+	/* lock for attach/detach uld */
+	struct mutex pdev_mutex;
+
+	u32 init_state;
+	/* setted when uld driver processing event */
+	unsigned long state;
+	struct pci_device_id id;
+
+	unsigned long flag;
+};
+
+enum {
+	HIFC_FUNC_IN_REMOVE = BIT(0),
+	HIFC_FUNC_PRB_ERR = BIT(1),
+	HIFC_FUNC_PRB_DELAY = BIT(2),
+};
+
+enum hifc_init_state {
+	HIFC_INIT_STATE_NONE,
+	HIFC_INIT_STATE_PCI_INITED,
+	HIFC_INIT_STATE_HW_IF_INITED,
+	HIFC_INIT_STATE_HW_PART_INITED,
+	HIFC_INIT_STATE_HWDEV_INITED,
+	HIFC_INIT_STATE_DBGTOOL_INITED,
+	HIFC_INIT_STATE_ALL_INITED,
+};
+
+void lld_dev_put(void);
+void lld_dev_hold(void);
+
+#endif

drivers/scsi/huawei/hifc/hifc_portmng.h

+/* SPDX-License-Identifier: GPL-2.0 */
+/* Huawei Hifc PCI Express Linux driver
+ * Copyright(c) 2017 Huawei Technologies Co., Ltd
+ *
+ */
+
+#ifndef __HIFC_PORTMNG_H__
+#define __HIFC_PORTMNG_H__
+
+#include "unf_common.h"
+#include "hifc_module.h"
+#include "hifc_hba.h"
+
+#define HIFC_PORT_INFO_SIZE       10
+#define HIFC_DFX_BACK_INFO_SIZE   406
+#define HIFC_DFX_BACK_INFO_SIZE64 203
+#define HIFC_GET_DRIVER_VERSION   16
+#define HIFC_SET_BBSCN_VALUE      0
+#define HIFC_QUERY_BBSCN_VALUE    1
+#define HIFC_QUERY_FEC_MODE       2
+
+#define FC_DFX_SEND_INFO_SIZE      5
+#define FC_DFX_BACK_INFO_64        203
+#define FC_DFX_BACK_INFO_32        406
+#define FC_DFX_MAX_IO_RETURN_VALUE 0x12
+#define FC_DFX_MAX_SCSI_CMD        0xFF
+#define FC_DFX_SCSI_CMD_FIRST_GET  100
+
+struct unf_adm_dfx_session_state {
+	unsigned char session1 : 4;
+	unsigned char session2 : 4;
+};
+
+struct session_counter_s {
+	u64 target_busy;
+	u64 host_busy;
+	u64 remote_port_wwpn;
+	u64 local_port_wwpn;
+	u32 device_alloc;
+	u32 device_destroy;
+	u32 scsi_state;
+	u32 remote_port_nportid;
+	u32 remote_port_state;
+	u32 remote_port_scsiid;
+	u32 remote_port_index;
+	u32 local_port_nportid;
+	u32 local_port_ini_state;
+	u32 local_port_state;
+	u32 port_id;
+	u32 host_id;
+	u32 target_id;
+	u32 abort_io;
+	u32 device_reset;
+	u32 target_reset;
+	u32 bus_reset;
+	u32 virtual_reset;
+	u32 abort_io_result;
+	u32 device_reset_result;
+	u32 target_reset_result;
+	u32 bus_reset_result;
+	u32 virtual_reset_result;
+};
+
+enum hifc_adm_msg_status_e {
+	HIFC_ADM_MSG_DONE = 0,
+	HIFC_ADM_MSG_INCOMPLETE,
+	HIFC_ADM_MSG_FAILED,
+	HIFC_ADM_MSG_BUTT
+};
+
+struct hifc_port_diag_op_s {
+	enum unf_port_diag_op_e op_code;
+	unsigned int (*pfn_hifc_operation)(void *v_hba, void *v_para);
+};
+
+enum hifc_adm_dfx_mod_e {
+	/* HBA WQE and SCQE statistic */
+	HIFC_TX_RX_STATE_COUNTER = 0,
+	/* TX and RX error counter, HBA counter */
+	HIFC_TX_RX_ERROR_STATE_COUNTER,
+	/* SCQ, AEQ, uP, common uP error counter */
+	HIFC_ERROR_STATE_COUNTER,
+	/* Link state counter */
+	HIFC_LINK_STATE_COUNTER,
+	/* Host counter */
+	HIFC_HOST_COUNTER,
+	/* session counter */
+	HIFC_SESSION_COUNTER,
+	/* DIF error counter */
+	HIFC_DIF_ERROR_COUNTER,
+	HIFC_ALL_DFX_TYPE = 50,
+};
+
+enum hifc_msg_format_e {
+	HIFC_DFX = 7,
+	HIFC_FEC_SET,
+	HIFC_BBSCN,
+	HIFC_PORTSTAT = 24,
+	HIFC_ALL_INFO_OP = 25,
+	HIFC_COMPAT_TEST = 0xFF
+};
+
+struct hifc_adm_msg_head_s {
+	unsigned int size;
+	unsigned short status;
+	unsigned short rsvd;
+};
+
+/* port state for fc_portstat */
+struct hifc_adm_port_state {
+	unsigned int port_id;
+	unsigned int rport_num;
+	unsigned int init;
+	unsigned int offloading;
+	unsigned int offloaded;
+	unsigned int destroying;
+};
+
+/* SQ & IoStat for fc_portstat */
+struct hifc_adm_sq {
+	unsigned int sq_id;
+	unsigned int rport_index;
+	unsigned int xid;
+	unsigned int cid;
+	unsigned int sid;
+	unsigned int did;
+	unsigned int vpid;
+	unsigned int cmd_local_queue_id;
+	unsigned int cmd_cqm_queue_id;
+	unsigned int sts_local_queue_id;
+	unsigned int sts_cqm_queue_id;
+	unsigned int cos;
+	unsigned int off_load;
+	unsigned int cmsn;
+	unsigned int pmsn;
+	unsigned int db_cnt;
+	unsigned int sqe_cnt;
+	unsigned int cqe_cnt;
+	unsigned int in_sq_cnt;
+	unsigned int in_chip_cnt;
+};
+
+/* hifcadm fc_portstat struct,that is used to show ListSqinfo from mml */
+struct hifc_adm_lsq_info_s {
+	struct hifc_adm_msg_head_s msg_head;
+	unsigned int cmd[HIFC_PORT_INFO_SIZE];
+	struct hifc_adm_port_state port_state;
+	struct hifc_adm_sq sq;
+	unsigned int mark;
+};
+
+struct unf_adm_dfx_host_counter_s {
+	unsigned int host_num;
+	unsigned int port_id;
+	unsigned int scsi_session_add_success;
+	unsigned int scsi_session_add_failed;
+	unsigned int scsi_session_del_success;
+	unsigned int scsi_session_del_failed;
+	unsigned int device_alloc;
+	unsigned int device_destroy;
+	unsigned int session_loss_tmo;
+	unsigned int alloc_scsi_id;
+	unsigned int reuse_scsi_id;
+	unsigned int resume_scsi_id;
+	unsigned int add_start_work_failed;
+	unsigned int add_closing_work_failed;
+	unsigned int abort_io;
+	unsigned int device_reset;
+	unsigned int target_reset;
+	unsigned int bus_reset;
+	unsigned int virtual_reset;
+	unsigned int abort_io_result;
+	unsigned int device_reset_result;
+	unsigned int target_reset_result;
+	unsigned int bus_reset_result;
+	unsigned int virtual_reset_result;
+	struct unf_adm_dfx_session_state session_state[1024];
+};
+
+/* hifcadm fc_port struct */
+struct hifc_adm_cmd_s {
+	struct hifc_adm_msg_head_s msg_head;
+	unsigned int cmd[HIFC_PORT_INFO_SIZE];
+};
+
+/* hifcadm fc_dfx struct */
+struct hifc_adm_dfx_cmd_s {
+	struct hifc_adm_msg_head_s msg_head;
+	unsigned int cmd[HIFC_PORT_INFO_SIZE];
+	union {
+		unsigned long long result[HIFC_DFX_BACK_INFO_SIZE64];
+		struct unf_adm_dfx_host_counter_s host_cnt;
+		struct session_counter_s session_cnt;
+		unsigned long long scsi_cmd_in;
+		unsigned long long scsi_cmd_done;
+		unsigned long long target_busy;
+		unsigned long long host_busy;
+	} unresult;
+};
+
+unsigned int hifc_port_diagnose(void *v_hba, enum unf_port_diag_op_e op_code,
+				void *v_para);
+unsigned int hifc_set_port_speed(void *v_hba, void *v_para_in);
+unsigned int hifc_set_port_bbscn(void *v_hba, void *v_para_in);
+unsigned int hifc_set_port_state(void *v_hba, void *v_para_in);
+unsigned int hifc_set_port_topo(void *v_hba, void *v_para_in);
+unsigned int hifc_set_port_fcp_conf(void *v_hba, void *v_para_in);
+unsigned int hifc_set_loop_role(void *v_hba, void *v_para_in);
+unsigned int hifc_set_max_support_speed(void *v_hba, void *v_para_in);
+unsigned int hifc_show_fc_port_detail(void *v_hba, void *v_para);
+int hifc_adm(void *uld_dev, unsigned int msg_formate, void *buffin,
+	     unsigned int in_size, void *buff_out, unsigned int *out_size);
+unsigned int hifc_fec_mode(void *v_hba, struct unf_hinicam_pkg *v_input);
+int hifc_set_dfx_mode(void *v_hba, struct unf_hinicam_pkg *v_input);
+int hifc_dfx_get_link_state(void *v_hba, void *v_buff_out);
+int hifc_dfx_get_error_state(void *v_hba, void *v_buff_out);
+int hifc_dfx_get_rxtx_state(void *v_hba, void *v_buff_out);
+unsigned int hifc_bbscn_mode(void *v_hba, struct unf_hinicam_pkg *v_input);
+unsigned int hifc_port_stat(void *v_hba, struct unf_hinicam_pkg *v_input);
+int hifc_dfx_dif_error(void *v_hba, void *v_buff_out, unsigned int v_clear);
+unsigned int hifc_set_hba_base_info(void *v_hba, void *v_para_in);
+
+#endif /* __HIFC_PORTMNG_H__ */

drivers/scsi/huawei/hifc/hifc_tool.c

+// SPDX-License-Identifier: GPL-2.0
+/* Huawei Hifc PCI Express Linux driver
+ * Copyright(c) 2017 Huawei Technologies Co., Ltd
+ *
+ */
+#define pr_fmt(fmt) KBUILD_MODNAME ": [COMM]" fmt
+
+#include <linux/cdev.h>
+#include <linux/device.h>
+#include <linux/netdevice.h>
+#include <linux/interrupt.h>
+#include <linux/pci.h>
+#include <net/sock.h>
+
+#include "hifc_knl_adp.h"
+#include "hifc_hw.h"
+#include "hifc_hwif.h"
+#include "hifc_api_cmd.h"
+#include "hifc_mgmt.h"
+#include "hifc_lld.h"
+#include "hifc_dbgtool_knl.h"
+#include "hifc_tool.h"
+#include "hifc_portmng.h"
+
+#define HIADM_DEV_PATH                 "/dev/hifc_dev"
+#define HIADM_DEV_CLASS                "hifc_class"
+#define HIADM_DEV_NAME                 "hifc_dev"
+
+#define MAJOR_DEV_NUM                  921
+#define	HIFC_CMDQ_BUF_MAX_SIZE         2048U
+#define MSG_MAX_IN_SIZE                (2048 * 1024)
+#define MSG_MAX_OUT_SIZE               (2048 * 1024)
+
+static dev_t g_dev_id = {0};
+static struct class *g_nictool_class;
+static struct cdev g_nictool_cdev;
+
+static int g_nictool_init_flag;
+static int g_nictool_ref_cnt;
+
+static void free_buff_in(void *hwdev, struct msg_module *nt_msg, void *buf_in)
+{
+	if (!buf_in)
+		return;
+
+	if (nt_msg->module == SEND_TO_UCODE)
+		hifc_free_cmd_buf(hwdev, buf_in);
+	else
+		kfree(buf_in);
+}
+
+static int alloc_buff_in(void *hwdev, struct msg_module *nt_msg,
+			 u32 in_size, void **buf_in)
+{
+	void *msg_buf;
+
+	if (!in_size)
+		return 0;
+
+	if (nt_msg->module == SEND_TO_UCODE) {
+		struct hifc_cmd_buf *cmd_buf;
+
+		if (in_size > HIFC_CMDQ_BUF_MAX_SIZE) {
+			pr_err("Cmdq in size(%u) more than 2KB\n", in_size);
+			return -ENOMEM;
+		}
+
+		cmd_buf = hifc_alloc_cmd_buf(hwdev);
+		if (!cmd_buf) {
+			pr_err("Alloc cmdq cmd buffer failed in %s\n",
+			       __func__);
+			return -ENOMEM;
+		}
+		msg_buf = cmd_buf->buf;
+		*buf_in = (void *)cmd_buf;
+		cmd_buf->size = (u16)in_size;
+	} else {
+		if (in_size > MSG_MAX_IN_SIZE) {
+			pr_err("In size(%u) more than 2M\n", in_size);
+			return -ENOMEM;
+		}
+		msg_buf = kzalloc(in_size, GFP_KERNEL);
+		*buf_in = msg_buf;
+	}
+	if (!(*buf_in)) {
+		pr_err("Alloc buffer in failed\n");
+		return -ENOMEM;
+	}
+
+	if (copy_from_user(msg_buf, nt_msg->in_buff, in_size)) {
+		pr_err("%s:%d: Copy from user failed\n",
+		       __func__, __LINE__);
+		free_buff_in(hwdev, nt_msg, *buf_in);
+		return -EFAULT;
+	}
+
+	return 0;
+}
+
+static void free_buff_out(void *hwdev, struct msg_module *nt_msg,
+			  void *buf_out)
+{
+	if (!buf_out)
+		return;
+
+	if (nt_msg->module == SEND_TO_UCODE &&
+	    !nt_msg->ucode_cmd.ucode_db.ucode_imm)
+		hifc_free_cmd_buf(hwdev, buf_out);
+	else
+		kfree(buf_out);
+}
+
+static int alloc_buff_out(void *hwdev, struct msg_module *nt_msg,
+			  u32 out_size, void **buf_out)
+{
+	if (!out_size)
+		return 0;
+
+	if (nt_msg->module == SEND_TO_UCODE &&
+	    !nt_msg->ucode_cmd.ucode_db.ucode_imm) {
+		struct hifc_cmd_buf *cmd_buf;
+
+		if (out_size > HIFC_CMDQ_BUF_MAX_SIZE) {
+			pr_err("Cmdq out size(%u) more than 2KB\n", out_size);
+			return -ENOMEM;
+		}
+
+		cmd_buf = hifc_alloc_cmd_buf(hwdev);
+		*buf_out = (void *)cmd_buf;
+	} else {
+		if (out_size > MSG_MAX_OUT_SIZE) {
+			pr_err("out size(%u) more than 2M\n", out_size);
+			return -ENOMEM;
+		}
+		*buf_out = kzalloc(out_size, GFP_KERNEL);
+	}
+	if (!(*buf_out)) {
+		pr_err("Alloc buffer out failed\n");
+		return -ENOMEM;
+	}
+
+	return 0;
+}
+
+static int copy_buf_out_to_user(struct msg_module *nt_msg,
+				u32 out_size, void *buf_out)
+{
+	int ret = 0;
+	void *msg_out;
+
+	if (nt_msg->module == SEND_TO_UCODE &&
+	    !nt_msg->ucode_cmd.ucode_db.ucode_imm)
+		msg_out = ((struct hifc_cmd_buf *)buf_out)->buf;
+	else
+		msg_out = buf_out;
+
+	if (copy_to_user(nt_msg->out_buf, msg_out, out_size))
+		ret = -EFAULT;
+
+	return ret;
+}
+
+static int __get_card_usr_api_chain_mem(int card_idx)
+{
+#define DBGTOOL_PAGE_ORDER 10
+
+	unsigned char *tmp;
+	int i;
+
+	mutex_lock(&g_addr_lock);
+	card_id = card_idx;
+	if (!g_card_vir_addr[card_idx]) {
+		g_card_vir_addr[card_idx] =
+			(void *)__get_free_pages(GFP_KERNEL,
+						 DBGTOOL_PAGE_ORDER);
+		if (!g_card_vir_addr[card_idx]) {
+			pr_err("Alloc api chain memory fail for card %d.\n",
+			       card_idx);
+			mutex_unlock(&g_addr_lock);
+			return -EFAULT;
+		}
+
+		memset(g_card_vir_addr[card_idx], 0,
+		       PAGE_SIZE * (1 << DBGTOOL_PAGE_ORDER));
+
+		g_card_phy_addr[card_idx] =
+			virt_to_phys(g_card_vir_addr[card_idx]);
+		if (!g_card_phy_addr[card_idx]) {
+			pr_err("phy addr for card %d is 0.\n", card_idx);
+			free_pages((unsigned long)g_card_vir_addr[card_idx],
+				   DBGTOOL_PAGE_ORDER);
+			g_card_vir_addr[card_idx] = NULL;
+			mutex_unlock(&g_addr_lock);
+			return -EFAULT;
+		}
+
+		tmp = g_card_vir_addr[card_idx];
+		for (i = 0; i < (1 << DBGTOOL_PAGE_ORDER); i++) {
+			SetPageReserved(virt_to_page(tmp));
+			tmp += PAGE_SIZE;
+		}
+	}
+	mutex_unlock(&g_addr_lock);
+
+	return 0;
+}
+
+static int get_card_func_info(char *dev_name, struct msg_module *nt_msg)
+{
+	struct hifc_card_func_info card_func_info = {0};
+	int id, err;
+
+	if (nt_msg->len_info.out_buff_len != sizeof(card_func_info) ||
+	    nt_msg->len_info.in_buff_len != sizeof(card_func_info)) {
+		pr_err("Invalid out_buf_size %d or Invalid in_buf_size %d, expect %lu\n",
+		       nt_msg->len_info.out_buff_len,
+		       nt_msg->len_info.in_buff_len,
+		       sizeof(card_func_info));
+		return -EINVAL;
+	}
+
+	err = memcmp(dev_name, HIFC_CHIP_NAME, strlen(HIFC_CHIP_NAME));
+	if (err) {
+		pr_err("Invalid chip name %s\n", dev_name);
+		return err;
+	}
+
+	err = sscanf(dev_name, HIFC_CHIP_NAME "%d", &id);
+	if (err < 0) {
+		pr_err("Failed to get hifc id\n");
+		return err;
+	}
+
+	if (id >= MAX_CARD_NUM) {
+		pr_err("chip id %d exceed limit[0-%d]\n", id, MAX_CARD_NUM - 1);
+		return -EINVAL;
+	}
+
+	hifc_get_card_func_info_by_card_name(dev_name, &card_func_info);
+
+	if (!card_func_info.num_pf) {
+		pr_err("None function found for %s\n", dev_name);
+		return -EFAULT;
+	}
+
+	err = __get_card_usr_api_chain_mem(id);
+	if (err) {
+		pr_err("Faile to get api chain memory for userspace %s\n",
+		       dev_name);
+		return -EFAULT;
+	}
+
+	card_func_info.usr_api_phy_addr = g_card_phy_addr[id];
+
+	/* Copy the dev_info to user mode */
+	if (copy_to_user(nt_msg->out_buf, &card_func_info,
+			 sizeof(card_func_info))) {
+		pr_err("Copy dev_info to user fail\n");
+		return -EFAULT;
+	}
+
+	return 0;
+}
+
+static bool is_mgmt_cmd_support(void *hwdev, unsigned int mod, u32 up_api_type)
+{
+	if (FUNC_SUPPORT_MGMT(hwdev)) {
+		if (up_api_type == API_CLP) {
+			if (!hifc_is_hwdev_mod_inited
+					(hwdev, HIFC_HWDEV_CLP_INITED)) {
+				pr_err("CLP have not initialized\n");
+				return false;
+			}
+		} else if (!hifc_is_hwdev_mod_inited
+					(hwdev, HIFC_HWDEV_MGMT_INITED)) {
+			pr_err("MGMT have not initialized\n");
+			return false;
+		}
+	} else if (!hifc_is_hwdev_mod_inited
+					(hwdev, HIFC_HWDEV_MBOX_INITED)) {
+		pr_err("MBOX have not initialized\n");
+		return false;
+	}
+
+	return true;
+}
+
+static bool is_hwdev_cmd_support(unsigned int mod,
+				 char *ifname, u32 up_api_type)
+{
+	void *hwdev;
+
+	hwdev = hifc_get_hwdev_by_ifname(ifname);
+	if (!hwdev) {
+		pr_err("Can not get the device %s correctly\n", ifname);
+		return false;
+	}
+
+	switch (mod) {
+	case SEND_TO_UP:
+	case SEND_TO_SM:
+		return is_mgmt_cmd_support(hwdev, mod, up_api_type);
+	case SEND_TO_UCODE:
+		if (!hifc_is_hwdev_mod_inited(hwdev,
+					      HIFC_HWDEV_CMDQ_INITED)) {
+			pr_err("CMDQ have not initialized\n");
+			return false;
+		}
+		break;
+
+	default:
+		return false;
+	}
+
+	return true;
+}
+
+static bool nictool_k_is_cmd_support(unsigned int mod,
+				     char *ifname, u32 up_api_type)
+{
+	enum hifc_init_state init_state =
+			hifc_get_init_state_by_ifname(ifname);
+
+	if (init_state == HIFC_INIT_STATE_NONE)
+		return false;
+
+	if (mod == HIFCADM_FC_DRIVER) {
+		if (init_state < HIFC_INIT_STATE_ALL_INITED) {
+			pr_err("HIFC driver have not initialized\n");
+			return false;
+		}
+
+		return true;
+	} else if (mod >= SEND_TO_UCODE && mod <= SEND_TO_SM) {
+		return is_hwdev_cmd_support(mod, ifname, up_api_type);
+	} else if (mod == SEND_TO_HW_DRIVER) {
+		if (init_state < HIFC_INIT_STATE_HWDEV_INITED) {
+			pr_err("Hwdev have not initialized\n");
+			return false;
+		}
+
+		return true;
+	}
+
+	return false;
+}
+
+static int alloc_tmp_buf(void *hwdev, struct msg_module *nt_msg, u32 in_size,
+			 void **buf_in, u32 out_size, void **buf_out)
+{
+	int ret;
+
+	ret = alloc_buff_in(hwdev, nt_msg, in_size, buf_in);
+	if (ret) {
+		pr_err("Alloc tool cmd buff in failed\n");
+		return ret;
+	}
+
+	ret = alloc_buff_out(hwdev, nt_msg, out_size, buf_out);
+	if (ret) {
+		pr_err("Alloc tool cmd buff out failed\n");
+		goto out_free_buf_in;
+	}
+
+	return 0;
+
+out_free_buf_in:
+	free_buff_in(hwdev, nt_msg, *buf_in);
+
+	return ret;
+}
+
+static void free_tmp_buf(void *hwdev, struct msg_module *nt_msg,
+			 void *buf_in, void *buf_out)
+{
+	free_buff_out(hwdev, nt_msg, buf_out);
+	free_buff_in(hwdev, nt_msg, buf_in);
+}
+
+static int get_all_chip_id_cmd(struct msg_module *nt_msg)
+{
+	struct nic_card_id card_id;
+
+	hifc_get_all_chip_id((void *)&card_id);
+
+	if (copy_to_user(nt_msg->out_buf, &card_id, sizeof(card_id))) {
+		pr_err("Copy chip id to user failed\n");
+		return -EFAULT;
+	}
+
+	return 0;
+}
+
+static bool __is_pcidev_match_dev_name(const char *ifname,
+				       struct hifc_pcidev *dev)
+{
+	if (!strncmp(dev->uld_dev_name, ifname, IFNAMSIZ))
+		return true;
+
+	if ((dev->uld_dev) && (strlen(ifname) == 0))
+		return true;
+
+	return false;
+}
+
+struct hifc_pcidev *hifc_get_pcidev_by_dev_name(char *ifname)
+{
+	struct card_node *chip_node;
+	struct hifc_pcidev *dev;
+
+	lld_dev_hold();
+	list_for_each_entry(chip_node, &g_hinic_chip_list, node) {
+		list_for_each_entry(dev, &chip_node->func_list, node) {
+			if (test_bit(HIFC_FUNC_IN_REMOVE, &dev->flag))
+				continue;
+
+			if (__is_pcidev_match_dev_name(ifname, dev)) {
+				lld_dev_put();
+				return dev;
+			}
+		}
+	}
+	lld_dev_put();
+
+	return NULL;
+}
+
+static void *get_support_uld_dev(struct msg_module *nt_msg)
+{
+	struct hifc_pcidev *dev;
+
+	dev = hifc_get_pcidev_by_dev_name(nt_msg->device_name);
+
+	if (dev)
+		return dev->uld_dev;
+
+	return NULL;
+}
+
+static int get_service_drv_version(void *hwdev, struct msg_module *nt_msg,
+				   void *buf_in, u32 in_size, void *buf_out,
+				   u32 *out_size)
+{
+	enum hifc_service_type type;
+	int ret = 0;
+
+	type = nt_msg->module - SEND_TO_SM;
+	if (type != SERVICE_T_FC) {
+		pr_err("err cmd type: %d\n", type);
+		return ret;
+	}
+	*out_size = sizeof(struct drv_version_info);
+
+	ret = hifc_adm(NULL, nt_msg->msg_formate, buf_in, in_size,
+		       buf_out, out_size);
+	if (ret)
+		return ret;
+
+	if (copy_to_user(nt_msg->out_buf, buf_out, *out_size))
+		return -EFAULT;
+
+	return ret;
+}
+
+int send_to_service_driver(struct msg_module *nt_msg, void *buf_in,
+			   u32 in_size, void *buf_out, u32 *out_size)
+{
+	enum hifc_service_type type;
+	void *uld_dev;
+	int ret = -EINVAL;
+
+	type = nt_msg->module - SEND_TO_SM;
+
+	if (type == SERVICE_T_FC) {
+		uld_dev = get_support_uld_dev(nt_msg);
+		if (!uld_dev)
+			return -EINVAL;
+		ret = hifc_adm(uld_dev,
+			       nt_msg->msg_formate,
+			       buf_in, in_size, buf_out,
+			       out_size);
+	} else {
+		pr_err("Ioctl input module id: %d is incorrectly\n",
+		       nt_msg->module);
+	}
+
+	return ret;
+}
+
+static int nictool_exec_cmd(void *hwdev, struct msg_module *nt_msg,
+			    void *buf_in, u32 in_size, void *buf_out,
+			    u32 *out_size)
+{
+	int ret;
+
+	switch (nt_msg->module) {
+	case SEND_TO_HW_DRIVER:
+		ret = send_to_hw_driver(hwdev, nt_msg, buf_in,
+					in_size, buf_out, out_size);
+		break;
+	case SEND_TO_UP:
+		ret = send_to_up(hwdev, nt_msg, buf_in,
+				 in_size, buf_out, out_size);
+		break;
+	case SEND_TO_UCODE:
+		ret = send_to_ucode(hwdev, nt_msg, buf_in,
+				    in_size, buf_out, out_size);
+		break;
+	case SEND_TO_SM:
+		ret = send_to_sm(hwdev, nt_msg, buf_in,
+				 in_size, buf_out, out_size);
+		break;
+	default:
+		ret = send_to_service_driver(nt_msg, buf_in, in_size, buf_out,
+					     out_size);
+		break;
+	}
+
+	return ret;
+}
+
+static bool hifc_is_special_handling_cmd(struct msg_module *nt_msg, int *ret)
+{
+	bool handled = true;
+
+	if (nt_msg->module != SEND_TO_HW_DRIVER)
+		return false;
+
+	switch (nt_msg->msg_formate) {
+	case GET_CHIP_ID:
+		*ret = get_all_chip_id_cmd(nt_msg);
+		break;
+	case GET_CHIP_INFO:
+		*ret = get_card_func_info(nt_msg->device_name, nt_msg);
+		break;
+	default:
+		handled = false;
+		break;
+	}
+
+	return handled;
+}
+
+static int do_nictool_ioctl_cmd(void *hwdev, struct msg_module *nt_msg)
+{
+	void *buf_out = NULL;
+	void *buf_in = NULL;
+	u32 out_size_expect;
+	u32 out_size, in_size;
+	int ret = 0;
+
+	out_size_expect = nt_msg->len_info.out_buff_len;
+	in_size = nt_msg->len_info.in_buff_len;
+
+	ret = alloc_tmp_buf(hwdev, nt_msg, in_size,
+			    &buf_in, out_size_expect, &buf_out);
+	if (ret) {
+		pr_err("Alloc tmp buff failed\n");
+		return ret;
+	}
+
+	out_size = out_size_expect;
+
+	if ((nt_msg->msg_formate == GET_DRV_VERSION) &&
+	    (nt_msg->module == HIFCADM_FC_DRIVER)) {
+		ret = get_service_drv_version(hwdev, nt_msg, buf_in,
+					      in_size, buf_out, &out_size);
+		goto out_free_buf;
+	}
+
+	ret = nictool_exec_cmd(hwdev, nt_msg, buf_in,
+			       in_size, buf_out, &out_size);
+	if (ret) {
+		pr_err("nictool_exec_cmd failed, mod:%d msg_formate:%d\n",
+		       nt_msg->module, nt_msg->msg_formate);
+		goto out_free_buf;
+	}
+
+	if (out_size_expect && buf_out) {
+		ret = copy_buf_out_to_user(nt_msg, out_size_expect, buf_out);
+		if (ret)
+			pr_err("Copy information to user failed\n");
+	}
+out_free_buf:
+	free_tmp_buf(hwdev, nt_msg, buf_in, buf_out);
+
+	return ret;
+}
+
+static long nictool_k_unlocked_ioctl(struct file *pfile,
+				     unsigned int cmd, unsigned long arg)
+{
+	void *hwdev;
+	struct msg_module nt_msg;
+	int ret = 0;
+
+	memset(&nt_msg, 0, sizeof(nt_msg));
+
+	if (copy_from_user(&nt_msg, (void *)arg, sizeof(nt_msg))) {
+		pr_err("Copy information from user failed\n");
+		return -EFAULT;
+	}
+
+	/* end with '\0' */
+	nt_msg.device_name[IFNAMSIZ - 1] = '\0';
+
+	hifc_tool_cnt_inc();
+	if (hifc_is_special_handling_cmd(&nt_msg, &ret))
+		goto out_free_lock;
+
+	if (nt_msg.module == HIFCADM_FC_DRIVER &&
+	    nt_msg.msg_formate == GET_CHIP_ID)
+		get_fc_devname(nt_msg.device_name);
+
+	if (!nictool_k_is_cmd_support(nt_msg.module, nt_msg.device_name,
+				      nt_msg.up_cmd.up_db.up_api_type)) {
+		ret = -EFAULT;
+		goto out_free_lock;
+	}
+
+	/* get the netdevice */
+	hwdev = hifc_get_hwdev_by_ifname(nt_msg.device_name);
+	if (!hwdev) {
+		pr_err("Can not get the device %s correctly\n",
+		       nt_msg.device_name);
+		ret = -ENODEV;
+		goto out_free_lock;
+	}
+
+	ret = do_nictool_ioctl_cmd(hwdev, &nt_msg);
+
+out_free_lock:
+	hifc_tool_cnt_dec();
+
+	return (long)ret;
+}
+
+static int nictool_k_open(struct inode *pnode, struct file *pfile)
+{
+	return 0;
+}
+
+static ssize_t nictool_k_read(struct file *pfile, char __user *ubuf,
+			      size_t size, loff_t *ppos)
+{
+	return 0;
+}
+
+static ssize_t nictool_k_write(struct file *pfile, const char __user *ubuf,
+			       size_t size, loff_t *ppos)
+{
+	return 0;
+}
+
+static const struct file_operations fifo_operations = {
+	.owner = THIS_MODULE,
+	.open = nictool_k_open,
+	.read = nictool_k_read,
+	.write = nictool_k_write,
+	.unlocked_ioctl = nictool_k_unlocked_ioctl,
+	.mmap = hifc_mem_mmap,
+};
+
+int if_nictool_exist(void)
+{
+	struct file *fp = NULL;
+	int exist = 0;
+
+	fp = filp_open(HIADM_DEV_PATH, O_RDONLY, 0);
+	if (IS_ERR(fp)) {
+		exist = 0;
+	} else {
+		(void)filp_close(fp, NULL);
+		exist = 1;
+	}
+
+	return exist;
+}
+
+/**
+ * nictool_k_init - initialize the hw interface
+ */
+int nictool_k_init(void)
+{
+	int ret;
+	struct device *pdevice;
+
+	if (g_nictool_init_flag) {
+		g_nictool_ref_cnt++;
+		/* already initialized */
+		return 0;
+	}
+
+	if (if_nictool_exist()) {
+		pr_err("Nictool device exists\n");
+		return 0;
+	}
+
+	/* Device ID: primary device ID (12bit) |
+	 * secondary device number (20bit)
+	 */
+	g_dev_id = MKDEV(MAJOR_DEV_NUM, 0);
+
+	/* Static device registration number */
+	ret = register_chrdev_region(g_dev_id, 1, HIADM_DEV_NAME);
+	if (ret < 0) {
+		ret = alloc_chrdev_region(&g_dev_id, 0, 1, HIADM_DEV_NAME);
+		if (ret < 0) {
+			pr_err("Register nictool_dev fail(0x%x)\n", ret);
+			return ret;
+		}
+	}
+
+	/* Create equipment */
+	/*lint -save -e160*/
+	g_nictool_class = class_create(THIS_MODULE, HIADM_DEV_CLASS);
+	/*lint -restore*/
+	if (IS_ERR(g_nictool_class)) {
+		pr_err("Create nictool_class fail\n");
+		ret = -EFAULT;
+		goto class_create_err;
+	}
+
+	/* Initializing the character device */
+	cdev_init(&g_nictool_cdev, &fifo_operations);
+
+	/* Add devices to the operating system */
+	ret = cdev_add(&g_nictool_cdev, g_dev_id, 1);
+	if (ret < 0) {
+		pr_err("Add nictool_dev to operating system fail(0x%x)\n", ret);
+		goto cdev_add_err;
+	}
+
+	/* Export device information to user space
+	 * (/sys/class/class name/device name)
+	 */
+	pdevice = device_create(g_nictool_class, NULL,
+				g_dev_id, NULL, HIADM_DEV_NAME);
+	if (IS_ERR(pdevice)) {
+		pr_err("Export nictool device information to user space fail\n");
+		ret = -EFAULT;
+		goto device_create_err;
+	}
+
+	g_nictool_init_flag = 1;
+	g_nictool_ref_cnt = 1;
+
+	pr_info("Register nictool_dev to system succeed\n");
+
+	return 0;
+
+device_create_err:
+	cdev_del(&g_nictool_cdev);
+
+cdev_add_err:
+	class_destroy(g_nictool_class);
+
+class_create_err:
+	g_nictool_class = NULL;
+	unregister_chrdev_region(g_dev_id, 1);
+
+	return ret;
+}
+
+void nictool_k_uninit(void)
+{
+	if (g_nictool_init_flag) {
+		if ((--g_nictool_ref_cnt))
+			return;
+	}
+
+	g_nictool_init_flag = 0;
+
+	if (!g_nictool_class || IS_ERR(g_nictool_class))
+		return;
+
+	cdev_del(&g_nictool_cdev);
+	device_destroy(g_nictool_class, g_dev_id);
+	class_destroy(g_nictool_class);
+	g_nictool_class = NULL;
+
+	unregister_chrdev_region(g_dev_id, 1);
+
+	pr_info("Unregister nictool_dev succeed\n");
+}

drivers/scsi/huawei/hifc/hifc_tool.h

+/* SPDX-License-Identifier: GPL-2.0 */
+/* Huawei Hifc PCI Express Linux driver
+ * Copyright(c) 2017 Huawei Technologies Co., Ltd
+ *
+ */
+
+#ifndef HIFC_NICTOOL_H_
+#define HIFC_NICTOOL_H_
+#ifndef IFNAMSIZ
+#define IFNAMSIZ    16
+#endif
+/* completion timeout interval, unit is jiffies*/
+#define UP_COMP_TIME_OUT_VAL		10000U
+
+struct sm_in_st {
+	int node;
+	int id;
+	int instance;
+};
+
+struct sm_out_st {
+	u64 val1;
+	u64 val2;
+};
+
+struct up_log_msg_st {
+	u32 rd_len;
+	u32 addr;
+};
+
+struct csr_write_st {
+	u32 rd_len;
+	u32 addr;
+	u8 *data;
+};
+
+struct ipsurx_stats_info {
+	u32 addr;
+	u32 rd_cnt;
+};
+
+struct ucode_cmd_st {
+	union {
+		struct {
+			u32 comm_mod_type:8;
+			u32 ucode_cmd_type:4;
+			u32 cmdq_ack_type:3;
+			u32 ucode_imm:1;
+			u32 len:16;
+		} ucode_db;
+		u32 value;
+	};
+};
+
+struct up_cmd_st {
+	union {
+		struct {
+			u32 comm_mod_type:8;
+			u32 chipif_cmd:8;
+			u32 up_api_type:16;
+		} up_db;
+		u32 value;
+	};
+};
+
+struct _dcb_data {
+	u8 wr_flag;
+	u8 dcb_en;
+	u8 err;
+	u8 rsvd;
+};
+
+union _dcb_ctl {
+	struct _dcb_data dcb_data;
+	u32 data;
+};
+
+struct _pfc_data {
+	u8 pfc_en;
+	u8 pfc_priority;
+	u8 num_of_tc;
+	u8 err;
+};
+
+union _pfc {
+	 struct _pfc_data pfc_data;
+	 u32 data;
+};
+
+union _flag_com {
+	struct _ets_flag {
+		u8 flag_ets_enable:1;
+		u8 flag_ets_percent:1;
+		u8 flag_ets_cos:1;
+		u8 flag_ets_strict:1;
+		u8 rev:4;
+	} ets_flag;
+	u8 data;
+};
+
+struct _ets {
+	u8 ets_en;
+	u8 err;
+	u8 strict;
+	u8 tc[8];
+	u8 ets_percent[8];
+	union _flag_com flag_com;
+};
+
+#define API_CMD 0x1
+#define API_CHAIN 0x2
+#define API_CLP 0x3
+
+struct msg_module {
+	char device_name[IFNAMSIZ];
+	unsigned int module;
+	union {
+		u32 msg_formate;
+		struct ucode_cmd_st ucode_cmd;
+		struct up_cmd_st up_cmd;
+	};
+
+	struct {
+		u32 in_buff_len;
+		u32 out_buff_len;
+	} len_info;
+	u32 res;
+	void *in_buff;
+	void *out_buf;
+};
+
+#define MAX_VER_INFO_LEN 128
+struct drv_version_info {
+	char ver[MAX_VER_INFO_LEN];
+};
+
+struct chip_fault_stats {
+	int offset;
+	u8 chip_faults[MAX_DRV_BUF_SIZE];
+};
+
+struct hifc_wqe_info {
+	int q_id;
+	void *slq_handle;
+	unsigned int wqe_id;
+};
+
+struct hifc_tx_hw_page {
+	u64     phy_addr;
+	u64	*map_addr;
+};
+
+struct hifc_dbg_sq_info {
+	u16	q_id;
+	u16	pi;
+	u16	ci;/* sw_ci */
+	u16	fi;/* hw_ci */
+
+	u32	q_depth;
+	u16	pi_reverse;
+	u16	weqbb_size;
+
+	u8	priority;
+	u16	*ci_addr;
+	u64	cla_addr;
+
+	void	*slq_handle;
+
+	struct hifc_tx_hw_page	direct_wqe;
+	struct hifc_tx_hw_page	db_addr;
+	u32	pg_idx;
+
+	u32	glb_sq_id;
+};
+
+struct hifc_dbg_rq_info {
+	u16	q_id;
+	u16	glb_rq_id;
+	u16	hw_pi;
+	u16	ci;	/* sw_ci */
+	u16	sw_pi;
+	u16	wqebb_size;
+	u16	q_depth;
+	u16	buf_len;
+
+	void	*slq_handle;
+	u64	ci_wqe_page_addr;
+	u64	ci_cla_tbl_addr;
+
+	u16	msix_idx;
+	u32	msix_vector;
+};
+
+#ifndef BUSINFO_LEN
+#define BUSINFO_LEN (32)
+#endif
+struct pf_info {
+	char name[IFNAMSIZ];
+	char bus_info[BUSINFO_LEN];
+	u32 pf_type;
+};
+
+#ifndef MAX_SIZE
+#define MAX_SIZE (16)
+#endif
+struct card_info {
+	struct pf_info pf[MAX_SIZE];
+	u32 pf_num;
+};
+
+struct nic_card_id {
+	u32 id[MAX_SIZE];
+	u32 num;
+};
+
+struct func_pdev_info {
+	u64 bar0_phy_addr;
+	u64 bar0_size;
+	u64 rsvd1[4];
+};
+
+struct hifc_card_func_info {
+	u32 num_pf;
+	u32 rsvd0;
+	u64 usr_api_phy_addr;
+	struct func_pdev_info pdev_info[MAX_SIZE];
+};
+
+#ifndef NIC_UP_CMD_UPDATE_FW
+#define NIC_UP_CMD_UPDATE_FW (114)
+#endif
+
+#ifndef MAX_CARD_NUM
+#define MAX_CARD_NUM (64)
+#endif
+extern void *g_card_node_array[MAX_CARD_NUM];
+extern void *g_card_vir_addr[MAX_CARD_NUM];
+extern u64 g_card_phy_addr[MAX_CARD_NUM];
+extern struct mutex	g_addr_lock;
+extern int card_id;
+
+struct hifc_nic_loop_mode {
+	u32 loop_mode;
+	u32 loop_ctrl;
+};
+
+struct hifc_nic_poll_weight {
+	int poll_weight;
+};
+
+enum hifc_homologues_state {
+	HIFC_HOMOLOGUES_OFF = 0,
+	HIFC_HOMOLOGUES_ON  = 1,
+};
+
+struct hifc_homologues {
+	enum hifc_homologues_state homo_state;
+};
+
+struct hifc_pf_info {
+	u32 isvalid;
+	u32 pf_id;
+};
+
+enum module_name {
+	SEND_TO_NIC_DRIVER = 1,
+	SEND_TO_HW_DRIVER,
+	SEND_TO_UCODE,
+	SEND_TO_UP,
+	SEND_TO_SM,
+	HIFCADM_FC_DRIVER = 10,
+};
+
+enum driver_cmd_type {
+	FUNC_TYPE = 12,
+	GET_FUNC_IDX,
+	GET_DRV_VERSION = 16,
+	GET_HW_STATS = 18,
+	CLEAR_HW_STATS,
+	GET_CHIP_FAULT_STATS = 21,
+	GET_CHIP_ID = 25,
+	GET_SINGLE_CARD_INFO,
+	GET_FIRMWARE_ACTIVE_STATUS,
+	GET_DEVICE_ID = 29,
+	IS_DRV_IN_VM = 44,
+	GET_CHIP_INFO = 48,
+	GET_PF_ID = 52,
+	PORT_ID = 0x42
+};
+
+enum api_chain_cmd_type {
+	API_CSR_READ,
+	API_CSR_WRITE
+};
+
+enum sm_cmd_type {
+	SM_CTR_RD32 = 1,
+	SM_CTR_RD64_PAIR,
+	SM_CTR_RD64
+};
+
+int nictool_k_init(void);
+void nictool_k_uninit(void);
+
+int send_to_hw_driver(void *hwdev, struct msg_module *nt_msg,
+		      void *buf_in, u32 in_size, void *buf_out, u32 *out_size);
+
+int send_to_sm(void *hwdev, struct msg_module *nt_msg, void *buf_in,
+	       u32 in_size, void *buf_out, u32 *out_size);
+
+int send_to_up(void *hwdev, struct msg_module *nt_msg, void *buf_in,
+	       u32 in_size, void *buf_out, u32 *out_size);
+
+int send_to_ucode(void *hwdev, struct msg_module *nt_msg, void *buf_in,
+		  u32 in_size, void *buf_out, u32 *out_size);
+
+void get_fc_devname(char *devname);
+void *hifc_get_hwdev_by_ifname(char *ifname);
+enum hifc_init_state hifc_get_init_state_by_ifname(char *ifname);
+void hifc_get_all_chip_id(void *id_info);
+void hifc_tool_cnt_dec(void);
+void hifc_tool_cnt_inc(void);
+int hifc_get_device_id(void *hwdev, u16 *dev_id);
+int hifc_get_pf_id(void *hwdev, u32 port_id, u32 *pf_id, u32 *isvalid);
+bool hifc_is_valid_bar_addr(u64 offset);
+void hifc_get_card_info(void *hwdev, void *bufin);
+struct hifc_pcidev *hifc_get_pcidev_by_dev_name(char *ifname);
+void hifc_get_card_func_info_by_card_name(
+	const char *chip_name, struct hifc_card_func_info *card_func);
+
+#endif
+

drivers/scsi/huawei/hifc/unf_portman.h

+/* SPDX-License-Identifier: GPL-2.0 */
+/* Huawei Hifc PCI Express Linux driver
+ * Copyright(c) 2017 Huawei Technologies Co., Ltd
+ *
+ */
+#ifndef __UNF_PORT_MAN_H__
+#define __UNF_PORT_MAN_H__
+
+#define UNF_LPORT_POLL_TIMER ((unsigned int)(1 * 1000))
+
+#define UNF_MAX_BBSCN_VALUE     14
+#define UNF_SAVA_INFO_MODE      0
+#define UNF_CLEAN_INFO_MODE     1
+
+#define FC_DRIVE_ACTION_CHECK(condition, fail_do0, fail_do1, return) \
+	do {                                                         \
+		if (condition) {                                     \
+			fail_do0;                                    \
+			fail_do1;                                    \
+			return;                                      \
+		}                                                    \
+	} while (0)
+
+/* Used in hifcadm tool */
+#define UNF_ENABLE_DIF_DIX_PROT 1
+#define UNF_ENABLE_DIF_PROT     2
+#define UNF_ENABLE_DIX_PROT     3
+
+#define UNF_DISABLE_IP_CHECKSUM 0
+#define UNF_ENABLE_IP_CHECKSUM  1
+
+#define UNF_APP_REF_ESC_BOTH_NOT_CHECK 0
+#define UNF_APP_ESC_CHECK              1
+#define UNF_REF_ESC_CHECK              2
+#define UNF_APP_REF_ESC_BOTH_CHECK     3
+
+struct unf_global_card_thread_s {
+	struct list_head list_card_list_head;
+	spinlock_t global_card_list_lock;
+	unsigned int card_sum;
+};
+
+/* Global L_Port MG,manage all L_Port */
+struct unf_global_lport_s {
+	struct list_head list_lport_list_head;
+
+	/* Temporary list,used in hold list traverse */
+	struct list_head list_intergrad_head;
+
+	/* destroy list,used in card remove */
+	struct list_head list_destroy_head;
+
+	/* Dirty list,abnormal port */
+	struct list_head list_dirty_head;
+	spinlock_t global_lport_list_lock;
+	unsigned int lport_sum;
+	unsigned char dft_mode;
+	int b_start_work;
+};
+
+struct unf_reset_port_argin {
+	unsigned int port_id;
+};
+
+struct unf_get_topo_argout {
+	unsigned int *topo_cfg;
+	enum unf_act_topo_e *en_act_topo;
+};
+
+struct unf_set_topo_argin {
+	unsigned int port_id;
+	unsigned int topo;
+};
+
+struct unf_set_bbscn_argin {
+	unsigned int port_id;
+	unsigned int bb_scn;
+};
+
+struct unf_set_sfp_argin {
+	unsigned int port_id;
+	int turn_on;
+};
+
+struct unf_set_speed_argin {
+	unsigned int port_id;
+	unsigned int *speed;
+};
+
+struct unf_get_sfp_argout {
+	unsigned int *status;
+	union unf_sfp_eeprome_info *sfp_info;
+};
+
+struct unf_get_allinfo_argout {
+	unsigned int *out_size;
+	unsigned int in_size;
+	void *out_buf;
+	void *in_buf;
+	void *lport;
+};
+
+struct unf_port_action_s {
+	unsigned int action;
+	unsigned int (*fn_unf_action)(struct unf_lport_s *v_lport,
+				      void *v_input);
+};
+
+struct unf_hifcadm_action_s {
+	unsigned int hifc_action;
+	int (*fn_unf_hifc_action)(struct unf_lport_s *v_lport,
+				  struct unf_hinicam_pkg *v_input);
+};
+
+struct unf_lport_info {
+#define NPIVMAX 255
+	unsigned int port_id;
+	unsigned int options;
+	int b_start_work;
+	unsigned int phy_link;
+	unsigned int link_up;
+	unsigned int act_speed;
+	unsigned int cfg_speed;
+	unsigned int tape_support;
+	unsigned long long port_name;
+	unsigned int msi;
+	unsigned int ini_io_retry_timeout;
+	unsigned int support_max_npiv_num;
+	unsigned int act_topo;
+	unsigned int port_topology;
+	unsigned int fc_ser_max_speed;
+	unsigned int loss_of_signal_count;
+	unsigned int bad_rx_char_count;
+	unsigned int loss_of_sync_count;
+	unsigned int link_fail_count;
+	unsigned int rx_eo_fa_count;
+	unsigned int dis_frame_count;
+	unsigned int bad_crc_count;
+	unsigned int proto_error_count;
+	unsigned int cfg_led_mode;
+	unsigned char chip_type;
+	unsigned char vport_num;
+	unsigned short rsvd1;
+	unsigned int vport_id[NPIVMAX];
+	unsigned int nport_id;
+};
+
+struct unf_admin_msg_head {
+	unsigned int size;
+	unsigned short status;
+	unsigned char success_num;
+	unsigned char rsvd;
+};
+
+#define UNF_PORT_INFO_SIZE 10
+
+struct unf_adm_cmd {
+	struct unf_admin_msg_head msg_head;
+	unsigned int arg[UNF_PORT_INFO_SIZE];
+};
+
+struct unf_adm_xchg {
+	unsigned int aborted;
+	unsigned int ini_busy;
+	unsigned int tgt_busy;
+	unsigned int delay;
+	unsigned int free;
+	unsigned int wait;
+	unsigned int sfs_free;
+	unsigned int sfs_busy;
+};
+
+enum unf_admin_msg_status_e {
+	UNF_ADMIN_MSG_DONE = 0,
+	UNF_ADMIN_MSG_INCOMPLETE,
+	UNF_ADMIN_MSG_FAILED,
+	UNF_ADMIN_MSG_BUTT
+};
+
+/* the structure define with fc unf driver */
+enum fc_dfx_io_count_type_e {
+	FC_HOST_COUNTER = 0,
+	FC_HOST_SCSI_CMD_IN_TOTAL,
+	FC_HOST_SCSI_CMD_DONE_TOTAL,
+	FC_SESSION_COUNTER,
+	FC_SESSION_SCSI_CMD_IN,
+	FC_SESSION_SCSI_CMD_DONE,
+	FC_SRB_COUNT,
+};
+
+enum unf_msg_format_e {
+	UNF_PORT_SET_OP = 1,
+	UNF_TOPO_SET_OP,
+	UNF_SPEED_SET_OP,
+	UNF_INFO_GET_OP,
+	UNF_INFO_CLEAR_OP,
+	UNF_SFP_INFO_OP,
+	UNF_DFX,
+	UNF_FEC_SET = 8,
+	UNF_BBSCN,
+	UNF_VPORT,
+	UNF_LINK_DELAY = 11,
+	UNF_DIF,
+	UNF_DIF_CONFIG = 14,
+	UNF_SAVA_DATA,
+	UNF_SHOW_XCHG = 23,
+	UNF_PORTSTAT = 24,
+	UNF_ALL_INFO_OP = 25,
+	FC_LINK_TMO_OPT = 26,
+	FC_DRV_LOG_OPT = 27,
+	UNF_COMPAT_TEST = 0xFF
+};
+
+struct unf_save_info_head_s {
+	unsigned int opcode : 4;
+	unsigned int type : 4;
+	unsigned int entry_num : 8;
+	unsigned int next : 16;
+};
+
+enum unf_save_info_type_e {
+	UNF_SESSION_QOS = 0,
+	UNF_PORT_BASE_INFO = 2,
+	UNF_SAVE_TYPE_BUTT,
+};
+
+struct unf_link_tmo_opt_s {
+	struct unf_admin_msg_head head;
+	unsigned int link_opt;
+	int tmo_value;
+	unsigned int sync_all_port;
+};
+
+struct unf_log_level_opt_s {
+	struct unf_admin_msg_head head;
+	unsigned int log_opt;
+	unsigned int log_level;
+	unsigned int log_fre_qunce;
+};
+
+extern struct unf_global_lport_s global_lport_mgr;
+extern struct unf_global_card_thread_s card_thread_mgr;
+extern struct workqueue_struct *unf_work_queue;
+
+struct unf_lport_s *unf_find_lport_by_port_id(unsigned int v_port_id);
+struct unf_lport_s *unf_find_lport_by_scsi_host_id(unsigned int scsi_host_id);
+void *unf_lport_create_and_init(
+			void *private_data,
+			struct unf_low_level_function_op_s *low_level_op);
+int unf_cm_reset_port(unsigned int v_port_id);
+int unf_cm_sfp_switch(unsigned int v_port_id, int v_bturn_on);
+int unf_cm_get_sfp_info(unsigned int v_port_id, unsigned int *v_status,
+			union unf_sfp_eeprome_info *v_sfp_info,
+			unsigned int *sfp_type);
+int unf_cm_set_port_bbscn(unsigned int v_port_id, unsigned int v_bbscn);
+int unf_cm_set_port_topo(unsigned int v_port_id, unsigned int v_topo);
+int unf_cm_get_port_topo(unsigned int v_port_id,
+			 unsigned int *v_topo_cfg,
+			 enum unf_act_topo_e *v_en_act_topo);
+int unf_cm_clear_port_error_code_sum(unsigned int v_port_id);
+unsigned int unf_fc_port_link_event(void *v_lport, unsigned int v_events,
+				    void *v_input);
+unsigned int unf_release_local_port(void *v_lport);
+void unf_lport_route_work(struct work_struct *v_work);
+void unf_lport_update_topo(struct unf_lport_s *v_lport,
+			   enum unf_act_topo_e v_enactive_topo);
+void unf_lport_ref_dec(struct unf_lport_s *v_lport);
+unsigned int unf_lport_refinc(struct unf_lport_s *v_lport);
+void unf_lport_ref_dec_to_destroy(struct unf_lport_s *v_lport);
+int unf_send_event(unsigned int port_id, unsigned int syn_flag,
+		   void *argc_in, void *argc_out,
+		   int (*p_func)(void *argc_in, void *argc_out));
+void unf_port_mgmt_deinit(void);
+void unf_port_mgmt_init(void);
+int unf_cm_echo_test(unsigned int v_port_id, unsigned int v_nport_id,
+		     unsigned int *v_link_delay);
+void unf_show_dirty_port(int v_show_only, unsigned int *v_ditry_port_num);
+unsigned int unf_get_error_code_sum(struct unf_lport_s *v_lport,
+				    struct unf_err_code_s *v_fc_err_code);
+int unf_cm_set_port_speed(unsigned int v_port_id, unsigned int *v_speed);
+void *unf_lookup_lport_by_nport_id(void *v_lport, unsigned int v_nport_id);
+int unf_cmd_adm_handler(void *v_lport, struct unf_hinicam_pkg *v_input);
+unsigned int unf_is_lport_valid(struct unf_lport_s *v_lport);
+unsigned int unf_cm_save_port_info(unsigned int v_port_id);
+unsigned int unf_cm_get_save_info(struct unf_lport_s *v_lport);
+unsigned int unf_cm_clear_flush(unsigned int v_port_id);
+int unf_lport_reset_port(struct unf_lport_s *v_lport, unsigned int v_flag);
+unsigned int unf_register_scsi_host(struct unf_lport_s *v_lport);
+void unf_unregister_scsi_host(struct unf_lport_s *v_lport);
+int unf_get_link_lose_tmo(struct unf_lport_s *v_lport);
+int unf_set_link_lose_tmo(struct unf_lport_s *v_lport, int time_out);
+void unf_init_link_lose_tmo(struct unf_lport_s *v_lport);
+int unf_set_link_lose_tmo_to_all(int time_out);
+void unf_destroy_scsi_id_table(struct unf_lport_s *v_lport);
+unsigned int unf_lport_login(struct unf_lport_s *v_lport,
+			     enum unf_act_topo_e v_en_act_topo);
+unsigned int unf_init_scsi_id_table(struct unf_lport_s *v_lport);
+void unf_set_lport_removing(struct unf_lport_s *v_lport);
+void unf_lport_release_lw_fun_op(struct unf_lport_s *v_lport);
+void unf_disc_state_ma(struct unf_lport_s *v_lport,
+		       enum unf_disc_event_e v_event);
+unsigned int unf_init_lport_mgr_temp(struct unf_lport_s *v_lport);
+void unf_release_lport_mgr_temp(struct unf_lport_s *v_lport);
+
+#endif