ARM: dts: r8a7792: Convert to new CPG/MSSR bindings

Convert the R-Car V2H SoC from the old "Renesas R-Car Gen2 Clock Pulse
Generator (CPG)" and "Renesas CPG Module Stop (MSTP) Clocks" DT bindings
to the new unified "Renesas Clock Pulse Generator / Module Standby and
Software Reset" DT bindings.

This simplifies the DTS files, and allows to add support for reset
control later.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

arch/arm/boot/dts/r8a7792-blanche.dts

@@ -310,8 +310,7 @@
 	pinctrl-0 = <&du0_pins &du1_pins>;
 	pinctrl-names = "default";
 
-	clocks = <&mstp7_clks R8A7792_CLK_DU0>, <&mstp7_clks R8A7792_CLK_DU1>,
-		 <&x1_clk>, <&x2_clk>;
+	clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&x1_clk>, <&x2_clk>;
 	clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
 	status = "okay";
 

arch/arm/boot/dts/r8a7792-wheat.dts

@@ -305,8 +305,7 @@
 	pinctrl-0 = <&du0_pins &du1_pins>;
 	pinctrl-names = "default";
 
-	clocks = <&mstp7_clks R8A7792_CLK_DU0>, <&mstp7_clks R8A7792_CLK_DU1>,
-		 <&osc2_clk>;
+	clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&osc2_clk>;
 	clock-names = "du.0", "du.1", "dclkin.0";
 	status = "okay";