From 66f3ac48165eb047fde2f2bf19f741b06b2b48ad Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 11 Nov 2019 14:01:41 +0000 Subject: [PATCH] drm/v3d: Don't clear MMU control bits on exception raspberrypi inclusion category: feature bugzilla: 50432 -------------------------------- MMU exception conditions are reported in the V3D_MMU_CTRL register as write-1-to-clear (W1C) bits. The MMU interrupt handling code clears any exceptions, but does so by masking out any other bits and writing the result back. There are some important control bits in that register, including MMU_ENABLE, so a safer approach is to simply write back the value just read unaltered. This patch doesn't remove the cause of the apparent PTE errors, but it does reduce the impact to just an error in the kernel log. Signed-off-by: Phil Elwell Signed-off-by: Fang Yafen Signed-off-by: Zheng Zengkai --- drivers/gpu/drm/v3d/v3d_irq.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpu/drm/v3d/v3d_irq.c b/drivers/gpu/drm/v3d/v3d_irq.c index c88686489b88..b804783e2795 100644 --- a/drivers/gpu/drm/v3d/v3d_irq.c +++ b/drivers/gpu/drm/v3d/v3d_irq.c @@ -178,10 +178,7 @@ v3d_hub_irq(int irq, void *arg) }; const char *client = "?"; - V3D_WRITE(V3D_MMU_CTL, - V3D_READ(V3D_MMU_CTL) & (V3D_MMU_CTL_CAP_EXCEEDED | - V3D_MMU_CTL_PT_INVALID | - V3D_MMU_CTL_WRITE_VIOLATION)); + V3D_WRITE(V3D_MMU_CTL, V3D_READ(V3D_MMU_CTL)); if (v3d->ver >= 41) { axi_id = axi_id >> 5; -- GitLab