提交 66b3cf2a 编写于 作者: J Jammy Zhou 提交者: Alex Deucher

drm/amdgpu: add ctx_id to the WAIT_CS IOCTL (v4)

It is required to support fence per context.

v2: add amdgpu_ctx_get/put
v3: improve get/put
v4: squash hlock fix
Signed-off-by: NJammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: NChristian König <christian.koenig@amd.com>
上级 74a5d165
...@@ -1902,6 +1902,8 @@ int amdgpu_ctx_query(struct amdgpu_device *adev, struct amdgpu_fpriv *fpriv, ...@@ -1902,6 +1902,8 @@ int amdgpu_ctx_query(struct amdgpu_device *adev, struct amdgpu_fpriv *fpriv,
uint32_t id,struct amdgpu_ctx_state *state); uint32_t id,struct amdgpu_ctx_state *state);
void amdgpu_ctx_fini(struct amdgpu_fpriv *fpriv); void amdgpu_ctx_fini(struct amdgpu_fpriv *fpriv);
struct amdgpu_ctx *amdgpu_ctx_get(struct amdgpu_fpriv *fpriv, uint32_t id);
int amdgpu_ctx_put(struct amdgpu_ctx *ctx);
extern int amdgpu_ctx_ioctl(struct drm_device *dev, void *data, extern int amdgpu_ctx_ioctl(struct drm_device *dev, void *data,
struct drm_file *filp); struct drm_file *filp);
......
...@@ -768,8 +768,13 @@ int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data, ...@@ -768,8 +768,13 @@ int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data,
uint64_t seq[AMDGPU_MAX_RINGS] = {0}; uint64_t seq[AMDGPU_MAX_RINGS] = {0};
struct amdgpu_ring *ring = NULL; struct amdgpu_ring *ring = NULL;
unsigned long timeout = amdgpu_gem_timeout(wait->in.timeout); unsigned long timeout = amdgpu_gem_timeout(wait->in.timeout);
struct amdgpu_ctx *ctx;
long r; long r;
ctx = amdgpu_ctx_get(filp->driver_priv, wait->in.ctx_id);
if (ctx == NULL)
return -EINVAL;
r = amdgpu_cs_get_ring(adev, wait->in.ip_type, wait->in.ip_instance, r = amdgpu_cs_get_ring(adev, wait->in.ip_type, wait->in.ip_instance,
wait->in.ring, &ring); wait->in.ring, &ring);
if (r) if (r)
...@@ -778,6 +783,7 @@ int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data, ...@@ -778,6 +783,7 @@ int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data,
seq[ring->idx] = wait->in.handle; seq[ring->idx] = wait->in.handle;
r = amdgpu_fence_wait_seq_timeout(adev, seq, true, timeout); r = amdgpu_fence_wait_seq_timeout(adev, seq, true, timeout);
amdgpu_ctx_put(ctx);
if (r < 0) if (r < 0)
return r; return r;
......
...@@ -151,3 +151,33 @@ int amdgpu_ctx_ioctl(struct drm_device *dev, void *data, ...@@ -151,3 +151,33 @@ int amdgpu_ctx_ioctl(struct drm_device *dev, void *data,
return r; return r;
} }
struct amdgpu_ctx *amdgpu_ctx_get(struct amdgpu_fpriv *fpriv, uint32_t id)
{
struct amdgpu_ctx *ctx;
struct amdgpu_ctx_mgr *mgr = &fpriv->ctx_mgr;
mutex_lock(&mgr->lock);
ctx = idr_find(&mgr->ctx_handles, id);
if (ctx)
kref_get(&ctx->refcount);
mutex_unlock(&mgr->lock);
return ctx;
}
int amdgpu_ctx_put(struct amdgpu_ctx *ctx)
{
struct amdgpu_fpriv *fpriv;
struct amdgpu_ctx_mgr *mgr;
if (ctx == NULL)
return -EINVAL;
fpriv = ctx->fpriv;
mgr = &fpriv->ctx_mgr;
mutex_lock(&mgr->lock);
kref_put(&ctx->refcount, amdgpu_ctx_do_release);
mutex_unlock(&mgr->lock);
return 0;
}
...@@ -260,7 +260,7 @@ struct drm_amdgpu_wait_cs_in { ...@@ -260,7 +260,7 @@ struct drm_amdgpu_wait_cs_in {
uint32_t ip_type; uint32_t ip_type;
uint32_t ip_instance; uint32_t ip_instance;
uint32_t ring; uint32_t ring;
uint32_t _pad; uint32_t ctx_id;
}; };
struct drm_amdgpu_wait_cs_out { struct drm_amdgpu_wait_cs_out {
......
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