diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c index 679b0b743e9277d1e7994c314359f5db6a844603..ae962bf7ca0db5f627e5ac81f6b7218c61d660dd 100644 --- a/arch/arm/mach-at91/board-cap9adk.c +++ b/arch/arm/mach-at91/board-cap9adk.c @@ -304,7 +304,7 @@ static struct fb_videomode at91_tft_vga_modes[] = { .xres = 240, .yres = 320, .pixclock = KHZ2PICOS(4965), - .left_margin = 1, .right_margin = 33, + .left_margin = 1, .right_margin = 34, .upper_margin = 1, .lower_margin = 0, .hsync_len = 5, .vsync_len = 1, diff --git a/arch/arm/mach-at91/board-neocore926.c b/arch/arm/mach-at91/board-neocore926.c index 9bc6ab32e0acd2bb9b7d3f60ebd8c0a77d8980b3..583878ed9a6d58eab622d141950a9c2c9686d898 100644 --- a/arch/arm/mach-at91/board-neocore926.c +++ b/arch/arm/mach-at91/board-neocore926.c @@ -235,7 +235,7 @@ static struct fb_videomode at91_tft_vga_modes[] = { .xres = 240, .yres = 320, .pixclock = KHZ2PICOS(5000), - .left_margin = 1, .right_margin = 33, + .left_margin = 1, .right_margin = 34, .upper_margin = 1, .lower_margin = 0, .hsync_len = 5, .vsync_len = 1, diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c index 5096a0ec50c13c8a64ab041b064e960c5f4aa0d4..8dda83bd279117a93b207ed03bc8001ea1c0f3e4 100644 --- a/arch/arm/mach-at91/board-sam9261ek.c +++ b/arch/arm/mach-at91/board-sam9261ek.c @@ -370,7 +370,7 @@ static struct fb_videomode at91_stn_modes[] = { .xres = 320, .yres = 240, .pixclock = KHZ2PICOS(1440), - .left_margin = 1, .right_margin = 1, + .left_margin = 1, .right_margin = 2, .upper_margin = 0, .lower_margin = 0, .hsync_len = 1, .vsync_len = 1, @@ -431,7 +431,7 @@ static struct fb_videomode at91_tft_vga_modes[] = { .xres = 240, .yres = 320, .pixclock = KHZ2PICOS(4965), - .left_margin = 1, .right_margin = 33, + .left_margin = 1, .right_margin = 34, .upper_margin = 1, .lower_margin = 0, .hsync_len = 5, .vsync_len = 1, diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c index ea8f185d3b9d342b7cdcf19e1c8bff5e54af0574..e2600700440285b6ad038a481bb3f3df54f89e93 100644 --- a/arch/arm/mach-at91/board-sam9263ek.c +++ b/arch/arm/mach-at91/board-sam9263ek.c @@ -258,7 +258,7 @@ static struct fb_videomode at91_tft_vga_modes[] = { .xres = 240, .yres = 320, .pixclock = KHZ2PICOS(4965), - .left_margin = 1, .right_margin = 33, + .left_margin = 1, .right_margin = 34, .upper_margin = 1, .lower_margin = 0, .hsync_len = 5, .vsync_len = 1, diff --git a/arch/arm/mach-at91/board-sam9m10g45ek.c b/arch/arm/mach-at91/board-sam9m10g45ek.c index ad234ccbf57e5214d8e0ebb0eec63a00fa80ef68..5e9a5ca54d4c66e0cbf9ae22579ff5520aef3cd6 100644 --- a/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/arch/arm/mach-at91/board-sam9m10g45ek.c @@ -197,7 +197,7 @@ static struct fb_videomode at91_tft_vga_modes[] = { .xres = 480, .yres = 272, .pixclock = KHZ2PICOS(9000), - .left_margin = 1, .right_margin = 1, + .left_margin = 1, .right_margin = 2, .upper_margin = 40, .lower_margin = 1, .hsync_len = 45, .vsync_len = 1, diff --git a/arch/arm/mach-at91/board-sam9rlek.c b/arch/arm/mach-at91/board-sam9rlek.c index 4f14b54b93a88278bef0ad5ab854d3bd497cce92..ad9e5c93d8769adc9feb11b1002444d97cbd5234 100644 --- a/arch/arm/mach-at91/board-sam9rlek.c +++ b/arch/arm/mach-at91/board-sam9rlek.c @@ -154,7 +154,7 @@ static struct fb_videomode at91_tft_vga_modes[] = { .xres = 240, .yres = 320, .pixclock = KHZ2PICOS(4965), - .left_margin = 1, .right_margin = 33, + .left_margin = 1, .right_margin = 34, .upper_margin = 1, .lower_margin = 0, .hsync_len = 5, .vsync_len = 1, diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c index 244d55b7c0ae38dea57d53cd3a1a5b34607dcdf4..7e66263b18c1a57709d50d0b437199d57e6b9bc7 100644 --- a/drivers/video/atmel_lcdfb.c +++ b/drivers/video/atmel_lcdfb.c @@ -396,7 +396,7 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var, var->lower_margin = min_t(u32, var->lower_margin, ATMEL_LCDC_VFP); var->right_margin = min_t(u32, var->right_margin, - (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1); + (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 2); var->hsync_len = min_t(u32, var->hsync_len, (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1); var->left_margin = min_t(u32, var->left_margin, @@ -581,7 +581,7 @@ static int atmel_lcdfb_set_par(struct fb_info *info) lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value); /* Horizontal timing */ - value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET; + value = (info->var.right_margin - 2) << ATMEL_LCDC_HFP_OFFSET; value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET; value |= (info->var.left_margin - 1); dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);