提交 59892de9 编写于 作者: K Kathiravan T 提交者: Bjorn Andersson

arm64: dts: qcom: ipq8074: enable the GICv2m support

GIC used in the IPQ8074 SoCs has one instance of the GICv2m extension,
which supports upto 32 MSI interrupts. Lets add support for the same.
Signed-off-by: NKathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1644334525-11577-2-git-send-email-quic_kathirav@quicinc.com
上级 ff899133
...@@ -634,9 +634,18 @@ ...@@ -634,9 +634,18 @@
intc: interrupt-controller@b000000 { intc: interrupt-controller@b000000 {
compatible = "qcom,msm-qgic2"; compatible = "qcom,msm-qgic2";
#address-cells = <1>;
#size-cells = <1>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <0x3>; #interrupt-cells = <0x3>;
reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>; reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;
ranges = <0 0xb00a000 0xffd>;
v2m@0 {
compatible = "arm,gic-v2m-frame";
msi-controller;
reg = <0x0 0xffd>;
};
}; };
timer { timer {
......
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