diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h index d3bea88d8744ace24ad245062830c6cc64ea7886..d9743536a6217c09e413fec50ff00647e842fadc 100644 --- a/arch/mips/include/asm/mmu_context.h +++ b/arch/mips/include/asm/mmu_context.h @@ -178,8 +178,8 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, * Mark current->active_mm as not "active" anymore. * We don't want to mislead possible IPI tlb flush routines. */ - cpu_clear(cpu, prev->cpu_vm_mask); - cpu_set(cpu, next->cpu_vm_mask); + cpumask_clear_cpu(cpu, mm_cpumask(prev)); + cpumask_set_cpu(cpu, mm_cpumask(next)); local_irq_restore(flags); } @@ -235,8 +235,8 @@ activate_mm(struct mm_struct *prev, struct mm_struct *next) TLBMISS_HANDLER_SETUP_PGD(next->pgd); /* mark mmu ownership change */ - cpu_clear(cpu, prev->cpu_vm_mask); - cpu_set(cpu, next->cpu_vm_mask); + cpumask_clear_cpu(cpu, mm_cpumask(prev)); + cpumask_set_cpu(cpu, mm_cpumask(next)); local_irq_restore(flags); } @@ -258,7 +258,7 @@ drop_mmu_context(struct mm_struct *mm, unsigned cpu) local_irq_save(flags); - if (cpu_isset(cpu, mm->cpu_vm_mask)) { + if (cpumask_test_cpu(cpu, mm_cpumask(mm))) { get_new_mmu_context(mm, cpu); #ifdef CONFIG_MIPS_MT_SMTC /* See comments for similar code above */ diff --git a/arch/mips/mm/c-octeon.c b/arch/mips/mm/c-octeon.c index 10ab69f7183fc8b69630c3c7add7a06a22b64fe4..94e05e5733c1c4e108baa4076a044c48bdd612e6 100644 --- a/arch/mips/mm/c-octeon.c +++ b/arch/mips/mm/c-octeon.c @@ -79,7 +79,7 @@ static void octeon_flush_icache_all_cores(struct vm_area_struct *vma) * cores it has been used on */ if (vma) - mask = vma->vm_mm->cpu_vm_mask; + mask = *mm_cpumask(vma->vm_mm); else mask = cpu_online_map; cpu_clear(cpu, mask);