perf/x86/intel: Re-organize code that implicitly enables LBR/PEBS

Make later patch more readable, no logic change.
Signed-off-by: NYan, Zheng <zheng.z.yan@intel.com>
Signed-off-by: NKan Liang <kan.liang@intel.com>
Signed-off-by: NPeter Zijlstra (Intel) <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: eranian@google.com
Cc: jolsa@redhat.com
Link: http://lkml.kernel.org/r/1415156173-10035-13-git-send-email-kan.liang@intel.comSigned-off-by: NIngo Molnar <mingo@kernel.org>

arch/x86/kernel/cpu/perf_event.c

@@ -399,12 +399,12 @@ int x86_pmu_hw_config(struct perf_event *event)
 
 		if (event->attr.precise_ip > precise)
 			return -EOPNOTSUPP;
+	}
 	/*
 	 * check that PEBS LBR correction does not conflict with
 	 * whatever the user is asking with attr->branch_sample_type
 	 */
-		if (event->attr.precise_ip > 1 &&
-		    x86_pmu.intel_cap.pebs_format < 2) {
+	if (event->attr.precise_ip > 1 && x86_pmu.intel_cap.pebs_format < 2) {
 		u64 *br_type = &event->attr.branch_sample_type;
 
 		if (has_branch_stack(event)) {
@@ -430,7 +430,6 @@ int x86_pmu_hw_config(struct perf_event *event)
 				*br_type |= PERF_SAMPLE_BRANCH_KERNEL;
 		}
 	}
-	}
 
 	if (event->attr.branch_sample_type & PERF_SAMPLE_BRANCH_CALL_STACK)
 		event->attach_state |= PERF_ATTACH_TASK_DATA;