提交 4b009f70 编写于 作者: Y Yuan Can 提交者: Zheng Zengkai

iommu/arm-smmu-v3: Add suspend and resume support

ascend inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I4K2U5
CVE: NA

-------------------------------------------------------

Add suspend and resume support for smmuv3. The smmu is
stopped when suspending and started when resuming.
Signed-off-by: NYuan Can <yuancan@huawei.com>
Reviewed-by: NHanjun Guo <guohanjun@huawei.com>
Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
上级 095f0f1b
......@@ -4732,6 +4732,13 @@ static void arm_smmu_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg)
doorbell = (((u64)msg->address_hi) << 32) | msg->address_lo;
doorbell &= MSI_CFG0_ADDR_MASK;
#ifdef CONFIG_PM_SLEEP
/* Saves the msg (base addr of msi irq) and restores it during resume */
desc->msg.address_lo = msg->address_lo;
desc->msg.address_hi = msg->address_hi;
desc->msg.data = msg->data;
#endif
writeq_relaxed(doorbell, smmu->base + cfg[0]);
writel_relaxed(msg->data, smmu->base + cfg[1]);
writel_relaxed(ARM_SMMU_MEMATTR_DEVICE_nGnRE, smmu->base + cfg[2]);
......@@ -4787,11 +4794,51 @@ static void arm_smmu_setup_msis(struct arm_smmu_device *smmu)
devm_add_action(dev, arm_smmu_free_msis, dev);
}
static void arm_smmu_setup_unique_irqs(struct arm_smmu_device *smmu)
#ifdef CONFIG_PM_SLEEP
static void arm_smmu_resume_msis(struct arm_smmu_device *smmu)
{
struct msi_desc *desc;
struct device *dev = smmu->dev;
for_each_msi_entry(desc, dev) {
switch (desc->platform.msi_index) {
case EVTQ_MSI_INDEX:
case GERROR_MSI_INDEX:
case PRIQ_MSI_INDEX: {
phys_addr_t *cfg = arm_smmu_msi_cfg[desc->platform.msi_index];
struct msi_msg *msg = &desc->msg;
phys_addr_t doorbell = (((u64)msg->address_hi) << 32) | msg->address_lo;
doorbell &= MSI_CFG0_ADDR_MASK;
writeq_relaxed(doorbell, smmu->base + cfg[0]);
writel_relaxed(msg->data, smmu->base + cfg[1]);
writel_relaxed(ARM_SMMU_MEMATTR_DEVICE_nGnRE,
smmu->base + cfg[2]);
break;
}
default:
continue;
}
}
}
#else
static void arm_smmu_resume_msis(struct arm_smmu_device *smmu)
{
}
#endif
static void arm_smmu_setup_unique_irqs(struct arm_smmu_device *smmu, bool resume)
{
int irq, ret;
if (!resume)
arm_smmu_setup_msis(smmu);
else {
/* The irq doesn't need to be re-requested during resume */
arm_smmu_resume_msis(smmu);
return;
}
/* Request interrupt lines */
irq = smmu->evtq.q.irq;
......@@ -4833,7 +4880,7 @@ static void arm_smmu_setup_unique_irqs(struct arm_smmu_device *smmu)
}
}
static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu, bool resume)
{
int ret, irq;
u32 irqen_flags = IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN;
......@@ -4860,7 +4907,7 @@ static int arm_smmu_setup_irqs(struct arm_smmu_device *smmu)
if (ret < 0)
dev_warn(smmu->dev, "failed to enable combined irq\n");
} else
arm_smmu_setup_unique_irqs(smmu);
arm_smmu_setup_unique_irqs(smmu, resume);
if (smmu->features & ARM_SMMU_FEAT_PRI)
irqen_flags |= IRQ_CTRL_PRIQ_IRQEN;
......@@ -4885,7 +4932,7 @@ static int arm_smmu_device_disable(struct arm_smmu_device *smmu)
return ret;
}
static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool bypass)
static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool resume)
{
int i;
int ret;
......@@ -5019,7 +5066,7 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool bypass)
}
}
ret = arm_smmu_setup_irqs(smmu);
ret = arm_smmu_setup_irqs(smmu, resume);
if (ret) {
dev_err(smmu->dev, "failed to setup irqs\n");
return ret;
......@@ -5029,7 +5076,7 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu, bool bypass)
enables &= ~(CR0_EVTQEN | CR0_PRIQEN);
/* Enable the SMMU interface, or ensure bypass */
if (!bypass || disable_bypass) {
if (!smmu->bypass || disable_bypass) {
enables |= CR0_SMMUEN;
} else {
ret = arm_smmu_update_gbpa(smmu, 0, GBPA_ABORT);
......@@ -5645,6 +5692,26 @@ static void __iomem *arm_smmu_ioremap(struct device *dev, resource_size_t start,
return devm_ioremap_resource(dev, &res);
}
#ifdef CONFIG_PM_SLEEP
static int arm_smmu_suspend(struct device *dev)
{
/*
* The smmu is powered off and related registers are automatically
* cleared when suspend. No need to do anything.
*/
return 0;
}
static int arm_smmu_resume(struct device *dev)
{
struct arm_smmu_device *smmu = dev_get_drvdata(dev);
arm_smmu_device_reset(smmu, true);
return 0;
}
#endif
static int arm_smmu_device_probe(struct platform_device *pdev)
{
int irq, ret;
......@@ -5652,7 +5719,6 @@ static int arm_smmu_device_probe(struct platform_device *pdev)
resource_size_t ioaddr;
struct arm_smmu_device *smmu;
struct device *dev = &pdev->dev;
bool bypass;
smmu = devm_kzalloc(dev, sizeof(*smmu), GFP_KERNEL);
if (!smmu) {
......@@ -5670,7 +5736,7 @@ static int arm_smmu_device_probe(struct platform_device *pdev)
}
/* Set bypass mode according to firmware probing result */
bypass = !!ret;
smmu->bypass = !!ret;
/* Base address */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
......@@ -5729,7 +5795,7 @@ static int arm_smmu_device_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, smmu);
/* Reset the device */
ret = arm_smmu_device_reset(smmu, bypass);
ret = arm_smmu_device_reset(smmu, false);
if (ret)
return ret;
......@@ -5776,6 +5842,16 @@ static const struct of_device_id arm_smmu_of_match[] = {
};
MODULE_DEVICE_TABLE(of, arm_smmu_of_match);
#ifdef CONFIG_PM_SLEEP
static const struct dev_pm_ops arm_smmu_pm_ops = {
.suspend = arm_smmu_suspend,
.resume = arm_smmu_resume,
};
#define ARM_SMMU_PM_OPS (&arm_smmu_pm_ops)
#else
#define ARM_SMMU_PM_OPS NULL
#endif
static void arm_smmu_driver_unregister(struct platform_driver *drv)
{
arm_smmu_sva_notifier_synchronize();
......@@ -5787,6 +5863,7 @@ static struct platform_driver arm_smmu_driver = {
.name = "arm-smmu-v3",
.of_match_table = arm_smmu_of_match,
.suppress_bind_attrs = true,
.pm = ARM_SMMU_PM_OPS,
},
.probe = arm_smmu_device_probe,
.remove = arm_smmu_device_remove,
......
......@@ -761,6 +761,8 @@ struct arm_smmu_device {
unsigned int mpam_partid_max;
unsigned int mpam_pmg_max;
bool bypass;
};
struct arm_smmu_stream {
......
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