Skip to content

K
Kernel

openeuler / Kernel
1 年多 前同步成功

通知 8
Star 0
Fork 0
K
Kernel
提交 48d9356e 编写于 作者: M Martyn Welch 提交者： Greg Kroah-Hartman
浏览文件
操作

Staging: vme: Use dev_err rather than printk 

Replace instances of printk with dev_err where possible.
Signed-off-by: NMartyn Welch <martyn.welch@ge.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
上级 ebbfda1e
显示空白变更内容
内联 并排
Showing with 171 addition and 126 deletion
drivers/staging/vme/bridges/vme_ca91cx42.c
浏览文件 @ 48d9356e
...@@ -94,31 +94,35 @@ static u32 ca91cx42_IACK_irqhandler(struct ca91cx42_driver *bridge) ...@@ -94,31 +94,35 @@ static u32 ca91cx42_IACK_irqhandler(struct ca91cx42_driver *bridge)
return CA91CX42_LINT_SW_IACK; return CA91CX42_LINT_SW_IACK;
} }
static u32 ca91cx42_VERR_irqhandler(struct ca91cx42_driver *bridge) static u32 ca91cx42_VERR_irqhandler(struct vme_bridge *ca91cx42_bridge)
{ {
int val; int val;
struct ca91cx42_driver *bridge;
bridge = ca91cx42_bridge->driver_priv;
val = ioread32(bridge->base + DGCS); val = ioread32(bridge->base + DGCS);
if (!(val & 0x00000800)) { if (!(val & 0x00000800)) {
printk(KERN_ERR "ca91c042: ca91cx42_VERR_irqhandler DMA Read " dev_err(ca91cx42_bridge->parent, "ca91cx42_VERR_irqhandler DMA "
"Error DGCS=%08X\n", val); "Read Error DGCS=%08X\n", val);
} }
return CA91CX42_LINT_VERR; return CA91CX42_LINT_VERR;
} }
static u32 ca91cx42_LERR_irqhandler(struct ca91cx42_driver *bridge) static u32 ca91cx42_LERR_irqhandler(struct vme_bridge *ca91cx42_bridge)
{ {
int val; int val;
struct ca91cx42_driver *bridge;
val = ioread32(bridge->base + DGCS); bridge = ca91cx42_bridge->driver_priv;
if (!(val & 0x00000800)) { val = ioread32(bridge->base + DGCS);
printk(KERN_ERR "ca91c042: ca91cx42_LERR_irqhandler DMA Read "
"Error DGCS=%08X\n", val);
} if (!(val & 0x00000800))
dev_err(ca91cx42_bridge->parent, "ca91cx42_LERR_irqhandler DMA "
"Read Error DGCS=%08X\n", val);
return CA91CX42_LINT_LERR; return CA91CX42_LINT_LERR;
} }
...@@ -176,9 +180,9 @@ static irqreturn_t ca91cx42_irqhandler(int irq, void *ptr) ...@@ -176,9 +180,9 @@ static irqreturn_t ca91cx42_irqhandler(int irq, void *ptr)
if (stat & CA91CX42_LINT_SW_IACK) if (stat & CA91CX42_LINT_SW_IACK)
serviced |= ca91cx42_IACK_irqhandler(bridge); serviced |= ca91cx42_IACK_irqhandler(bridge);
if (stat & CA91CX42_LINT_VERR) if (stat & CA91CX42_LINT_VERR)
serviced |= ca91cx42_VERR_irqhandler(bridge); serviced |= ca91cx42_VERR_irqhandler(ca91cx42_bridge);
if (stat & CA91CX42_LINT_LERR) if (stat & CA91CX42_LINT_LERR)
serviced |= ca91cx42_LERR_irqhandler(bridge); serviced |= ca91cx42_LERR_irqhandler(ca91cx42_bridge);
if (stat & (CA91CX42_LINT_VIRQ1 | CA91CX42_LINT_VIRQ2 | if (stat & (CA91CX42_LINT_VIRQ1 | CA91CX42_LINT_VIRQ2 |
CA91CX42_LINT_VIRQ3 | CA91CX42_LINT_VIRQ4 | CA91CX42_LINT_VIRQ3 | CA91CX42_LINT_VIRQ4 |
CA91CX42_LINT_VIRQ5 | CA91CX42_LINT_VIRQ6 | CA91CX42_LINT_VIRQ5 | CA91CX42_LINT_VIRQ6 |
...@@ -326,9 +330,12 @@ int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled, ...@@ -326,9 +330,12 @@ int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled,
unsigned int i, addr = 0, granularity; unsigned int i, addr = 0, granularity;
unsigned int temp_ctl = 0; unsigned int temp_ctl = 0;
unsigned int vme_bound, pci_offset; unsigned int vme_bound, pci_offset;
struct vme_bridge *ca91cx42_bridge;
struct ca91cx42_driver *bridge; struct ca91cx42_driver *bridge;
bridge = image->parent->driver_priv; ca91cx42_bridge = image->parent;
bridge = ca91cx42_bridge->driver_priv;
i = image->number; i = image->number;
...@@ -353,7 +360,7 @@ int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled, ...@@ -353,7 +360,7 @@ int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled,
case VME_USER3: case VME_USER3:
case VME_USER4: case VME_USER4:
default: default:
printk(KERN_ERR "Invalid address space\n"); dev_err(ca91cx42_bridge->parent, "Invalid address space\n");
return -EINVAL; return -EINVAL;
break; break;
} }
...@@ -371,15 +378,18 @@ int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled, ...@@ -371,15 +378,18 @@ int ca91cx42_slave_set(struct vme_slave_resource *image, int enabled,
granularity = 0x10000; granularity = 0x10000;
if (vme_base & (granularity - 1)) { if (vme_base & (granularity - 1)) {
printk(KERN_ERR "Invalid VME base alignment\n"); dev_err(ca91cx42_bridge->parent, "Invalid VME base "
"alignment\n");
return -EINVAL; return -EINVAL;
} }
if (vme_bound & (granularity - 1)) { if (vme_bound & (granularity - 1)) {
printk(KERN_ERR "Invalid VME bound alignment\n"); dev_err(ca91cx42_bridge->parent, "Invalid VME bound "
"alignment\n");
return -EINVAL; return -EINVAL;
} }
if (pci_offset & (granularity - 1)) { if (pci_offset & (granularity - 1)) {
printk(KERN_ERR "Invalid PCI Offset alignment\n"); dev_err(ca91cx42_bridge->parent, "Invalid PCI Offset "
"alignment\n");
return -EINVAL; return -EINVAL;
} }
...@@ -491,7 +501,7 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image, ...@@ -491,7 +501,7 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image,
/* Find pci_dev container of dev */ /* Find pci_dev container of dev */
if (ca91cx42_bridge->parent == NULL) { if (ca91cx42_bridge->parent == NULL) {
printk(KERN_ERR "Dev entry NULL\n"); dev_err(ca91cx42_bridge->parent, "Dev entry NULL\n");
return -EINVAL; return -EINVAL;
} }
pdev = container_of(ca91cx42_bridge->parent, struct pci_dev, dev); pdev = container_of(ca91cx42_bridge->parent, struct pci_dev, dev);
...@@ -515,8 +525,8 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image, ...@@ -515,8 +525,8 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image,
if (image->bus_resource.name == NULL) { if (image->bus_resource.name == NULL) {
image->bus_resource.name = kmalloc(VMENAMSIZ+3, GFP_KERNEL); image->bus_resource.name = kmalloc(VMENAMSIZ+3, GFP_KERNEL);
if (image->bus_resource.name == NULL) { if (image->bus_resource.name == NULL) {
printk(KERN_ERR "Unable to allocate memory for resource" dev_err(ca91cx42_bridge->parent, "Unable to allocate "
" name\n"); "memory for resource name\n");
retval = -ENOMEM; retval = -ENOMEM;
goto err_name; goto err_name;
} }
...@@ -533,8 +543,8 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image, ...@@ -533,8 +543,8 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image,
&(image->bus_resource), size, size, PCIBIOS_MIN_MEM, &(image->bus_resource), size, size, PCIBIOS_MIN_MEM,
0, NULL, NULL); 0, NULL, NULL);
if (retval) { if (retval) {
printk(KERN_ERR "Failed to allocate mem resource for " dev_err(ca91cx42_bridge->parent, "Failed to allocate mem "
"window %d size 0x%lx start 0x%lx\n", "resource for window %d size 0x%lx start 0x%lx\n",
image->number, (unsigned long)size, image->number, (unsigned long)size,
(unsigned long)image->bus_resource.start); (unsigned long)image->bus_resource.start);
goto err_resource; goto err_resource;
...@@ -543,7 +553,7 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image, ...@@ -543,7 +553,7 @@ static int ca91cx42_alloc_resource(struct vme_master_resource *image,
image->kern_base = ioremap_nocache( image->kern_base = ioremap_nocache(
image->bus_resource.start, size); image->bus_resource.start, size);
if (image->kern_base == NULL) { if (image->kern_base == NULL) {
printk(KERN_ERR "Failed to remap resource\n"); dev_err(ca91cx42_bridge->parent, "Failed to remap resource\n");
retval = -ENOMEM; retval = -ENOMEM;
goto err_remap; goto err_remap;
} }
...@@ -582,9 +592,12 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled, ...@@ -582,9 +592,12 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled,
unsigned int i, granularity = 0; unsigned int i, granularity = 0;
unsigned int temp_ctl = 0; unsigned int temp_ctl = 0;
unsigned long long pci_bound, vme_offset, pci_base; unsigned long long pci_bound, vme_offset, pci_base;
struct vme_bridge *ca91cx42_bridge;
struct ca91cx42_driver *bridge; struct ca91cx42_driver *bridge;
bridge = image->parent->driver_priv; ca91cx42_bridge = image->parent;
bridge = ca91cx42_bridge->driver_priv;
i = image->number; i = image->number;
...@@ -595,12 +608,14 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled, ...@@ -595,12 +608,14 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled,
/* Verify input data */ /* Verify input data */
if (vme_base & (granularity - 1)) { if (vme_base & (granularity - 1)) {
printk(KERN_ERR "Invalid VME Window alignment\n"); dev_err(ca91cx42_bridge->parent, "Invalid VME Window "
"alignment\n");
retval = -EINVAL; retval = -EINVAL;
goto err_window; goto err_window;
} }
if (size & (granularity - 1)) { if (size & (granularity - 1)) {
printk(KERN_ERR "Invalid VME Window alignment\n"); dev_err(ca91cx42_bridge->parent, "Invalid VME Window "
"alignment\n");
retval = -EINVAL; retval = -EINVAL;
goto err_window; goto err_window;
} }
...@@ -614,8 +629,8 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled, ...@@ -614,8 +629,8 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled,
retval = ca91cx42_alloc_resource(image, size); retval = ca91cx42_alloc_resource(image, size);
if (retval) { if (retval) {
spin_unlock(&(image->lock)); spin_unlock(&(image->lock));
printk(KERN_ERR "Unable to allocate memory for resource " dev_err(ca91cx42_bridge->parent, "Unable to allocate memory "
"name\n"); "for resource name\n");
retval = -ENOMEM; retval = -ENOMEM;
goto err_res; goto err_res;
} }
...@@ -658,7 +673,7 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled, ...@@ -658,7 +673,7 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled,
break; break;
default: default:
spin_unlock(&(image->lock)); spin_unlock(&(image->lock));
printk(KERN_ERR "Invalid data width\n"); dev_err(ca91cx42_bridge->parent, "Invalid data width\n");
retval = -EINVAL; retval = -EINVAL;
goto err_dwidth; goto err_dwidth;
break; break;
...@@ -690,7 +705,7 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled, ...@@ -690,7 +705,7 @@ int ca91cx42_master_set(struct vme_master_resource *image, int enabled,
case VME_USER4: case VME_USER4:
default: default:
spin_unlock(&(image->lock)); spin_unlock(&(image->lock));
printk(KERN_ERR "Invalid address space\n"); dev_err(ca91cx42_bridge->parent, "Invalid address space\n");
retval = -EINVAL; retval = -EINVAL;
goto err_aspace; goto err_aspace;
break; break;
...@@ -921,12 +936,15 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src, ...@@ -921,12 +936,15 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
struct vme_dma_vme *vme_attr; struct vme_dma_vme *vme_attr;
dma_addr_t desc_ptr; dma_addr_t desc_ptr;
int retval = 0; int retval = 0;
struct device *dev;
dev = list->parent->parent->parent;
/* XXX descriptor must be aligned on 64-bit boundaries */ /* XXX descriptor must be aligned on 64-bit boundaries */
entry = (struct ca91cx42_dma_entry *) entry = (struct ca91cx42_dma_entry *)
kmalloc(sizeof(struct ca91cx42_dma_entry), GFP_KERNEL); kmalloc(sizeof(struct ca91cx42_dma_entry), GFP_KERNEL);
if (entry == NULL) { if (entry == NULL) {
printk(KERN_ERR "Failed to allocate memory for dma resource " dev_err(dev, "Failed to allocate memory for dma resource "
"structure\n"); "structure\n");
retval = -ENOMEM; retval = -ENOMEM;
goto err_mem; goto err_mem;
...@@ -934,7 +952,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src, ...@@ -934,7 +952,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
/* Test descriptor alignment */ /* Test descriptor alignment */
if ((unsigned long)&(entry->descriptor) & CA91CX42_DCPP_M) { if ((unsigned long)&(entry->descriptor) & CA91CX42_DCPP_M) {
printk("Descriptor not aligned to 16 byte boundary as " dev_err(dev, "Descriptor not aligned to 16 byte boundary as "
"required: %p\n", &(entry->descriptor)); "required: %p\n", &(entry->descriptor));
retval = -EINVAL; retval = -EINVAL;
goto err_align; goto err_align;
...@@ -955,7 +973,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src, ...@@ -955,7 +973,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
if ((vme_attr->aspace & ~(VME_A16 | VME_A24 | VME_A32 | VME_USER1 | if ((vme_attr->aspace & ~(VME_A16 | VME_A24 | VME_A32 | VME_USER1 |
VME_USER2)) != 0) { VME_USER2)) != 0) {
printk(KERN_ERR "Unsupported cycle type\n"); dev_err(dev, "Unsupported cycle type\n");
retval = -EINVAL; retval = -EINVAL;
goto err_aspace; goto err_aspace;
} }
...@@ -963,7 +981,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src, ...@@ -963,7 +981,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
if ((vme_attr->cycle & ~(VME_SCT | VME_BLT | VME_SUPER | VME_USER | if ((vme_attr->cycle & ~(VME_SCT | VME_BLT | VME_SUPER | VME_USER |
VME_PROG | VME_DATA)) != 0) { VME_PROG | VME_DATA)) != 0) {
printk(KERN_ERR "Unsupported cycle type\n"); dev_err(dev, "Unsupported cycle type\n");
retval = -EINVAL; retval = -EINVAL;
goto err_cycle; goto err_cycle;
} }
...@@ -972,7 +990,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src, ...@@ -972,7 +990,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
if (!(((src->type == VME_DMA_PCI) && (dest->type == VME_DMA_VME)) || if (!(((src->type == VME_DMA_PCI) && (dest->type == VME_DMA_VME)) ||
((src->type == VME_DMA_VME) && (dest->type == VME_DMA_PCI)))) { ((src->type == VME_DMA_VME) && (dest->type == VME_DMA_PCI)))) {
printk(KERN_ERR "Cannot perform transfer with this " dev_err(dev, "Cannot perform transfer with this "
"source-destination combination\n"); "source-destination combination\n");
retval = -EINVAL; retval = -EINVAL;
goto err_direct; goto err_direct;
...@@ -997,7 +1015,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src, ...@@ -997,7 +1015,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D64; entry->descriptor.dctl |= CA91CX42_DCTL_VDW_D64;
break; break;
default: default:
printk(KERN_ERR "Invalid data width\n"); dev_err(dev, "Invalid data width\n");
return -EINVAL; return -EINVAL;
} }
...@@ -1019,7 +1037,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src, ...@@ -1019,7 +1037,7 @@ int ca91cx42_dma_list_add(struct vme_dma_list *list, struct vme_dma_attr *src,
entry->descriptor.dctl |= CA91CX42_DCTL_VAS_USER2; entry->descriptor.dctl |= CA91CX42_DCTL_VAS_USER2;
break; break;
default: default:
printk(KERN_ERR "Invalid address space\n"); dev_err(dev, "Invalid address space\n");
return -EINVAL; return -EINVAL;
break; break;
} }
...@@ -1079,12 +1097,13 @@ int ca91cx42_dma_list_exec(struct vme_dma_list *list) ...@@ -1079,12 +1097,13 @@ int ca91cx42_dma_list_exec(struct vme_dma_list *list)
int retval = 0; int retval = 0;
dma_addr_t bus_addr; dma_addr_t bus_addr;
u32 val; u32 val;
struct device *dev;
struct ca91cx42_driver *bridge; struct ca91cx42_driver *bridge;
ctrlr = list->parent; ctrlr = list->parent;
bridge = ctrlr->parent->driver_priv; bridge = ctrlr->parent->driver_priv;
dev = ctrlr->parent->parent;
mutex_lock(&(ctrlr->mtx)); mutex_lock(&(ctrlr->mtx));
...@@ -1140,7 +1159,7 @@ int ca91cx42_dma_list_exec(struct vme_dma_list *list) ...@@ -1140,7 +1159,7 @@ int ca91cx42_dma_list_exec(struct vme_dma_list *list)
if (val & (CA91CX42_DGCS_LERR | CA91CX42_DGCS_VERR | if (val & (CA91CX42_DGCS_LERR | CA91CX42_DGCS_VERR |
CA91CX42_DGCS_PERR)) { CA91CX42_DGCS_PERR)) {
printk(KERN_ERR "ca91c042: DMA Error. DGCS=%08X\n", val); dev_err(dev, "ca91c042: DMA Error. DGCS=%08X\n", val);
val = ioread32(bridge->base + DCTL); val = ioread32(bridge->base + DCTL);
} }
......
drivers/staging/vme/bridges/vme_tsi148.c
浏览文件 @ 48d9356e
...@@ -137,16 +137,20 @@ static u32 tsi148_LM_irqhandler(struct tsi148_driver *bridge, u32 stat) ...@@ -137,16 +137,20 @@ static u32 tsi148_LM_irqhandler(struct tsi148_driver *bridge, u32 stat)
* *
* XXX This functionality is not exposed up though API. * XXX This functionality is not exposed up though API.
*/ */
static u32 tsi148_MB_irqhandler(struct tsi148_driver *bridge, u32 stat) static u32 tsi148_MB_irqhandler(struct vme_bridge *tsi148_bridge, u32 stat)
{ {
int i; int i;
u32 val; u32 val;
u32 serviced = 0; u32 serviced = 0;
struct tsi148_driver *bridge;
bridge = tsi148_bridge->driver_priv;
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
if(stat & TSI148_LCSR_INTS_MBS[i]) { if(stat & TSI148_LCSR_INTS_MBS[i]) {
val = ioread32be(bridge->base + TSI148_GCSR_MBOX[i]); val = ioread32be(bridge->base + TSI148_GCSR_MBOX[i]);
printk("VME Mailbox %d received: 0x%x\n", i, val); dev_err(tsi148_bridge->parent, "VME Mailbox %d received"
": 0x%x\n", i, val);
serviced |= TSI148_LCSR_INTC_MBC[i]; serviced |= TSI148_LCSR_INTC_MBC[i];
} }
} }
...@@ -157,19 +161,22 @@ static u32 tsi148_MB_irqhandler(struct tsi148_driver *bridge, u32 stat) ...@@ -157,19 +161,22 @@ static u32 tsi148_MB_irqhandler(struct tsi148_driver *bridge, u32 stat)
/* /*
* Display error & status message when PERR (PCI) exception interrupt occurs. * Display error & status message when PERR (PCI) exception interrupt occurs.
*/ */
static u32 tsi148_PERR_irqhandler(struct tsi148_driver *bridge) static u32 tsi148_PERR_irqhandler(struct vme_bridge *tsi148_bridge)
{ {
printk(KERN_ERR struct tsi148_driver *bridge;
"PCI Exception at address: 0x%08x:%08x, attributes: %08x\n",
bridge = tsi148_bridge->driver_priv;
dev_err(tsi148_bridge->parent, "PCI Exception at address: 0x%08x:%08x, "
"attributes: %08x\n",
ioread32be(bridge->base + TSI148_LCSR_EDPAU), ioread32be(bridge->base + TSI148_LCSR_EDPAU),
ioread32be(bridge->base + TSI148_LCSR_EDPAL), ioread32be(bridge->base + TSI148_LCSR_EDPAL),
ioread32be(bridge->base + TSI148_LCSR_EDPAT) ioread32be(bridge->base + TSI148_LCSR_EDPAT));
);
printk(KERN_ERR dev_err(tsi148_bridge->parent, "PCI-X attribute reg: %08x, PCI-X split "
"PCI-X attribute reg: %08x, PCI-X split completion reg: %08x\n", "completion reg: %08x\n",
ioread32be(bridge->base + TSI148_LCSR_EDPXA), ioread32be(bridge->base + TSI148_LCSR_EDPXA),
ioread32be(bridge->base + TSI148_LCSR_EDPXS) ioread32be(bridge->base + TSI148_LCSR_EDPXS));
);
iowrite32be(TSI148_LCSR_EDPAT_EDPCL, bridge->base + TSI148_LCSR_EDPAT); iowrite32be(TSI148_LCSR_EDPAT_EDPCL, bridge->base + TSI148_LCSR_EDPAT);
...@@ -197,7 +204,8 @@ static u32 tsi148_VERR_irqhandler(struct vme_bridge *tsi148_bridge) ...@@ -197,7 +204,8 @@ static u32 tsi148_VERR_irqhandler(struct vme_bridge *tsi148_bridge)
/* Check for exception register overflow (we have lost error data) */ /* Check for exception register overflow (we have lost error data) */
if(error_attrib & TSI148_LCSR_VEAT_VEOF) { if(error_attrib & TSI148_LCSR_VEAT_VEOF) {
printk(KERN_ERR "VME Bus Exception Overflow Occurred\n"); dev_err(tsi148_bridge->parent, "VME Bus Exception Overflow "
"Occurred\n");
} }
error = (struct vme_bus_error *)kmalloc(sizeof (struct vme_bus_error), error = (struct vme_bus_error *)kmalloc(sizeof (struct vme_bus_error),
...@@ -207,11 +215,10 @@ static u32 tsi148_VERR_irqhandler(struct vme_bridge *tsi148_bridge) ...@@ -207,11 +215,10 @@ static u32 tsi148_VERR_irqhandler(struct vme_bridge *tsi148_bridge)
error->attributes = error_attrib; error->attributes = error_attrib;
list_add_tail(&(error->list), &(tsi148_bridge->vme_errors)); list_add_tail(&(error->list), &(tsi148_bridge->vme_errors));
} else { } else {
printk(KERN_ERR dev_err(tsi148_bridge->parent, "Unable to alloc memory for "
"Unable to alloc memory for VMEbus Error reporting\n"); "VMEbus Error reporting\n");
printk(KERN_ERR dev_err(tsi148_bridge->parent, "VME Bus Error at address: "
"VME Bus Error at address: 0x%llx, attributes: %08x\n", "0x%llx, attributes: %08x\n", error_addr, error_attrib);
error_addr, error_attrib);
} }
/* Clear Status */ /* Clear Status */
...@@ -298,11 +305,11 @@ static irqreturn_t tsi148_irqhandler(int irq, void *ptr) ...@@ -298,11 +305,11 @@ static irqreturn_t tsi148_irqhandler(int irq, void *ptr)
/* Mail box irqs */ /* Mail box irqs */
if (stat & (TSI148_LCSR_INTS_MB3S | TSI148_LCSR_INTS_MB2S | if (stat & (TSI148_LCSR_INTS_MB3S | TSI148_LCSR_INTS_MB2S |
TSI148_LCSR_INTS_MB1S | TSI148_LCSR_INTS_MB0S)) TSI148_LCSR_INTS_MB1S | TSI148_LCSR_INTS_MB0S))
serviced |= tsi148_MB_irqhandler(bridge, stat); serviced |= tsi148_MB_irqhandler(tsi148_bridge, stat);
/* PCI bus error */ /* PCI bus error */
if (stat & TSI148_LCSR_INTS_PERRS) if (stat & TSI148_LCSR_INTS_PERRS)
serviced |= tsi148_PERR_irqhandler(bridge); serviced |= tsi148_PERR_irqhandler(tsi148_bridge);
/* VME bus error */ /* VME bus error */
if (stat & TSI148_LCSR_INTS_VERRS) if (stat & TSI148_LCSR_INTS_VERRS)
...@@ -346,8 +353,8 @@ static int tsi148_irq_init(struct vme_bridge *tsi148_bridge) ...@@ -346,8 +353,8 @@ static int tsi148_irq_init(struct vme_bridge *tsi148_bridge)
IRQF_SHARED, IRQF_SHARED,
driver_name, tsi148_bridge); driver_name, tsi148_bridge);
if (result) { if (result) {
dev_err(&pdev->dev, "Can't get assigned pci irq vector %02X\n", dev_err(tsi148_bridge->parent, "Can't get assigned pci irq "
pdev->irq); "vector %02X\n", pdev->irq);
return result; return result;
} }
...@@ -568,9 +575,11 @@ int tsi148_slave_set(struct vme_slave_resource *image, int enabled, ...@@ -568,9 +575,11 @@ int tsi148_slave_set(struct vme_slave_resource *image, int enabled,
unsigned int vme_bound_low, vme_bound_high; unsigned int vme_bound_low, vme_bound_high;
unsigned int pci_offset_low, pci_offset_high; unsigned int pci_offset_low, pci_offset_high;
unsigned long long vme_bound, pci_offset; unsigned long long vme_bound, pci_offset;
struct vme_bridge *tsi148_bridge;
struct tsi148_driver *bridge; struct tsi148_driver *bridge;
bridge = image->parent->driver_priv; tsi148_bridge = image->parent;
bridge = tsi148_bridge->driver_priv;
i = image->number; i = image->number;
...@@ -597,7 +606,7 @@ int tsi148_slave_set(struct vme_slave_resource *image, int enabled, ...@@ -597,7 +606,7 @@ int tsi148_slave_set(struct vme_slave_resource *image, int enabled,
case VME_USER3: case VME_USER3:
case VME_USER4: case VME_USER4:
default: default:
printk("Invalid address space\n"); dev_err(tsi148_bridge->parent, "Invalid address space\n");
return -EINVAL; return -EINVAL;
break; break;
} }
...@@ -615,15 +624,16 @@ int tsi148_slave_set(struct vme_slave_resource *image, int enabled, ...@@ -615,15 +624,16 @@ int tsi148_slave_set(struct vme_slave_resource *image, int enabled,
reg_split(pci_offset, &pci_offset_high, &pci_offset_low); reg_split(pci_offset, &pci_offset_high, &pci_offset_low);
if (vme_base_low & (granularity - 1)) { if (vme_base_low & (granularity - 1)) {
printk("Invalid VME base alignment\n"); dev_err(tsi148_bridge->parent, "Invalid VME base alignment\n");
return -EINVAL; return -EINVAL;
} }
if (vme_bound_low & (granularity - 1)) { if (vme_bound_low & (granularity - 1)) {
printk("Invalid VME bound alignment\n"); dev_err(tsi148_bridge->parent, "Invalid VME bound alignment\n");
return -EINVAL; return -EINVAL;
} }
if (pci_offset_low & (granularity - 1)) { if (pci_offset_low & (granularity - 1)) {
printk("Invalid PCI Offset alignment\n"); dev_err(tsi148_bridge->parent, "Invalid PCI Offset "
"alignment\n");
return -EINVAL; return -EINVAL;
} }
...@@ -815,11 +825,6 @@ static int tsi148_alloc_resource(struct vme_master_resource *image, ...@@ -815,11 +825,6 @@ static int tsi148_alloc_resource(struct vme_master_resource *image,
tsi148_bridge = image->parent; tsi148_bridge = image->parent;
/* Find pci_dev container of dev */
if (tsi148_bridge->parent == NULL) {
printk("Dev entry NULL\n");
return -EINVAL;
}
pdev = container_of(tsi148_bridge->parent, struct pci_dev, dev); pdev = container_of(tsi148_bridge->parent, struct pci_dev, dev);
existing_size = (unsigned long long)(image->bus_resource.end - existing_size = (unsigned long long)(image->bus_resource.end -
...@@ -846,8 +851,8 @@ static int tsi148_alloc_resource(struct vme_master_resource *image, ...@@ -846,8 +851,8 @@ static int tsi148_alloc_resource(struct vme_master_resource *image,
if (image->bus_resource.name == NULL) { if (image->bus_resource.name == NULL) {
image->bus_resource.name = kmalloc(VMENAMSIZ+3, GFP_KERNEL); image->bus_resource.name = kmalloc(VMENAMSIZ+3, GFP_KERNEL);
if (image->bus_resource.name == NULL) { if (image->bus_resource.name == NULL) {
printk(KERN_ERR "Unable to allocate memory for resource" dev_err(tsi148_bridge->parent, "Unable to allocate "
" name\n"); "memory for resource name\n");
retval = -ENOMEM; retval = -ENOMEM;
goto err_name; goto err_name;
} }
...@@ -864,8 +869,8 @@ static int tsi148_alloc_resource(struct vme_master_resource *image, ...@@ -864,8 +869,8 @@ static int tsi148_alloc_resource(struct vme_master_resource *image,
&(image->bus_resource), size, size, PCIBIOS_MIN_MEM, &(image->bus_resource), size, size, PCIBIOS_MIN_MEM,
0, NULL, NULL); 0, NULL, NULL);
if (retval) { if (retval) {
printk(KERN_ERR "Failed to allocate mem resource for " dev_err(tsi148_bridge->parent, "Failed to allocate mem "
"window %d size 0x%lx start 0x%lx\n", "resource for window %d size 0x%lx start 0x%lx\n",
image->number, (unsigned long)size, image->number, (unsigned long)size,
(unsigned long)image->bus_resource.start); (unsigned long)image->bus_resource.start);
goto err_resource; goto err_resource;
...@@ -874,7 +879,7 @@ static int tsi148_alloc_resource(struct vme_master_resource *image, ...@@ -874,7 +879,7 @@ static int tsi148_alloc_resource(struct vme_master_resource *image,
image->kern_base = ioremap_nocache( image->kern_base = ioremap_nocache(
image->bus_resource.start, size); image->bus_resource.start, size);
if (image->kern_base == NULL) { if (image->kern_base == NULL) {
printk(KERN_ERR "Failed to remap resource\n"); dev_err(tsi148_bridge->parent, "Failed to remap resource\n");
retval = -ENOMEM; retval = -ENOMEM;
goto err_remap; goto err_remap;
} }
...@@ -918,19 +923,24 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled, ...@@ -918,19 +923,24 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled,
unsigned int pci_bound_low, pci_bound_high; unsigned int pci_bound_low, pci_bound_high;
unsigned int vme_offset_low, vme_offset_high; unsigned int vme_offset_low, vme_offset_high;
unsigned long long pci_bound, vme_offset, pci_base; unsigned long long pci_bound, vme_offset, pci_base;
struct vme_bridge *tsi148_bridge;
struct tsi148_driver *bridge; struct tsi148_driver *bridge;
bridge = image->parent->driver_priv; tsi148_bridge = image->parent;
bridge = tsi148_bridge->driver_priv;
/* Verify input data */ /* Verify input data */
if (vme_base & 0xFFFF) { if (vme_base & 0xFFFF) {
printk(KERN_ERR "Invalid VME Window alignment\n"); dev_err(tsi148_bridge->parent, "Invalid VME Window "
"alignment\n");
retval = -EINVAL; retval = -EINVAL;
goto err_window; goto err_window;
} }
if ((size == 0) && (enabled != 0)) { if ((size == 0) && (enabled != 0)) {
printk(KERN_ERR "Size must be non-zero for enabled windows\n"); dev_err(tsi148_bridge->parent, "Size must be non-zero for "
"enabled windows\n");
retval = -EINVAL; retval = -EINVAL;
goto err_window; goto err_window;
} }
...@@ -944,7 +954,7 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled, ...@@ -944,7 +954,7 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled,
retval = tsi148_alloc_resource(image, size); retval = tsi148_alloc_resource(image, size);
if (retval) { if (retval) {
spin_unlock(&(image->lock)); spin_unlock(&(image->lock));
printk(KERN_ERR "Unable to allocate memory for " dev_err(tsi148_bridge->parent, "Unable to allocate memory for "
"resource\n"); "resource\n");
goto err_res; goto err_res;
} }
...@@ -971,19 +981,20 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled, ...@@ -971,19 +981,20 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled,
if (pci_base_low & 0xFFFF) { if (pci_base_low & 0xFFFF) {
spin_unlock(&(image->lock)); spin_unlock(&(image->lock));
printk(KERN_ERR "Invalid PCI base alignment\n"); dev_err(tsi148_bridge->parent, "Invalid PCI base alignment\n");
retval = -EINVAL; retval = -EINVAL;
goto err_gran; goto err_gran;
} }
if (pci_bound_low & 0xFFFF) { if (pci_bound_low & 0xFFFF) {
spin_unlock(&(image->lock)); spin_unlock(&(image->lock));
printk(KERN_ERR "Invalid PCI bound alignment\n"); dev_err(tsi148_bridge->parent, "Invalid PCI bound alignment\n");
retval = -EINVAL; retval = -EINVAL;
goto err_gran; goto err_gran;
} }
if (vme_offset_low & 0xFFFF) { if (vme_offset_low & 0xFFFF) {
spin_unlock(&(image->lock)); spin_unlock(&(image->lock));
printk(KERN_ERR "Invalid VME Offset alignment\n"); dev_err(tsi148_bridge->parent, "Invalid VME Offset "
"alignment\n");
retval = -EINVAL; retval = -EINVAL;
goto err_gran; goto err_gran;
} }
...@@ -1029,8 +1040,8 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled, ...@@ -1029,8 +1040,8 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled,
temp_ctl |= TSI148_LCSR_OTAT_TM_2eSST; temp_ctl |= TSI148_LCSR_OTAT_TM_2eSST;
} }
if (cycle & VME_2eSSTB) { if (cycle & VME_2eSSTB) {
printk(KERN_WARNING "Currently not setting Broadcast Select " dev_warn(tsi148_bridge->parent, "Currently not setting "
"Registers\n"); "Broadcast Select Registers\n");
temp_ctl &= ~TSI148_LCSR_OTAT_TM_M; temp_ctl &= ~TSI148_LCSR_OTAT_TM_M;
temp_ctl |= TSI148_LCSR_OTAT_TM_2eSSTB; temp_ctl |= TSI148_LCSR_OTAT_TM_2eSSTB;
} }
...@@ -1046,7 +1057,7 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled, ...@@ -1046,7 +1057,7 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled,
break; break;
default: default:
spin_unlock(&(image->lock)); spin_unlock(&(image->lock));
printk(KERN_ERR "Invalid data width\n"); dev_err(tsi148_bridge->parent, "Invalid data width\n");
retval = -EINVAL; retval = -EINVAL;
goto err_dwidth; goto err_dwidth;
} }
...@@ -1083,7 +1094,7 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled, ...@@ -1083,7 +1094,7 @@ int tsi148_master_set( struct vme_master_resource *image, int enabled,
break; break;
default: default:
spin_unlock(&(image->lock)); spin_unlock(&(image->lock));
printk(KERN_ERR "Invalid address space\n"); dev_err(tsi148_bridge->parent, "Invalid address space\n");
retval = -EINVAL; retval = -EINVAL;
goto err_aspace; goto err_aspace;
break; break;
...@@ -1353,8 +1364,8 @@ ssize_t tsi148_master_write(struct vme_master_resource *image, void *buf, ...@@ -1353,8 +1364,8 @@ ssize_t tsi148_master_write(struct vme_master_resource *image, void *buf,
vme_err = tsi148_find_error(tsi148_bridge, aspace, vme_base + offset, vme_err = tsi148_find_error(tsi148_bridge, aspace, vme_base + offset,
count); count);
if(vme_err != NULL) { if(vme_err != NULL) {
printk("First VME write error detected an at address 0x%llx\n", dev_warn(tsi148_bridge->parent, "First VME write error detected"
vme_err->address); " an at address 0x%llx\n", vme_err->address);
retval = vme_err->address - (vme_base + offset); retval = vme_err->address - (vme_base + offset);
/* Clear down save errors in this address range */ /* Clear down save errors in this address range */
tsi148_clear_errors(tsi148_bridge, aspace, vme_base + offset, tsi148_clear_errors(tsi148_bridge, aspace, vme_base + offset,
...@@ -1428,8 +1439,8 @@ unsigned int tsi148_master_rmw(struct vme_master_resource *image, ...@@ -1428,8 +1439,8 @@ unsigned int tsi148_master_rmw(struct vme_master_resource *image,
return result; return result;
} }
static int tsi148_dma_set_vme_src_attributes (u32 *attr, vme_address_t aspace, static int tsi148_dma_set_vme_src_attributes(struct device *dev, u32 *attr,
vme_cycle_t cycle, vme_width_t dwidth) vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth)
{ {
/* Setup 2eSST speeds */ /* Setup 2eSST speeds */
switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) {
...@@ -1461,7 +1472,8 @@ static int tsi148_dma_set_vme_src_attributes (u32 *attr, vme_address_t aspace, ...@@ -1461,7 +1472,8 @@ static int tsi148_dma_set_vme_src_attributes (u32 *attr, vme_address_t aspace,
*attr |= TSI148_LCSR_DSAT_TM_2eSST; *attr |= TSI148_LCSR_DSAT_TM_2eSST;
} }
if (cycle & VME_2eSSTB) { if (cycle & VME_2eSSTB) {
printk("Currently not setting Broadcast Select Registers\n"); dev_err(dev, "Currently not setting Broadcast Select "
"Registers\n");
*attr |= TSI148_LCSR_DSAT_TM_2eSSTB; *attr |= TSI148_LCSR_DSAT_TM_2eSSTB;
} }
...@@ -1474,7 +1486,7 @@ static int tsi148_dma_set_vme_src_attributes (u32 *attr, vme_address_t aspace, ...@@ -1474,7 +1486,7 @@ static int tsi148_dma_set_vme_src_attributes (u32 *attr, vme_address_t aspace,
*attr |= TSI148_LCSR_DSAT_DBW_32; *attr |= TSI148_LCSR_DSAT_DBW_32;
break; break;
default: default:
printk("Invalid data width\n"); dev_err(dev, "Invalid data width\n");
return -EINVAL; return -EINVAL;
} }
...@@ -1508,7 +1520,7 @@ static int tsi148_dma_set_vme_src_attributes (u32 *attr, vme_address_t aspace, ...@@ -1508,7 +1520,7 @@ static int tsi148_dma_set_vme_src_attributes (u32 *attr, vme_address_t aspace,
*attr |= TSI148_LCSR_DSAT_AMODE_USER4; *attr |= TSI148_LCSR_DSAT_AMODE_USER4;
break; break;
default: default:
printk("Invalid address space\n"); dev_err(dev, "Invalid address space\n");
return -EINVAL; return -EINVAL;
break; break;
} }
...@@ -1521,8 +1533,8 @@ static int tsi148_dma_set_vme_src_attributes (u32 *attr, vme_address_t aspace, ...@@ -1521,8 +1533,8 @@ static int tsi148_dma_set_vme_src_attributes (u32 *attr, vme_address_t aspace,
return 0; return 0;
} }
static int tsi148_dma_set_vme_dest_attributes(u32 *attr, vme_address_t aspace, static int tsi148_dma_set_vme_dest_attributes(struct device *dev, u32 *attr,
vme_cycle_t cycle, vme_width_t dwidth) vme_address_t aspace, vme_cycle_t cycle, vme_width_t dwidth)
{ {
/* Setup 2eSST speeds */ /* Setup 2eSST speeds */
switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) { switch (cycle & (VME_2eSST160 | VME_2eSST267 | VME_2eSST320)) {
...@@ -1554,7 +1566,8 @@ static int tsi148_dma_set_vme_dest_attributes(u32 *attr, vme_address_t aspace, ...@@ -1554,7 +1566,8 @@ static int tsi148_dma_set_vme_dest_attributes(u32 *attr, vme_address_t aspace,
*attr |= TSI148_LCSR_DDAT_TM_2eSST; *attr |= TSI148_LCSR_DDAT_TM_2eSST;
} }
if (cycle & VME_2eSSTB) { if (cycle & VME_2eSSTB) {
printk("Currently not setting Broadcast Select Registers\n"); dev_err(dev, "Currently not setting Broadcast Select "
"Registers\n");
*attr |= TSI148_LCSR_DDAT_TM_2eSSTB; *attr |= TSI148_LCSR_DDAT_TM_2eSSTB;
} }
...@@ -1567,7 +1580,7 @@ static int tsi148_dma_set_vme_dest_attributes(u32 *attr, vme_address_t aspace, ...@@ -1567,7 +1580,7 @@ static int tsi148_dma_set_vme_dest_attributes(u32 *attr, vme_address_t aspace,
*attr |= TSI148_LCSR_DDAT_DBW_32; *attr |= TSI148_LCSR_DDAT_DBW_32;
break; break;
default: default:
printk("Invalid data width\n"); dev_err(dev, "Invalid data width\n");
return -EINVAL; return -EINVAL;
} }
...@@ -1601,7 +1614,7 @@ static int tsi148_dma_set_vme_dest_attributes(u32 *attr, vme_address_t aspace, ...@@ -1601,7 +1614,7 @@ static int tsi148_dma_set_vme_dest_attributes(u32 *attr, vme_address_t aspace,
*attr |= TSI148_LCSR_DDAT_AMODE_USER4; *attr |= TSI148_LCSR_DDAT_AMODE_USER4;
break; break;
default: default:
printk("Invalid address space\n"); dev_err(dev, "Invalid address space\n");
return -EINVAL; return -EINVAL;
break; break;
} }
...@@ -1627,21 +1640,25 @@ int tsi148_dma_list_add (struct vme_dma_list *list, struct vme_dma_attr *src, ...@@ -1627,21 +1640,25 @@ int tsi148_dma_list_add (struct vme_dma_list *list, struct vme_dma_attr *src,
struct vme_dma_vme *vme_attr; struct vme_dma_vme *vme_attr;
dma_addr_t desc_ptr; dma_addr_t desc_ptr;
int retval = 0; int retval = 0;
struct vme_bridge *tsi148_bridge;
tsi148_bridge = list->parent->parent;
/* Descriptor must be aligned on 64-bit boundaries */ /* Descriptor must be aligned on 64-bit boundaries */
entry = (struct tsi148_dma_entry *)kmalloc( entry = (struct tsi148_dma_entry *)kmalloc(
sizeof(struct tsi148_dma_entry), GFP_KERNEL); sizeof(struct tsi148_dma_entry), GFP_KERNEL);
if (entry == NULL) { if (entry == NULL) {
printk("Failed to allocate memory for dma resource " dev_err(tsi148_bridge->parent, "Failed to allocate memory for "
"structure\n"); "dma resource structure\n");
retval = -ENOMEM; retval = -ENOMEM;
goto err_mem; goto err_mem;
} }
/* Test descriptor alignment */ /* Test descriptor alignment */
if ((unsigned long)&(entry->descriptor) & 0x7) { if ((unsigned long)&(entry->descriptor) & 0x7) {
printk("Descriptor not aligned to 8 byte boundary as " dev_err(tsi148_bridge->parent, "Descriptor not aligned to 8 "
"required: %p\n", &(entry->descriptor)); "byte boundary as required: %p\n",
&(entry->descriptor));
retval = -EINVAL; retval = -EINVAL;
goto err_align; goto err_align;
} }
...@@ -1686,13 +1703,13 @@ int tsi148_dma_list_add (struct vme_dma_list *list, struct vme_dma_attr *src, ...@@ -1686,13 +1703,13 @@ int tsi148_dma_list_add (struct vme_dma_list *list, struct vme_dma_attr *src,
entry->descriptor.dsat = TSI148_LCSR_DSAT_TYP_VME; entry->descriptor.dsat = TSI148_LCSR_DSAT_TYP_VME;
retval = tsi148_dma_set_vme_src_attributes( retval = tsi148_dma_set_vme_src_attributes(
&(entry->descriptor.dsat), vme_attr->aspace, tsi148_bridge->parent, &(entry->descriptor.dsat),
vme_attr->cycle, vme_attr->dwidth); vme_attr->aspace, vme_attr->cycle, vme_attr->dwidth);
if(retval < 0 ) if(retval < 0 )
goto err_source; goto err_source;
break; break;
default: default:
printk("Invalid source type\n"); dev_err(tsi148_bridge->parent, "Invalid source type\n");
retval = -EINVAL; retval = -EINVAL;
goto err_source; goto err_source;
break; break;
...@@ -1724,13 +1741,13 @@ int tsi148_dma_list_add (struct vme_dma_list *list, struct vme_dma_attr *src, ...@@ -1724,13 +1741,13 @@ int tsi148_dma_list_add (struct vme_dma_list *list, struct vme_dma_attr *src,
entry->descriptor.ddat = TSI148_LCSR_DDAT_TYP_VME; entry->descriptor.ddat = TSI148_LCSR_DDAT_TYP_VME;
retval = tsi148_dma_set_vme_dest_attributes( retval = tsi148_dma_set_vme_dest_attributes(
&(entry->descriptor.ddat), vme_attr->aspace, tsi148_bridge->parent, &(entry->descriptor.ddat),
vme_attr->cycle, vme_attr->dwidth); vme_attr->aspace, vme_attr->cycle, vme_attr->dwidth);
if(retval < 0 ) if(retval < 0 )
goto err_dest; goto err_dest;
break; break;
default: default:
printk("Invalid destination type\n"); dev_err(tsi148_bridge->parent, "Invalid destination type\n");
retval = -EINVAL; retval = -EINVAL;
goto err_dest; goto err_dest;
break; break;
...@@ -1795,11 +1812,14 @@ int tsi148_dma_list_exec(struct vme_dma_list *list) ...@@ -1795,11 +1812,14 @@ int tsi148_dma_list_exec(struct vme_dma_list *list)
dma_addr_t bus_addr; dma_addr_t bus_addr;
u32 bus_addr_high, bus_addr_low; u32 bus_addr_high, bus_addr_low;
u32 val, dctlreg = 0; u32 val, dctlreg = 0;
struct vme_bridge *tsi148_bridge;
struct tsi148_driver *bridge; struct tsi148_driver *bridge;
ctrlr = list->parent; ctrlr = list->parent;
bridge = ctrlr->parent->driver_priv; tsi148_bridge = ctrlr->parent;
bridge = tsi148_bridge->driver_priv;
mutex_lock(&(ctrlr->mtx)); mutex_lock(&(ctrlr->mtx));
...@@ -1847,7 +1867,7 @@ int tsi148_dma_list_exec(struct vme_dma_list *list) ...@@ -1847,7 +1867,7 @@ int tsi148_dma_list_exec(struct vme_dma_list *list)
TSI148_LCSR_OFFSET_DSTA); TSI148_LCSR_OFFSET_DSTA);
if (val & TSI148_LCSR_DSTA_VBE) { if (val & TSI148_LCSR_DSTA_VBE) {
printk(KERN_ERR "tsi148: DMA Error. DSTA=%08X\n", val); dev_err(tsi148_bridge->parent, "DMA Error. DSTA=%08X\n", val);
retval = -EIO; retval = -EIO;
} }
...@@ -1891,9 +1911,12 @@ int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, ...@@ -1891,9 +1911,12 @@ int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base,
{ {
u32 lm_base_high, lm_base_low, lm_ctl = 0; u32 lm_base_high, lm_base_low, lm_ctl = 0;
int i; int i;
struct vme_bridge *tsi148_bridge;
struct tsi148_driver *bridge; struct tsi148_driver *bridge;
bridge = lm->parent->driver_priv; tsi148_bridge = lm->parent;
bridge = tsi148_bridge->driver_priv;
mutex_lock(&(lm->mtx)); mutex_lock(&(lm->mtx));
...@@ -1901,8 +1924,8 @@ int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, ...@@ -1901,8 +1924,8 @@ int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base,
for (i = 0; i < lm->monitors; i++) { for (i = 0; i < lm->monitors; i++) {
if (bridge->lm_callback[i] != NULL) { if (bridge->lm_callback[i] != NULL) {
mutex_unlock(&(lm->mtx)); mutex_unlock(&(lm->mtx));
printk("Location monitor callback attached, can't " dev_err(tsi148_bridge->parent, "Location monitor "
"reset\n"); "callback attached, can't reset\n");
return -EBUSY; return -EBUSY;
} }
} }
...@@ -1922,7 +1945,7 @@ int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base, ...@@ -1922,7 +1945,7 @@ int tsi148_lm_set(struct vme_lm_resource *lm, unsigned long long lm_base,
break; break;
default: default:
mutex_unlock(&(lm->mtx)); mutex_unlock(&(lm->mtx));
printk("Invalid address space\n"); dev_err(tsi148_bridge->parent, "Invalid address space\n");
return -EINVAL; return -EINVAL;
break; break;
} }
...@@ -2005,9 +2028,12 @@ int tsi148_lm_attach(struct vme_lm_resource *lm, int monitor, ...@@ -2005,9 +2028,12 @@ int tsi148_lm_attach(struct vme_lm_resource *lm, int monitor,
void (*callback)(int)) void (*callback)(int))
{ {
u32 lm_ctl, tmp; u32 lm_ctl, tmp;
struct vme_bridge *tsi148_bridge;
struct tsi148_driver *bridge; struct tsi148_driver *bridge;
bridge = lm->parent->driver_priv; tsi148_bridge = lm->parent;
bridge = tsi148_bridge->driver_priv;
mutex_lock(&(lm->mtx)); mutex_lock(&(lm->mtx));
...@@ -2015,14 +2041,15 @@ int tsi148_lm_attach(struct vme_lm_resource *lm, int monitor, ...@@ -2015,14 +2041,15 @@ int tsi148_lm_attach(struct vme_lm_resource *lm, int monitor,
lm_ctl = ioread32be(bridge->base + TSI148_LCSR_LMAT); lm_ctl = ioread32be(bridge->base + TSI148_LCSR_LMAT);
if ((lm_ctl & (TSI148_LCSR_LMAT_PGM | TSI148_LCSR_LMAT_DATA)) == 0) { if ((lm_ctl & (TSI148_LCSR_LMAT_PGM | TSI148_LCSR_LMAT_DATA)) == 0) {
mutex_unlock(&(lm->mtx)); mutex_unlock(&(lm->mtx));
printk("Location monitor not properly configured\n"); dev_err(tsi148_bridge->parent, "Location monitor not properly "
"configured\n");
return -EINVAL; return -EINVAL;
} }
/* Check that a callback isn't already attached */ /* Check that a callback isn't already attached */
if (bridge->lm_callback[monitor] != NULL) { if (bridge->lm_callback[monitor] != NULL) {
mutex_unlock(&(lm->mtx)); mutex_unlock(&(lm->mtx));
printk("Existing callback attached\n"); dev_err(tsi148_bridge->parent, "Existing callback attached\n");
return -EBUSY; return -EBUSY;
} }
...@@ -2139,8 +2166,8 @@ static int tsi148_crcsr_init(struct vme_bridge *tsi148_bridge, ...@@ -2139,8 +2166,8 @@ static int tsi148_crcsr_init(struct vme_bridge *tsi148_bridge,
bridge->crcsr_kernel = pci_alloc_consistent(pdev, VME_CRCSR_BUF_SIZE, bridge->crcsr_kernel = pci_alloc_consistent(pdev, VME_CRCSR_BUF_SIZE,
&(bridge->crcsr_bus)); &(bridge->crcsr_bus));
if (bridge->crcsr_kernel == NULL) { if (bridge->crcsr_kernel == NULL) {
dev_err(&pdev->dev, "Failed to allocate memory for CR/CSR " dev_err(tsi148_bridge->parent, "Failed to allocate memory for "
"image\n"); "CR/CSR image\n");
return -ENOMEM; return -ENOMEM;
} }
...@@ -2159,18 +2186,18 @@ static int tsi148_crcsr_init(struct vme_bridge *tsi148_bridge, ...@@ -2159,18 +2186,18 @@ static int tsi148_crcsr_init(struct vme_bridge *tsi148_bridge,
if (cbar != vstat) { if (cbar != vstat) {
cbar = vstat; cbar = vstat;
dev_info(&pdev->dev, "Setting CR/CSR offset\n"); dev_info(tsi148_bridge->parent, "Setting CR/CSR offset\n");
iowrite32be(cbar<<3, bridge->base + TSI148_CBAR); iowrite32be(cbar<<3, bridge->base + TSI148_CBAR);
} }
dev_info(&pdev->dev, "CR/CSR Offset: %d\n", cbar); dev_info(tsi148_bridge->parent, "CR/CSR Offset: %d\n", cbar);
crat = ioread32be(bridge->base + TSI148_LCSR_CRAT); crat = ioread32be(bridge->base + TSI148_LCSR_CRAT);
if (crat & TSI148_LCSR_CRAT_EN) { if (crat & TSI148_LCSR_CRAT_EN) {
dev_info(&pdev->dev, "Enabling CR/CSR space\n"); dev_info(tsi148_bridge->parent, "Enabling CR/CSR space\n");
iowrite32be(crat | TSI148_LCSR_CRAT_EN, iowrite32be(crat | TSI148_LCSR_CRAT_EN,
bridge->base + TSI148_LCSR_CRAT); bridge->base + TSI148_LCSR_CRAT);
} else } else
dev_info(&pdev->dev, "CR/CSR already enabled\n"); dev_info(tsi148_bridge->parent, "CR/CSR already enabled\n");
/* If we want flushed, error-checked writes, set up a window /* If we want flushed, error-checked writes, set up a window
* over the CR/CSR registers. We read from here to safely flush * over the CR/CSR registers. We read from here to safely flush
...@@ -2181,7 +2208,8 @@ static int tsi148_crcsr_init(struct vme_bridge *tsi148_bridge, ...@@ -2181,7 +2208,8 @@ static int tsi148_crcsr_init(struct vme_bridge *tsi148_bridge,
(vstat * 0x80000), 0x80000, VME_CRCSR, VME_SCT, (vstat * 0x80000), 0x80000, VME_CRCSR, VME_SCT,
VME_D16); VME_D16);
if (retval) if (retval)
dev_err(&pdev->dev, "Configuring flush image failed\n"); dev_err(tsi148_bridge->parent, "Configuring flush image"
" failed\n");
} }
return 0; return 0;
...@@ -2623,8 +2651,6 @@ static void tsi148_remove(struct pci_dev *pdev) ...@@ -2623,8 +2651,6 @@ static void tsi148_remove(struct pci_dev *pdev)
static void __exit tsi148_exit(void) static void __exit tsi148_exit(void)
{ {
pci_unregister_driver(&tsi148_driver); pci_unregister_driver(&tsi148_driver);
printk(KERN_DEBUG "Driver removed.\n");
} }
MODULE_PARM_DESC(err_chk, "Check for VME errors on reads and writes"); MODULE_PARM_DESC(err_chk, "Check for VME errors on reads and writes");
......
Markdown is supported
0% 或 .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑！
想要评论请 注册 或