diff --git a/arch/alpha/include/asm/dma-mapping.h b/arch/alpha/include/asm/dma-mapping.h index 1bce8169733cd0ef5790427edc4f7aa206adac5d..b3423d96acc77696791fd9964442cf96bf5eb90f 100644 --- a/arch/alpha/include/asm/dma-mapping.h +++ b/arch/alpha/include/asm/dma-mapping.h @@ -44,6 +44,5 @@ static inline int dma_set_mask(struct device *dev, u64 mask) #define dma_is_consistent(d, h) (1) #define dma_cache_sync(dev, va, size, dir) ((void)0) -#define dma_get_cache_alignment() L1_CACHE_BYTES #endif /* _ALPHA_DMA_MAPPING_H */ diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h index 69ce0727edb534d5eb088cf37e810de5bd8e9306..f4a996d5ae96ddbc7f1040d5d0a4aaebe8c22c71 100644 --- a/arch/arm/include/asm/dma-mapping.h +++ b/arch/arm/include/asm/dma-mapping.h @@ -144,11 +144,6 @@ static inline int dma_set_mask(struct device *dev, u64 dma_mask) return 0; } -static inline int dma_get_cache_alignment(void) -{ - return 32; -} - static inline int dma_is_consistent(struct device *dev, dma_addr_t handle) { return !!arch_is_coherent(); diff --git a/arch/avr32/include/asm/dma-mapping.h b/arch/avr32/include/asm/dma-mapping.h index 0399359ab5d80f043b54dfe792baa65c1e2364fa..af6b8165507403065acfc98887a90b98459eac54 100644 --- a/arch/avr32/include/asm/dma-mapping.h +++ b/arch/avr32/include/asm/dma-mapping.h @@ -341,9 +341,4 @@ static inline int dma_is_consistent(struct device *dev, dma_addr_t dma_addr) return 1; } -static inline int dma_get_cache_alignment(void) -{ - return boot_cpu_data.dcache.linesz; -} - #endif /* __ASM_AVR32_DMA_MAPPING_H */ diff --git a/arch/blackfin/include/asm/dma-mapping.h b/arch/blackfin/include/asm/dma-mapping.h index 212cb80fd74b61ee1c8422c07522683a9eab47ea..6694a0f55de92d9d5011221e573339c193b9ba46 100644 --- a/arch/blackfin/include/asm/dma-mapping.h +++ b/arch/blackfin/include/asm/dma-mapping.h @@ -21,7 +21,6 @@ void dma_free_coherent(struct device *dev, size_t size, void *vaddr, #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) #define dma_supported(d, m) (1) -#define dma_get_cache_alignment() (32) #define dma_is_consistent(d, h) (1) static inline int diff --git a/arch/cris/include/asm/dma-mapping.h b/arch/cris/include/asm/dma-mapping.h index da8ef8e8f842733751a33985879e07057e6af523..fc30fd0b2a04c53eb1842be6358f3921858110b0 100644 --- a/arch/cris/include/asm/dma-mapping.h +++ b/arch/cris/include/asm/dma-mapping.h @@ -152,12 +152,6 @@ dma_set_mask(struct device *dev, u64 mask) return 0; } -static inline int -dma_get_cache_alignment(void) -{ - return (1 << INTERNODE_CACHE_SHIFT); -} - #define dma_is_consistent(d, h) (1) static inline void diff --git a/arch/frv/include/asm/dma-mapping.h b/arch/frv/include/asm/dma-mapping.h index 6af5d83e2fb2a6ac6e8623599b754467500adf17..7b05ce14177e1e174a0dc2e48919c8f64caabc13 100644 --- a/arch/frv/include/asm/dma-mapping.h +++ b/arch/frv/include/asm/dma-mapping.h @@ -125,12 +125,6 @@ int dma_set_mask(struct device *dev, u64 mask) return 0; } -static inline -int dma_get_cache_alignment(void) -{ - return 1 << L1_CACHE_SHIFT; -} - #define dma_is_consistent(d, h) (1) static inline diff --git a/arch/ia64/include/asm/dma-mapping.h b/arch/ia64/include/asm/dma-mapping.h index 7d09a09cdaadf5b1f26b8bf5009b71b986d61406..8d52deed375074ebce689808c95cb18ea0065dbf 100644 --- a/arch/ia64/include/asm/dma-mapping.h +++ b/arch/ia64/include/asm/dma-mapping.h @@ -86,8 +86,6 @@ static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr) return daddr; } -extern int dma_get_cache_alignment(void); - static inline void dma_cache_sync (struct device *dev, void *vaddr, size_t size, enum dma_data_direction dir) diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c index 41ae6a596b50a8cec1ff7146e547093779257c90..8fb958abf8d008e95259f209d4caf7e53420b009 100644 --- a/arch/ia64/kernel/setup.c +++ b/arch/ia64/kernel/setup.c @@ -98,12 +98,6 @@ static struct resource bss_resource = { unsigned long ia64_max_cacheline_size; -int dma_get_cache_alignment(void) -{ - return ia64_max_cacheline_size; -} -EXPORT_SYMBOL(dma_get_cache_alignment); - unsigned long ia64_iobase; /* virtual address for I/O accesses */ EXPORT_SYMBOL(ia64_iobase); struct io_space io_space[MAX_IO_SPACES]; diff --git a/arch/m68k/include/asm/dma-mapping.h b/arch/m68k/include/asm/dma-mapping.h index 26f505488c1197dbe004cc6486d8c41c7285ab65..a1ae732c7247a64396f4ed383c1120ed7ebf30bb 100644 --- a/arch/m68k/include/asm/dma-mapping.h +++ b/arch/m68k/include/asm/dma-mapping.h @@ -16,11 +16,6 @@ static inline int dma_set_mask(struct device *dev, u64 mask) return 0; } -static inline int dma_get_cache_alignment(void) -{ - return 1 << L1_CACHE_SHIFT; -} - static inline int dma_is_consistent(struct device *dev, dma_addr_t dma_addr) { return 0; diff --git a/arch/microblaze/include/asm/dma-mapping.h b/arch/microblaze/include/asm/dma-mapping.h index 5073895807094541c6031da0804fa77fa7461baf..21df7cbae65eb4627fb30245dd7186071ca1280b 100644 --- a/arch/microblaze/include/asm/dma-mapping.h +++ b/arch/microblaze/include/asm/dma-mapping.h @@ -132,11 +132,6 @@ static inline void dma_free_coherent(struct device *dev, size_t size, ops->free_coherent(dev, size, cpu_addr, dma_handle); } -static inline int dma_get_cache_alignment(void) -{ - return L1_CACHE_BYTES; -} - static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction) { diff --git a/arch/mips/include/asm/dma-mapping.h b/arch/mips/include/asm/dma-mapping.h index 664ba53dc32a79fed9b7ed433e88a8b3a56e5d45..d724a15f04380d0ec7e81f45ac0900705fe64cdf 100644 --- a/arch/mips/include/asm/dma-mapping.h +++ b/arch/mips/include/asm/dma-mapping.h @@ -62,13 +62,6 @@ dma_set_mask(struct device *dev, u64 mask) return 0; } -static inline int -dma_get_cache_alignment(void) -{ - /* XXX Largest on any MIPS */ - return 128; -} - extern int dma_is_consistent(struct device *dev, dma_addr_t dma_addr); extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size, diff --git a/arch/mn10300/include/asm/dma-mapping.h b/arch/mn10300/include/asm/dma-mapping.h index 4ed1522b38d2cf1a71fe4ae4785b339014e28213..8d452a657795e80176c44e2d2f0b40b7a735b7c5 100644 --- a/arch/mn10300/include/asm/dma-mapping.h +++ b/arch/mn10300/include/asm/dma-mapping.h @@ -161,12 +161,6 @@ int dma_set_mask(struct device *dev, u64 mask) return 0; } -static inline -int dma_get_cache_alignment(void) -{ - return 1 << L1_CACHE_SHIFT; -} - #define dma_is_consistent(d) (1) static inline diff --git a/arch/parisc/include/asm/dma-mapping.h b/arch/parisc/include/asm/dma-mapping.h index da69433809080b2ff41aae083f4312da996becf7..44d3f62ccf9d9ffac0d1010090a4246173e10799 100644 --- a/arch/parisc/include/asm/dma-mapping.h +++ b/arch/parisc/include/asm/dma-mapping.h @@ -184,12 +184,6 @@ dma_set_mask(struct device *dev, u64 mask) return 0; } -static inline int -dma_get_cache_alignment(void) -{ - return dcache_stride; -} - static inline int dma_is_consistent(struct device *dev, dma_addr_t dma_addr) { diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h index c85ef230135bc31c3714389659117ba1d8451b41..a77ba280af04d576363799ccf6c7123a03410d67 100644 --- a/arch/powerpc/include/asm/dma-mapping.h +++ b/arch/powerpc/include/asm/dma-mapping.h @@ -215,21 +215,6 @@ static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr) #define dma_is_consistent(d, h) (1) #endif -static inline int dma_get_cache_alignment(void) -{ -#ifdef CONFIG_PPC64 - /* no easy way to get cache size on all processors, so return - * the maximum possible, to be safe */ - return (1 << INTERNODE_CACHE_SHIFT); -#else - /* - * Each processor family will define its own L1_CACHE_SHIFT, - * L1_CACHE_BYTES wraps to this, so this is always safe. - */ - return L1_CACHE_BYTES; -#endif -} - static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction) { diff --git a/arch/sh/include/asm/dma-mapping.h b/arch/sh/include/asm/dma-mapping.h index bea3337a426a13d4e05e45aca90d45a9778a0d06..6bb5cc9decf85fa5c6d8cf762cb7e09d7f842757 100644 --- a/arch/sh/include/asm/dma-mapping.h +++ b/arch/sh/include/asm/dma-mapping.h @@ -48,15 +48,6 @@ void dma_cache_sync(struct device *dev, void *vaddr, size_t size, #define dma_is_consistent(d, h) (0) #endif -static inline int dma_get_cache_alignment(void) -{ - /* - * Each processor family will define its own L1_CACHE_SHIFT, - * L1_CACHE_BYTES wraps to this, so this is always safe. - */ - return L1_CACHE_BYTES; -} - static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) { struct dma_map_ops *ops = get_dma_ops(dev); diff --git a/arch/sparc/include/asm/dma-mapping.h b/arch/sparc/include/asm/dma-mapping.h index 4b4a0c0b0ccd1850872f8660808f163d0ac51bb6..74db853ec2cf160c2c20ff8dbef9a8ce0239b700 100644 --- a/arch/sparc/include/asm/dma-mapping.h +++ b/arch/sparc/include/asm/dma-mapping.h @@ -52,15 +52,6 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) return (dma_addr == DMA_ERROR_CODE); } -static inline int dma_get_cache_alignment(void) -{ - /* - * no easy way to get cache size on all processors, so return - * the maximum possible, to be safe - */ - return (1 << INTERNODE_CACHE_SHIFT); -} - static inline int dma_set_mask(struct device *dev, u64 mask) { #ifdef CONFIG_PCI diff --git a/arch/tile/include/asm/dma-mapping.h b/arch/tile/include/asm/dma-mapping.h index cf466b39aa13b9600d26d32462dcf117d833971f..1326b910fec67e68896c0ea620b18e9ef1176f5b 100644 --- a/arch/tile/include/asm/dma-mapping.h +++ b/arch/tile/include/asm/dma-mapping.h @@ -90,13 +90,6 @@ dma_set_mask(struct device *dev, u64 mask) return 0; } -static inline int -dma_get_cache_alignment(void) -{ - return L2_CACHE_BYTES; -} - #define dma_is_consistent(d, h) (1) - #endif /* _ASM_TILE_DMA_MAPPING_H */ diff --git a/arch/x86/include/asm/dma-mapping.h b/arch/x86/include/asm/dma-mapping.h index ac91eed21061a5299bc39669f6e333d2b61ef4b3..f9c67e83f6488844902132f7ca7dffcb3cb08489 100644 --- a/arch/x86/include/asm/dma-mapping.h +++ b/arch/x86/include/asm/dma-mapping.h @@ -87,13 +87,6 @@ dma_cache_sync(struct device *dev, void *vaddr, size_t size, flush_write_buffers(); } -static inline int dma_get_cache_alignment(void) -{ - /* no easy way to get cache size on all x86, so return the - * maximum possible, to be safe */ - return boot_cpu_data.x86_clflush_size; -} - static inline unsigned long dma_alloc_coherent_mask(struct device *dev, gfp_t gfp) { diff --git a/arch/xtensa/include/asm/dma-mapping.h b/arch/xtensa/include/asm/dma-mapping.h index 51882ae3db4d18ceb3a1536745d55ca00948ea65..7104f2f9823e7ebf9adae253a5bf68a88f6cd7d6 100644 --- a/arch/xtensa/include/asm/dma-mapping.h +++ b/arch/xtensa/include/asm/dma-mapping.h @@ -161,12 +161,6 @@ dma_set_mask(struct device *dev, u64 mask) return 0; } -static inline int -dma_get_cache_alignment(void) -{ - return L1_CACHE_BYTES; -} - #define dma_is_consistent(d, h) (1) static inline void diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h index 89b7e1a605b8113ac90e7f4bd51f73d595988ade..e0670a51205691b10fd0974a9bf42e49620c50ee 100644 --- a/include/linux/dma-mapping.h +++ b/include/linux/dma-mapping.h @@ -142,6 +142,14 @@ static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask) return -EIO; } +static inline int dma_get_cache_alignment(void) +{ +#ifdef ARCH_DMA_MINALIGN + return ARCH_DMA_MINALIGN; +#endif + return 1; +} + /* flags for the coherent memory api */ #define DMA_MEMORY_MAP 0x01 #define DMA_MEMORY_IO 0x02