提交 4481ab60 编写于 作者: Y Yann Gautier 提交者: Ulf Hansson

mmc: mmci: increase stm32 sdmmcv2 clock max freq

The variant->f_max is dependent on the IP, not on the SoC where it is
embedded. Set the max frequency of its source clock to 267MHz.
The frequency used will be limited by the IOs max frequency, set in the
SoC device tree.
Signed-off-by: NYann Gautier <yann.gautier@foss.st.com>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20211215141727.4901-3-yann.gautier@foss.st.comSigned-off-by: NUlf Hansson <ulf.hansson@linaro.org>
上级 5471fe8b
...@@ -280,7 +280,7 @@ static struct variant_data variant_stm32_sdmmc = { ...@@ -280,7 +280,7 @@ static struct variant_data variant_stm32_sdmmc = {
static struct variant_data variant_stm32_sdmmcv2 = { static struct variant_data variant_stm32_sdmmcv2 = {
.fifosize = 16 * 4, .fifosize = 16 * 4,
.fifohalfsize = 8 * 4, .fifohalfsize = 8 * 4,
.f_max = 208000000, .f_max = 267000000,
.stm32_clkdiv = true, .stm32_clkdiv = true,
.cmdreg_cpsm_enable = MCI_CPSM_STM32_ENABLE, .cmdreg_cpsm_enable = MCI_CPSM_STM32_ENABLE,
.cmdreg_lrsp_crc = MCI_CPSM_STM32_LRSP_CRC, .cmdreg_lrsp_crc = MCI_CPSM_STM32_LRSP_CRC,
......
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