提交 3fbf1eac 编写于 作者: Y Yunfei Dong 提交者: Mauro Carvalho Chehab

media: dt-bindings: media: mediatek: vcodec: Adds decoder dt-bindings for lat soc

Adds decoder dt-bindings for compatible "mediatek,mtk-vcodec-lat-soc".
Signed-off-by: NYunfei Dong <yunfei.dong@mediatek.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: NMauro Carvalho Chehab <mchehab@kernel.org>
上级 b0f407c1
......@@ -17,20 +17,20 @@ description: |
About the Decoder Hardware Block Diagram, please check below:
+---------------------------------+------------------------------------+
+------------------------------------------------+-------------------------------------+
| | |
| input -> lat HW -> lat buffer --|--> lat buffer -> core HW -> output |
| || | || |
+------------||-------------------+---------------------||-------------+
lat workqueue | core workqueue <parent>
-------------||-----------------------------------------||------------------
|| || <child>
\/ <----------------HW index-------------->\/
+------------------------------------------------------+
| input -> lat soc HW -> lat HW -> lat buffer --|--> lat buffer -> core HW -> output |
| || || | || |
+------------||-------------||-------------------+---------------------||--------------+
|| lat || | core workqueue <parent>
-------------||-------------||-------------------|---------------------||---------------
||<------------||----------------HW index---------------->|| <child>
\/ \/ \/
+-------------------------------------------------------------+
| enable/disable |
| clk power irq iommu |
| (lat/lat soc/core0/core1) |
+------------------------------------------------------+
+-------------------------------------------------------------+
As above, there are parent and child devices, child mean each hardware. The child device
controls the information of each hardware independent which include clk/power/irq.
......@@ -45,6 +45,13 @@ description: |
For the smi common may not the same for each hardware, can't combine all hardware in one node,
or leading to iommu fault when access dram data.
Lat soc is a hardware which is related with some larb(local arbiter) ports. For mt8195
platform, there are some ports like RDMA, UFO in lat soc larb, need to enable its power and
clock when lat start to work, don't have interrupt.
mt8195: lat soc HW + lat HW + core HW
mt8192: lat HW + core HW
properties:
compatible:
enum:
......@@ -87,7 +94,9 @@ patternProperties:
properties:
compatible:
const: mediatek,mtk-vcodec-lat
enum:
- mediatek,mtk-vcodec-lat
- mediatek,mtk-vcodec-lat-soc
reg:
maxItems: 1
......@@ -125,7 +134,6 @@ patternProperties:
required:
- compatible
- reg
- interrupts
- iommus
- clocks
- clock-names
......@@ -196,6 +204,17 @@ required:
- dma-ranges
- ranges
if:
properties:
compatible:
contains:
enum:
- mediatek,mtk-vcodec-lat
then:
required:
- interrupts
additionalProperties: false
examples:
......
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