diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c index 8635fbcd9a5a03cf610a100b0223e4fbac4bd378..bd7077fdcd30b0188e799949aa20d3aafb451751 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.c @@ -332,9 +332,25 @@ static int hclge_comm_cmd_csq_done(struct hclge_comm_hw *hw) return head == hw->cmq.csq.next_to_use; } -static void hclge_comm_wait_for_resp(struct hclge_comm_hw *hw, +static u32 hclge_get_cmdq_tx_timeout(u16 opcode, u32 tx_timeout) +{ + static const struct hclge_cmdq_tx_timeout_map cmdq_tx_timeout_map[] = { + {HCLGE_OPC_CFG_RST_TRIGGER, HCLGE_COMM_CMDQ_TX_TIMEOUT_500MS}, + }; + u32 i; + + for (i = 0; i < ARRAY_SIZE(cmdq_tx_timeout_map); i++) + if (cmdq_tx_timeout_map[i].opcode == opcode) + return cmdq_tx_timeout_map[i].tx_timeout; + + return tx_timeout; +} + +static void hclge_comm_wait_for_resp(struct hclge_comm_hw *hw, u16 opcode, bool *is_completed) { + u32 cmdq_tx_timeout = hclge_get_cmdq_tx_timeout(opcode, + hw->cmq.tx_timeout); u32 timeout = 0; do { @@ -344,7 +360,7 @@ static void hclge_comm_wait_for_resp(struct hclge_comm_hw *hw, } udelay(1); timeout++; - } while (timeout < hw->cmq.tx_timeout); + } while (timeout < cmdq_tx_timeout); } static int hclge_comm_cmd_convert_err_code(u16 desc_ret) @@ -408,7 +424,8 @@ static int hclge_comm_cmd_check_result(struct hclge_comm_hw *hw, * if multi descriptors to be sent, use the first one to check */ if (HCLGE_COMM_SEND_SYNC(le16_to_cpu(desc->flag))) - hclge_comm_wait_for_resp(hw, &is_completed); + hclge_comm_wait_for_resp(hw, le16_to_cpu(desc->opcode), + &is_completed); if (!is_completed) ret = -EBADE; @@ -530,7 +547,7 @@ int hclge_comm_cmd_queue_init(struct pci_dev *pdev, struct hclge_comm_hw *hw) cmdq->crq.desc_num = HCLGE_COMM_NIC_CMQ_DESC_NUM; /* Setup Tx write back timeout */ - cmdq->tx_timeout = HCLGE_COMM_CMDQ_TX_TIMEOUT; + cmdq->tx_timeout = HCLGE_COMM_CMDQ_TX_TIMEOUT_DEFAULT; /* Setup queue rings */ ret = hclge_comm_alloc_cmd_queue(hw, HCLGE_COMM_TYPE_CSQ); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h index 4de5dec219f787936633693d6642f7da7290d49f..eb3fd3447bab4dfa8909a96bbc0aad674b5ae016 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_common/hclge_comm_cmd.h @@ -54,7 +54,8 @@ #define HCLGE_COMM_NIC_SW_RST_RDY BIT(HCLGE_COMM_NIC_SW_RST_RDY_B) #define HCLGE_COMM_NIC_CMQ_DESC_NUM_S 3 #define HCLGE_COMM_NIC_CMQ_DESC_NUM 1024 -#define HCLGE_COMM_CMDQ_TX_TIMEOUT 30000 +#define HCLGE_COMM_CMDQ_TX_TIMEOUT_DEFAULT 30000 +#define HCLGE_COMM_CMDQ_TX_TIMEOUT_500MS 500000 enum hclge_opcode_type { /* Generic commands */ @@ -361,6 +362,11 @@ struct hclge_comm_caps_bit_map { u16 local_bit; }; +struct hclge_cmdq_tx_timeout_map { + u32 opcode; + u32 tx_timeout; +}; + struct hclge_comm_firmware_compat_cmd { __le32 compat; u8 rsv[20]; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index f504e64917df3e375e2079d2458743a1f4fc353b..d51134f34a289ce0312832f8b81ba56f8654b30f 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -130,7 +130,7 @@ static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = { .name = "tx_bd_queue", .cmd = HNAE3_DBG_CMD_TX_BD, .dentry = HNS3_DBG_DENTRY_TX_BD, - .buf_len = HNS3_DBG_READ_LEN_4MB, + .buf_len = HNS3_DBG_READ_LEN_5MB, .init = hns3_dbg_bd_file_init, }, { diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h index 97578eabb7d8b7a2defc1ac1422bb77f29b1f6bf..4a5ef8a90a1046883416f00648e5f47ff2a42721 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h @@ -10,6 +10,7 @@ #define HNS3_DBG_READ_LEN_128KB 0x20000 #define HNS3_DBG_READ_LEN_1MB 0x100000 #define HNS3_DBG_READ_LEN_4MB 0x400000 +#define HNS3_DBG_READ_LEN_5MB 0x500000 #define HNS3_DBG_WRITE_LEN 1024 #define HNS3_DBG_DATA_STR_LEN 32 diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h index 85c352fff83b79d8f99a2a78b1c774ead00dffbb..861979579c3652d4fc589c8635a02d8d0984c5f5 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h @@ -755,6 +755,12 @@ static inline unsigned int hns3_page_order(struct hns3_enet_ring *ring) #define hns3_get_handle(ndev) \ (((struct hns3_nic_priv *)netdev_priv(ndev))->ae_handle) +#define hns3_get_ae_dev(handle) \ + (pci_get_drvdata((handle)->pdev)) + +#define hns3_get_ops(handle) \ + ((handle)->ae_algo->ops) + #define hns3_gl_usec_to_reg(int_gl) ((int_gl) >> 1) #define hns3_gl_round_down(int_gl) round_down(int_gl, 2) diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c b/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c index 6db505abc2d796e31e9eff6e47474d19b46ae5ed..7bc1bea3c1280726f5a3d1c8e1769adc7e71c7d8 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c @@ -2046,10 +2046,10 @@ static int hns3_get_link_ext_state(struct net_device *netdev, static void hns3_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) { struct hnae3_handle *handle = hns3_get_handle(netdev); - struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev); - const struct hnae3_ae_ops *ops = handle->ae_algo->ops; + const struct hnae3_ae_ops *ops = hns3_get_ops(handle); + struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(handle); - if (!hnae3_ae_dev_wol_supported(ae_dev) || !ops->get_wol) + if (!hnae3_ae_dev_wol_supported(ae_dev)) return; ops->get_wol(handle, wol); @@ -2059,10 +2059,10 @@ static int hns3_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) { struct hnae3_handle *handle = hns3_get_handle(netdev); - struct hnae3_ae_dev *ae_dev = pci_get_drvdata(handle->pdev); - const struct hnae3_ae_ops *ops = handle->ae_algo->ops; + const struct hnae3_ae_ops *ops = hns3_get_ops(handle); + struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(handle); - if (!hnae3_ae_dev_wol_supported(ae_dev) || !ops->set_wol) + if (!hnae3_ae_dev_wol_supported(ae_dev)) return -EOPNOTSUPP; return ops->set_wol(handle, wol); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h index cc28d9590ef7c34a414adbdded8c5b8daa7dbb53..e18ee08df327894f536b51dec4240c3ecedfc774 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h @@ -898,18 +898,6 @@ struct hclge_phy_reg_cmd { u8 rsv2[12]; }; -enum HCLGE_WOL_MODE { - HCLGE_WOL_PHY = BIT(0), - HCLGE_WOL_UNICAST = BIT(1), - HCLGE_WOL_MULTICAST = BIT(2), - HCLGE_WOL_BROADCAST = BIT(3), - HCLGE_WOL_ARP = BIT(4), - HCLGE_WOL_MAGIC = BIT(5), - HCLGE_WOL_MAGICSECURED = BIT(6), - HCLGE_WOL_FILTER = BIT(7), - HCLGE_WOL_DISABLE = 0, -}; - struct hclge_wol_cfg_cmd { __le32 wake_on_lan_mode; u8 sopass[SOPASS_MAX]; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index 1a69638f1ba6bc2425a806ffc11f149689eae346..02678287e745d8f9dd54c85dc1a122566eac7c1b 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -2497,29 +2497,29 @@ static int hclge_dbg_dump_mac_mc(struct hclge_dev *hdev, char *buf, int len) static void hclge_dump_wol_mode(u32 mode, char *buf, int len, int *pos) { - if (mode & HCLGE_WOL_PHY) + if (mode & WAKE_PHY) *pos += scnprintf(buf + *pos, len - *pos, " [p]phy\n"); - if (mode & HCLGE_WOL_UNICAST) + if (mode & WAKE_UCAST) *pos += scnprintf(buf + *pos, len - *pos, " [u]unicast\n"); - if (mode & HCLGE_WOL_MULTICAST) + if (mode & WAKE_MCAST) *pos += scnprintf(buf + *pos, len - *pos, " [m]multicast\n"); - if (mode & HCLGE_WOL_BROADCAST) + if (mode & WAKE_BCAST) *pos += scnprintf(buf + *pos, len - *pos, " [b]broadcast\n"); - if (mode & HCLGE_WOL_ARP) + if (mode & WAKE_ARP) *pos += scnprintf(buf + *pos, len - *pos, " [a]arp\n"); - if (mode & HCLGE_WOL_MAGIC) + if (mode & WAKE_MAGIC) *pos += scnprintf(buf + *pos, len - *pos, " [g]magic\n"); - if (mode & HCLGE_WOL_MAGICSECURED) + if (mode & WAKE_MAGICSECURE) *pos += scnprintf(buf + *pos, len - *pos, " [s]magic secured\n"); - if (mode & HCLGE_WOL_FILTER) + if (mode & WAKE_FILTER) *pos += scnprintf(buf + *pos, len - *pos, " [f]filter\n"); } diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index b8ee1674b3b3c078d6cd20ed37f83da447028ab2..2c61ff5ef9ceb8c89d2db2a2427c82bfe5d9a622 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -12067,69 +12067,15 @@ static void hclge_uninit_rxd_adv_layout(struct hclge_dev *hdev) hclge_write_dev(&hdev->hw, HCLGE_RXD_ADV_LAYOUT_EN_REG, 0); } -static __u32 hclge_wol_mode_to_ethtool(u32 mode) +static struct hclge_wol_info *hclge_get_wol_info(struct hnae3_handle *handle) { - __u32 ret = 0; - - if (mode & HCLGE_WOL_PHY) - ret |= WAKE_PHY; - - if (mode & HCLGE_WOL_UNICAST) - ret |= WAKE_UCAST; - - if (mode & HCLGE_WOL_MULTICAST) - ret |= WAKE_MCAST; - - if (mode & HCLGE_WOL_BROADCAST) - ret |= WAKE_BCAST; - - if (mode & HCLGE_WOL_ARP) - ret |= WAKE_ARP; - - if (mode & HCLGE_WOL_MAGIC) - ret |= WAKE_MAGIC; - - if (mode & HCLGE_WOL_MAGICSECURED) - ret |= WAKE_MAGICSECURE; - - if (mode & HCLGE_WOL_FILTER) - ret |= WAKE_FILTER; - - return ret; -} - -static u32 hclge_wol_mode_from_ethtool(__u32 mode) -{ - u32 ret = HCLGE_WOL_DISABLE; - - if (mode & WAKE_PHY) - ret |= HCLGE_WOL_PHY; - - if (mode & WAKE_UCAST) - ret |= HCLGE_WOL_UNICAST; - - if (mode & WAKE_MCAST) - ret |= HCLGE_WOL_MULTICAST; - - if (mode & WAKE_BCAST) - ret |= HCLGE_WOL_BROADCAST; - - if (mode & WAKE_ARP) - ret |= HCLGE_WOL_ARP; - - if (mode & WAKE_MAGIC) - ret |= HCLGE_WOL_MAGIC; - - if (mode & WAKE_MAGICSECURE) - ret |= HCLGE_WOL_MAGICSECURED; - - if (mode & WAKE_FILTER) - ret |= HCLGE_WOL_FILTER; + struct hclge_vport *vport = hclge_get_vport(handle); - return ret; + return &vport->back->hw.mac.wol; } -int hclge_get_wol_supported_mode(struct hclge_dev *hdev, u32 *wol_supported) +int hclge_get_wol_supported_mode(struct hclge_dev *hdev, + u32 *wol_supported) { struct hclge_query_wol_supported_cmd *wol_supported_cmd; struct hclge_desc desc; @@ -12214,7 +12160,7 @@ static int hclge_init_wol(struct hclge_dev *hdev) ret = hclge_get_wol_supported_mode(hdev, &wol_info->wol_support_mode); if (ret) { - wol_info->wol_support_mode = HCLGE_WOL_DISABLE; + wol_info->wol_support_mode = 0; return ret; } @@ -12224,38 +12170,39 @@ static int hclge_init_wol(struct hclge_dev *hdev) static void hclge_get_wol(struct hnae3_handle *handle, struct ethtool_wolinfo *wol) { - struct hclge_vport *vport = hclge_get_vport(handle); - struct hclge_dev *hdev = vport->back; - struct hclge_wol_info *wol_info = &hdev->hw.mac.wol; + struct hclge_wol_info *wol_info = hclge_get_wol_info(handle); - wol->supported = hclge_wol_mode_to_ethtool(wol_info->wol_support_mode); - wol->wolopts = - hclge_wol_mode_to_ethtool(wol_info->wol_current_mode); - if (wol_info->wol_current_mode & HCLGE_WOL_MAGICSECURED) - memcpy(&wol->sopass, wol_info->wol_sopass, SOPASS_MAX); + wol->supported = wol_info->wol_support_mode; + wol->wolopts = wol_info->wol_current_mode; + if (wol_info->wol_current_mode & WAKE_MAGICSECURE) + memcpy(wol->sopass, wol_info->wol_sopass, SOPASS_MAX); } static int hclge_set_wol(struct hnae3_handle *handle, struct ethtool_wolinfo *wol) { + struct hclge_wol_info *wol_info = hclge_get_wol_info(handle); struct hclge_vport *vport = hclge_get_vport(handle); - struct hclge_dev *hdev = vport->back; - struct hclge_wol_info *wol_info = &hdev->hw.mac.wol; u32 wol_mode; + int ret; - wol_mode = hclge_wol_mode_from_ethtool(wol->wolopts); + wol_mode = wol->wolopts; if (wol_mode & ~wol_info->wol_support_mode) return -EINVAL; wol_info->wol_current_mode = wol_mode; - if (wol_mode & HCLGE_WOL_MAGICSECURED) { - memcpy(wol_info->wol_sopass, &wol->sopass, SOPASS_MAX); + if (wol_mode & WAKE_MAGICSECURE) { + memcpy(wol_info->wol_sopass, wol->sopass, SOPASS_MAX); wol_info->wol_sopass_size = SOPASS_MAX; } else { wol_info->wol_sopass_size = 0; } - return hclge_set_wol_cfg(hdev, wol_info); + ret = hclge_set_wol_cfg(vport->back, wol_info); + if (ret) + wol_info->wol_current_mode = 0; + + return ret; } static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)