arm64: dts: allwinner: orangepi-zero-plus: fix PHY mode

stable inclusion
from stable-v5.10.89
commit 93a957bbf46ceb224b959de61fe85cfc6f71b6c7
bugzilla: 186140 https://gitee.com/openeuler/kernel/issues/I4S8HA

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=93a957bbf46ceb224b959de61fe85cfc6f71b6c7

--------------------------------

[ Upstream commit 08d2061f ]

Orange Pi Zero Plus uses a Realtek RTL8211E RGMII Gigabit PHY, but its
currently set to plain RGMII mode meaning that it doesn't introduce
delays.

With this setup, TX packets are completely lost and changing the mode to
RGMII-ID so the PHY will add delays internally fixes the issue.

Fixes: a7affb13 ("arm64: allwinner: H5: Add Xunlong Orange Pi Zero Plus")
Acked-by: NChen-Yu Tsai <wens@csie.org>
Tested-by: NRon Goossens <rgoossens@gmail.com>
Tested-by: NSamuel Holland <samuel@sholland.org>
Signed-off-by: NRobert Marko <robert.marko@sartura.hr>
Signed-off-by: NMaxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211117140222.43692-1-robert.marko@sartura.hrSigned-off-by: NSasha Levin <sashal@kernel.org>
Signed-off-by: NChen Jun <chenjun102@huawei.com>
Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>

arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts

@@ -69,7 +69,7 @@
 	pinctrl-0 = <&emac_rgmii_pins>;
 	phy-supply = <&reg_gmac_3v3>;
 	phy-handle = <&ext_rgmii_phy>;
-	phy-mode = "rgmii";
+	phy-mode = "rgmii-id";
 	status = "okay";
 };