提交 33268bb9 编写于 作者: A AngeloGioacchino Del Regno 提交者: Bjorn Andersson

soc: qcom: spm: Implement support for SAWv2.3, MSM8976 L2 PM

Implement the support for SAW v2.3, used in at least MSM8976, MSM8956
and APQ variants and while at it also add the configuration for the
MSM8976's little (a53) and big (a72) clusters cache power management.
Signed-off-by: NAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
[Marijn: reorder struct definitions to follow high-to-low order]
Signed-off-by: NAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: NDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: NMarijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: NKonrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: NBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221104133452.131227-3-angelogioacchino.delregno@collabora.com
上级 7a21fddb
...@@ -109,6 +109,35 @@ static const struct spm_reg_data spm_reg_8939_cpu = { ...@@ -109,6 +109,35 @@ static const struct spm_reg_data spm_reg_8939_cpu = {
.start_index[PM_SLEEP_MODE_SPC] = 5, .start_index[PM_SLEEP_MODE_SPC] = 5,
}; };
static const u16 spm_reg_offset_v2_3[SPM_REG_NR] = {
[SPM_REG_CFG] = 0x08,
[SPM_REG_SPM_CTL] = 0x30,
[SPM_REG_DLY] = 0x34,
[SPM_REG_PMIC_DATA_0] = 0x40,
[SPM_REG_PMIC_DATA_1] = 0x44,
};
/* SPM register data for 8976 */
static const struct spm_reg_data spm_reg_8976_gold_l2 = {
.reg_offset = spm_reg_offset_v2_3,
.spm_cfg = 0x14,
.spm_dly = 0x3c11840a,
.pmic_data[0] = 0x03030080,
.pmic_data[1] = 0x00030000,
.start_index[PM_SLEEP_MODE_STBY] = 0,
.start_index[PM_SLEEP_MODE_SPC] = 3,
};
static const struct spm_reg_data spm_reg_8976_silver_l2 = {
.reg_offset = spm_reg_offset_v2_3,
.spm_cfg = 0x14,
.spm_dly = 0x3c102800,
.pmic_data[0] = 0x03030080,
.pmic_data[1] = 0x00030000,
.start_index[PM_SLEEP_MODE_STBY] = 0,
.start_index[PM_SLEEP_MODE_SPC] = 2,
};
static const u16 spm_reg_offset_v2_1[SPM_REG_NR] = { static const u16 spm_reg_offset_v2_1[SPM_REG_NR] = {
[SPM_REG_CFG] = 0x08, [SPM_REG_CFG] = 0x08,
[SPM_REG_SPM_CTL] = 0x30, [SPM_REG_SPM_CTL] = 0x30,
...@@ -226,6 +255,10 @@ static const struct of_device_id spm_match_table[] = { ...@@ -226,6 +255,10 @@ static const struct of_device_id spm_match_table[] = {
.data = &spm_reg_8939_cpu }, .data = &spm_reg_8939_cpu },
{ .compatible = "qcom,msm8974-saw2-v2.1-cpu", { .compatible = "qcom,msm8974-saw2-v2.1-cpu",
.data = &spm_reg_8974_8084_cpu }, .data = &spm_reg_8974_8084_cpu },
{ .compatible = "qcom,msm8976-gold-saw2-v2.3-l2",
.data = &spm_reg_8976_gold_l2 },
{ .compatible = "qcom,msm8976-silver-saw2-v2.3-l2",
.data = &spm_reg_8976_silver_l2 },
{ .compatible = "qcom,msm8998-gold-saw2-v4.1-l2", { .compatible = "qcom,msm8998-gold-saw2-v4.1-l2",
.data = &spm_reg_8998_gold_l2 }, .data = &spm_reg_8998_gold_l2 },
{ .compatible = "qcom,msm8998-silver-saw2-v4.1-l2", { .compatible = "qcom,msm8998-silver-saw2-v4.1-l2",
......
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