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提交 2d4fe278 编写于 作者: L Linus Torvalds
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Merge git://git.infradead.org/users/willy/linux-nvme 

Pull NVMe driver update from Matthew Wilcox:
 "Lots of exciting new features in the NVM Express driver this time,
  including support for emulating SCSI commands, discard support and the
  ability to submit per-sector metadata with I/Os.

  It's still mostly bugfixes though!"

* git://git.infradead.org/users/willy/linux-nvme: (27 commits)
  NVMe: Use user defined admin ioctl timeout
  NVMe: Simplify Firmware Activate code slightly
  NVMe: Only clear the enable bit when disabling controller
  NVMe: Wait for device to acknowledge shutdown
  NVMe: Schedule timeout for sync commands
  NVMe: Meta-data support in NVME_IOCTL_SUBMIT_IO
  NVMe: Device specific stripe size handling
  NVMe: Split non-mergeable bio requests
  NVMe: Remove dead code in nvme_dev_add
  NVMe: Check for NULL memory in nvme_dev_add
  NVMe: Fix error clean-up on nvme_alloc_queue
  NVMe: Free admin queue on request_irq error
  NVMe: Add scsi unmap to SG_IO
  NVMe: queue usage fixes in nvme-scsi
  NVMe: Set TASK_INTERRUPTIBLE before processing queues
  NVMe: Add a character device for each nvme device
  NVMe: Fix endian-related problems in user I/O submission path
  NVMe: Fix I/O cancellation status on big-endian machines
  NVMe: Fix sparse warnings in scsi emulation
  NVMe: Don't fail initialisation unnecessarily
  ...
上级 2e99f3a1 94f370ca
隐藏空白更改
内联 并排
Showing with 3640 addition and 166 deletion
drivers/block/Makefile
浏览文件 @ 2d4fe278
......@@ -42,4 +42,5 @@ obj-$(CONFIG_BLK_DEV_PCIESSD_MTIP32XX) += mtip32xx/
obj-$(CONFIG_BLK_DEV_RSXX) += rsxx/
nvme-y := nvme-core.o nvme-scsi.o
swim_mod-y := swim.o swim_asm.o
drivers/block/nvme.c → drivers/block/nvme-core.c
浏览文件 @ 2d4fe278
......@@ -39,14 +39,13 @@
#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <scsi/sg.h>
#include <asm-generic/io-64-nonatomic-lo-hi.h>
#define NVME_Q_DEPTH 1024
#define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
#define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
#define NVME_MINORS 64
#define NVME_IO_TIMEOUT (5 * HZ)
#define ADMIN_TIMEOUT (60 * HZ)
static int nvme_major;
......@@ -59,43 +58,6 @@ static DEFINE_SPINLOCK(dev_list_lock);
static LIST_HEAD(dev_list);
static struct task_struct *nvme_thread;
/*
* Represents an NVM Express device. Each nvme_dev is a PCI function.
*/
struct nvme_dev {
struct list_head node;
struct nvme_queue **queues;
u32 __iomem *dbs;
struct pci_dev *pci_dev;
struct dma_pool *prp_page_pool;
struct dma_pool *prp_small_pool;
int instance;
int queue_count;
int db_stride;
u32 ctrl_config;
struct msix_entry *entry;
struct nvme_bar __iomem *bar;
struct list_head namespaces;
char serial[20];
char model[40];
char firmware_rev[8];
u32 max_hw_sectors;
};
/*
* An NVM Express namespace is equivalent to a SCSI LUN
*/
struct nvme_ns {
struct list_head list;
struct nvme_dev *dev;
struct request_queue *queue;
struct gendisk *disk;
int ns_id;
int lba_shift;
};
/*
* An NVM Express queue. Each device has at least two (one for admin
* commands and one for I/O commands).
......@@ -131,6 +93,7 @@ static inline void _nvme_check_size(void)
BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
......@@ -261,12 +224,12 @@ static void *cancel_cmdid(struct nvme_queue *nvmeq, int cmdid,
return ctx;
}
static struct nvme_queue *get_nvmeq(struct nvme_dev *dev)
struct nvme_queue *get_nvmeq(struct nvme_dev *dev)
{
return dev->queues[get_cpu() + 1];
}
static void put_nvmeq(struct nvme_queue *nvmeq)
void put_nvmeq(struct nvme_queue *nvmeq)
{
put_cpu();
}
......@@ -294,22 +257,6 @@ static int nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
return 0;
}
/*
* The nvme_iod describes the data in an I/O, including the list of PRP
* entries. You can't see it in this data structure because C doesn't let
* me express that. Use nvme_alloc_iod to ensure there's enough space
* allocated to store the PRP list.
*/
struct nvme_iod {
void *private; /* For the use of the submitter of the I/O */
int npages; /* In the PRP list. 0 means small pool in use */
int offset; /* Of PRP list */
int nents; /* Used in scatterlist */
int length; /* Of data, in bytes */
dma_addr_t first_dma;
struct scatterlist sg[0];
};
static __le64 **iod_list(struct nvme_iod *iod)
{
return ((void *)iod) + iod->offset;
......@@ -343,7 +290,7 @@ nvme_alloc_iod(unsigned nseg, unsigned nbytes, gfp_t gfp)
return iod;
}
static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
{
const int last_prp = PAGE_SIZE / 8 - 1;
int i;
......@@ -361,16 +308,6 @@ static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
kfree(iod);
}
static void requeue_bio(struct nvme_dev *dev, struct bio *bio)
{
struct nvme_queue *nvmeq = get_nvmeq(dev);
if (bio_list_empty(&nvmeq->sq_cong))
add_wait_queue(&nvmeq->sq_full, &nvmeq->sq_cong_wait);
bio_list_add(&nvmeq->sq_cong, bio);
put_nvmeq(nvmeq);
wake_up_process(nvme_thread);
}
static void bio_completion(struct nvme_dev *dev, void *ctx,
struct nvme_completion *cqe)
{
......@@ -382,19 +319,15 @@ static void bio_completion(struct nvme_dev *dev, void *ctx,
dma_unmap_sg(&dev->pci_dev->dev, iod->sg, iod->nents,
bio_data_dir(bio) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
nvme_free_iod(dev, iod);
if (status) {
if (status)
bio_endio(bio, -EIO);
} else if (bio->bi_vcnt > bio->bi_idx) {
requeue_bio(dev, bio);
} else {
else
bio_endio(bio, 0);
}
}
/* length is in bytes. gfp flags indicates whether we may sleep. */
static int nvme_setup_prps(struct nvme_dev *dev,
struct nvme_common_command *cmd, struct nvme_iod *iod,
int total_len, gfp_t gfp)
int nvme_setup_prps(struct nvme_dev *dev, struct nvme_common_command *cmd,
struct nvme_iod *iod, int total_len, gfp_t gfp)
{
struct dma_pool *pool;
int length = total_len;
......@@ -473,43 +406,193 @@ static int nvme_setup_prps(struct nvme_dev *dev,
return total_len;
}
struct nvme_bio_pair {
struct bio b1, b2, *parent;
struct bio_vec *bv1, *bv2;
int err;
atomic_t cnt;
};
static void nvme_bio_pair_endio(struct bio *bio, int err)
{
struct nvme_bio_pair *bp = bio->bi_private;
if (err)
bp->err = err;
if (atomic_dec_and_test(&bp->cnt)) {
bio_endio(bp->parent, bp->err);
if (bp->bv1)
kfree(bp->bv1);
if (bp->bv2)
kfree(bp->bv2);
kfree(bp);
}
}
static struct nvme_bio_pair *nvme_bio_split(struct bio *bio, int idx,
int len, int offset)
{
struct nvme_bio_pair *bp;
BUG_ON(len > bio->bi_size);
BUG_ON(idx > bio->bi_vcnt);
bp = kmalloc(sizeof(*bp), GFP_ATOMIC);
if (!bp)
return NULL;
bp->err = 0;
bp->b1 = *bio;
bp->b2 = *bio;
bp->b1.bi_size = len;
bp->b2.bi_size -= len;
bp->b1.bi_vcnt = idx;
bp->b2.bi_idx = idx;
bp->b2.bi_sector += len >> 9;
if (offset) {
bp->bv1 = kmalloc(bio->bi_max_vecs * sizeof(struct bio_vec),
GFP_ATOMIC);
if (!bp->bv1)
goto split_fail_1;
bp->bv2 = kmalloc(bio->bi_max_vecs * sizeof(struct bio_vec),
GFP_ATOMIC);
if (!bp->bv2)
goto split_fail_2;
memcpy(bp->bv1, bio->bi_io_vec,
bio->bi_max_vecs * sizeof(struct bio_vec));
memcpy(bp->bv2, bio->bi_io_vec,
bio->bi_max_vecs * sizeof(struct bio_vec));
bp->b1.bi_io_vec = bp->bv1;
bp->b2.bi_io_vec = bp->bv2;
bp->b2.bi_io_vec[idx].bv_offset += offset;
bp->b2.bi_io_vec[idx].bv_len -= offset;
bp->b1.bi_io_vec[idx].bv_len = offset;
bp->b1.bi_vcnt++;
} else
bp->bv1 = bp->bv2 = NULL;
bp->b1.bi_private = bp;
bp->b2.bi_private = bp;
bp->b1.bi_end_io = nvme_bio_pair_endio;
bp->b2.bi_end_io = nvme_bio_pair_endio;
bp->parent = bio;
atomic_set(&bp->cnt, 2);
return bp;
split_fail_2:
kfree(bp->bv1);
split_fail_1:
kfree(bp);
return NULL;
}
static int nvme_split_and_submit(struct bio *bio, struct nvme_queue *nvmeq,
int idx, int len, int offset)
{
struct nvme_bio_pair *bp = nvme_bio_split(bio, idx, len, offset);
if (!bp)
return -ENOMEM;
if (bio_list_empty(&nvmeq->sq_cong))
add_wait_queue(&nvmeq->sq_full, &nvmeq->sq_cong_wait);
bio_list_add(&nvmeq->sq_cong, &bp->b1);
bio_list_add(&nvmeq->sq_cong, &bp->b2);
return 0;
}
/* NVMe scatterlists require no holes in the virtual address */
#define BIOVEC_NOT_VIRT_MERGEABLE(vec1, vec2) ((vec2)->bv_offset || \
(((vec1)->bv_offset + (vec1)->bv_len) % PAGE_SIZE))
static int nvme_map_bio(struct device *dev, struct nvme_iod *iod,
static int nvme_map_bio(struct nvme_queue *nvmeq, struct nvme_iod *iod,
struct bio *bio, enum dma_data_direction dma_dir, int psegs)
{
struct bio_vec *bvec, *bvprv = NULL;
struct scatterlist *sg = NULL;
int i, old_idx, length = 0, nsegs = 0;
int i, length = 0, nsegs = 0, split_len = bio->bi_size;
if (nvmeq->dev->stripe_size)
split_len = nvmeq->dev->stripe_size -
((bio->bi_sector << 9) & (nvmeq->dev->stripe_size - 1));
sg_init_table(iod->sg, psegs);
old_idx = bio->bi_idx;
bio_for_each_segment(bvec, bio, i) {
if (bvprv && BIOVEC_PHYS_MERGEABLE(bvprv, bvec)) {
sg->length += bvec->bv_len;
} else {
if (bvprv && BIOVEC_NOT_VIRT_MERGEABLE(bvprv, bvec))
break;
return nvme_split_and_submit(bio, nvmeq, i,
length, 0);
sg = sg ? sg + 1 : iod->sg;
sg_set_page(sg, bvec->bv_page, bvec->bv_len,
bvec->bv_offset);
nsegs++;
}
if (split_len - length < bvec->bv_len)
return nvme_split_and_submit(bio, nvmeq, i, split_len,
split_len - length);
length += bvec->bv_len;
bvprv = bvec;
}
bio->bi_idx = i;
iod->nents = nsegs;
sg_mark_end(sg);
if (dma_map_sg(dev, iod->sg, iod->nents, dma_dir) == 0) {
bio->bi_idx = old_idx;
if (dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir) == 0)
return -ENOMEM;
}
BUG_ON(length != bio->bi_size);
return length;
}
/*
* We reuse the small pool to allocate the 16-byte range here as it is not
* worth having a special pool for these or additional cases to handle freeing
* the iod.
*/
static int nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
struct bio *bio, struct nvme_iod *iod, int cmdid)
{
struct nvme_dsm_range *range;
struct nvme_command *cmnd = &nvmeq->sq_cmds[nvmeq->sq_tail];
range = dma_pool_alloc(nvmeq->dev->prp_small_pool, GFP_ATOMIC,
&iod->first_dma);
if (!range)
return -ENOMEM;
iod_list(iod)[0] = (__le64 *)range;
iod->npages = 0;
range->cattr = cpu_to_le32(0);
range->nlb = cpu_to_le32(bio->bi_size >> ns->lba_shift);
range->slba = cpu_to_le64(nvme_block_nr(ns, bio->bi_sector));
memset(cmnd, 0, sizeof(*cmnd));
cmnd->dsm.opcode = nvme_cmd_dsm;
cmnd->dsm.command_id = cmdid;
cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
cmnd->dsm.prp1 = cpu_to_le64(iod->first_dma);
cmnd->dsm.nr = 0;
cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
if (++nvmeq->sq_tail == nvmeq->q_depth)
nvmeq->sq_tail = 0;
writel(nvmeq->sq_tail, nvmeq->q_db);
return 0;
}
static int nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
int cmdid)
{
......@@ -527,7 +610,7 @@ static int nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
return 0;
}
static int nvme_submit_flush_data(struct nvme_queue *nvmeq, struct nvme_ns *ns)
int nvme_submit_flush_data(struct nvme_queue *nvmeq, struct nvme_ns *ns)
{
int cmdid = alloc_cmdid(nvmeq, (void *)CMD_CTX_FLUSH,
special_completion, NVME_IO_TIMEOUT);
......@@ -567,6 +650,12 @@ static int nvme_submit_bio_queue(struct nvme_queue *nvmeq, struct nvme_ns *ns,
if (unlikely(cmdid < 0))
goto free_iod;
if (bio->bi_rw & REQ_DISCARD) {
result = nvme_submit_discard(nvmeq, ns, bio, iod, cmdid);
if (result)
goto free_cmdid;
return result;
}
if ((bio->bi_rw & REQ_FLUSH) && !psegs)
return nvme_submit_flush(nvmeq, ns, cmdid);
......@@ -591,8 +680,8 @@ static int nvme_submit_bio_queue(struct nvme_queue *nvmeq, struct nvme_ns *ns,
dma_dir = DMA_FROM_DEVICE;
}
result = nvme_map_bio(nvmeq->q_dmadev, iod, bio, dma_dir, psegs);
if (result < 0)
result = nvme_map_bio(nvmeq, iod, bio, dma_dir, psegs);
if (result <= 0)
goto free_cmdid;
length = result;
......@@ -600,13 +689,11 @@ static int nvme_submit_bio_queue(struct nvme_queue *nvmeq, struct nvme_ns *ns,
cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
length = nvme_setup_prps(nvmeq->dev, &cmnd->common, iod, length,
GFP_ATOMIC);
cmnd->rw.slba = cpu_to_le64(bio->bi_sector >> (ns->lba_shift - 9));
cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, bio->bi_sector));
cmnd->rw.length = cpu_to_le16((length >> ns->lba_shift) - 1);
cmnd->rw.control = cpu_to_le16(control);
cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
bio->bi_sector += length >> 9;
if (++nvmeq->sq_tail == nvmeq->q_depth)
nvmeq->sq_tail = 0;
writel(nvmeq->sq_tail, nvmeq->q_db);
......@@ -724,8 +811,8 @@ static void sync_completion(struct nvme_dev *dev, void *ctx,
* Returns 0 on success. If the result is negative, it's a Linux error code;
* if the result is positive, it's an NVM Express status code
*/
static int nvme_submit_sync_cmd(struct nvme_queue *nvmeq,
struct nvme_command *cmd, u32 *result, unsigned timeout)
int nvme_submit_sync_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd,
u32 *result, unsigned timeout)
{
int cmdid;
struct sync_cmd_info cmdinfo;
......@@ -741,7 +828,7 @@ static int nvme_submit_sync_cmd(struct nvme_queue *nvmeq,
set_current_state(TASK_KILLABLE);
nvme_submit_cmd(nvmeq, cmd);
schedule();
schedule_timeout(timeout);
if (cmdinfo.status == -EINTR) {
nvme_abort_command(nvmeq, cmdid);
......@@ -754,7 +841,7 @@ static int nvme_submit_sync_cmd(struct nvme_queue *nvmeq,
return cmdinfo.status;
}
static int nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
int nvme_submit_admin_cmd(struct nvme_dev *dev, struct nvme_command *cmd,
u32 *result)
{
return nvme_submit_sync_cmd(dev->queues[0], cmd, result, ADMIN_TIMEOUT);
......@@ -827,7 +914,7 @@ static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
}
static int nvme_identify(struct nvme_dev *dev, unsigned nsid, unsigned cns,
int nvme_identify(struct nvme_dev *dev, unsigned nsid, unsigned cns,
dma_addr_t dma_addr)
{
struct nvme_command c;
......@@ -841,7 +928,7 @@ static int nvme_identify(struct nvme_dev *dev, unsigned nsid, unsigned cns,
return nvme_submit_admin_cmd(dev, &c, NULL);
}
static int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
dma_addr_t dma_addr, u32 *result)
{
struct nvme_command c;
......@@ -855,8 +942,8 @@ static int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
return nvme_submit_admin_cmd(dev, &c, result);
}
static int nvme_set_features(struct nvme_dev *dev, unsigned fid,
unsigned dword11, dma_addr_t dma_addr, u32 *result)
int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
dma_addr_t dma_addr, u32 *result)
{
struct nvme_command c;
......@@ -885,7 +972,7 @@ static void nvme_cancel_ios(struct nvme_queue *nvmeq, bool timeout)
void *ctx;
nvme_completion_fn fn;
static struct nvme_completion cqe = {
.status = cpu_to_le16(NVME_SC_ABORT_REQ) << 1,
.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1),
};
if (timeout && !time_after(now, info[cmdid].timeout))
......@@ -966,7 +1053,7 @@ static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
return nvmeq;
free_cqdma:
dma_free_coherent(dmadev, CQ_SIZE(nvmeq->q_depth), (void *)nvmeq->cqes,
dma_free_coherent(dmadev, CQ_SIZE(depth), (void *)nvmeq->cqes,
nvmeq->cq_dma_addr);
free_nvmeq:
kfree(nvmeq);
......@@ -1021,15 +1108,60 @@ static struct nvme_queue *nvme_create_queue(struct nvme_dev *dev, int qid,
return ERR_PTR(result);
}
static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
{
unsigned long timeout;
u32 bit = enabled ? NVME_CSTS_RDY : 0;
timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
msleep(100);
if (fatal_signal_pending(current))
return -EINTR;
if (time_after(jiffies, timeout)) {
dev_err(&dev->pci_dev->dev,
"Device not ready; aborting initialisation\n");
return -ENODEV;
}
}
return 0;
}
/*
* If the device has been passed off to us in an enabled state, just clear
* the enabled bit. The spec says we should set the 'shutdown notification
* bits', but doing so may cause the device to complete commands to the
* admin queue ... and we don't know what memory that might be pointing at!
*/
static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
{
u32 cc = readl(&dev->bar->cc);
if (cc & NVME_CC_ENABLE)
writel(cc & ~NVME_CC_ENABLE, &dev->bar->cc);
return nvme_wait_ready(dev, cap, false);
}
static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
{
return nvme_wait_ready(dev, cap, true);
}
static int nvme_configure_admin_queue(struct nvme_dev *dev)
{
int result = 0;
int result;
u32 aqa;
u64 cap;
unsigned long timeout;
u64 cap = readq(&dev->bar->cap);
struct nvme_queue *nvmeq;
dev->dbs = ((void __iomem *)dev->bar) + 4096;
dev->db_stride = NVME_CAP_STRIDE(cap);
result = nvme_disable_ctrl(dev, cap);
if (result < 0)
return result;
nvmeq = nvme_alloc_queue(dev, 0, 64, 0);
if (!nvmeq)
......@@ -1043,38 +1175,28 @@ static int nvme_configure_admin_queue(struct nvme_dev *dev)
dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
writel(0, &dev->bar->cc);
writel(aqa, &dev->bar->aqa);
writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
writel(dev->ctrl_config, &dev->bar->cc);
cap = readq(&dev->bar->cap);
timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
dev->db_stride = NVME_CAP_STRIDE(cap);
while (!result && !(readl(&dev->bar->csts) & NVME_CSTS_RDY)) {
msleep(100);
if (fatal_signal_pending(current))
result = -EINTR;
if (time_after(jiffies, timeout)) {
dev_err(&dev->pci_dev->dev,
"Device not ready; aborting initialisation\n");
result = -ENODEV;
}
}
if (result) {
nvme_free_queue_mem(nvmeq);
return result;
}
result = nvme_enable_ctrl(dev, cap);
if (result)
goto free_q;
result = queue_request_irq(dev, nvmeq, "nvme admin");
if (result)
goto free_q;
dev->queues[0] = nvmeq;
return result;
free_q:
nvme_free_queue_mem(nvmeq);
return result;
}
static struct nvme_iod *nvme_map_user_pages(struct nvme_dev *dev, int write,
struct nvme_iod *nvme_map_user_pages(struct nvme_dev *dev, int write,
unsigned long addr, unsigned length)
{
int i, err, count, nents, offset;
......@@ -1130,7 +1252,7 @@ static struct nvme_iod *nvme_map_user_pages(struct nvme_dev *dev, int write,
return ERR_PTR(err);
}
static void nvme_unmap_user_pages(struct nvme_dev *dev, int write,
void nvme_unmap_user_pages(struct nvme_dev *dev, int write,
struct nvme_iod *iod)
{
int i;
......@@ -1148,13 +1270,19 @@ static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
struct nvme_queue *nvmeq;
struct nvme_user_io io;
struct nvme_command c;
unsigned length;
int status;
struct nvme_iod *iod;
unsigned length, meta_len;
int status, i;
struct nvme_iod *iod, *meta_iod = NULL;
dma_addr_t meta_dma_addr;
void *meta, *uninitialized_var(meta_mem);
if (copy_from_user(&io, uio, sizeof(io)))
return -EFAULT;
length = (io.nblocks + 1) << ns->lba_shift;
meta_len = (io.nblocks + 1) * ns->ms;
if (meta_len && ((io.metadata & 3) || !io.metadata))
return -EINVAL;
switch (io.opcode) {
case nvme_cmd_write:
......@@ -1176,11 +1304,42 @@ static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
c.rw.slba = cpu_to_le64(io.slba);
c.rw.length = cpu_to_le16(io.nblocks);
c.rw.control = cpu_to_le16(io.control);
c.rw.dsmgmt = cpu_to_le16(io.dsmgmt);
c.rw.reftag = io.reftag;
c.rw.apptag = io.apptag;
c.rw.appmask = io.appmask;
/* XXX: metadata */
c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
c.rw.reftag = cpu_to_le32(io.reftag);
c.rw.apptag = cpu_to_le16(io.apptag);
c.rw.appmask = cpu_to_le16(io.appmask);
if (meta_len) {
meta_iod = nvme_map_user_pages(dev, io.opcode & 1, io.metadata, meta_len);
if (IS_ERR(meta_iod)) {
status = PTR_ERR(meta_iod);
meta_iod = NULL;
goto unmap;
}
meta_mem = dma_alloc_coherent(&dev->pci_dev->dev, meta_len,
&meta_dma_addr, GFP_KERNEL);
if (!meta_mem) {
status = -ENOMEM;
goto unmap;
}
if (io.opcode & 1) {
int meta_offset = 0;
for (i = 0; i < meta_iod->nents; i++) {
meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
meta_iod->sg[i].offset;
memcpy(meta_mem + meta_offset, meta,
meta_iod->sg[i].length);
kunmap_atomic(meta);
meta_offset += meta_iod->sg[i].length;
}
}
c.rw.metadata = cpu_to_le64(meta_dma_addr);
}
length = nvme_setup_prps(dev, &c.common, iod, length, GFP_KERNEL);
nvmeq = get_nvmeq(dev);
......@@ -1196,8 +1355,33 @@ static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
else
status = nvme_submit_sync_cmd(nvmeq, &c, NULL, NVME_IO_TIMEOUT);
if (meta_len) {
if (status == NVME_SC_SUCCESS && !(io.opcode & 1)) {
int meta_offset = 0;
for (i = 0; i < meta_iod->nents; i++) {
meta = kmap_atomic(sg_page(&meta_iod->sg[i])) +
meta_iod->sg[i].offset;
memcpy(meta, meta_mem + meta_offset,
meta_iod->sg[i].length);
kunmap_atomic(meta);
meta_offset += meta_iod->sg[i].length;
}
}
dma_free_coherent(&dev->pci_dev->dev, meta_len, meta_mem,
meta_dma_addr);
}
unmap:
nvme_unmap_user_pages(dev, io.opcode & 1, iod);
nvme_free_iod(dev, iod);
if (meta_iod) {
nvme_unmap_user_pages(dev, io.opcode & 1, meta_iod);
nvme_free_iod(dev, meta_iod);
}
return status;
}
......@@ -1208,6 +1392,7 @@ static int nvme_user_admin_cmd(struct nvme_dev *dev,
struct nvme_command c;
int status, length;
struct nvme_iod *uninitialized_var(iod);
unsigned timeout;
if (!capable(CAP_SYS_ADMIN))
return -EACCES;
......@@ -1237,10 +1422,13 @@ static int nvme_user_admin_cmd(struct nvme_dev *dev,
GFP_KERNEL);
}
timeout = cmd.timeout_ms ? msecs_to_jiffies(cmd.timeout_ms) :
ADMIN_TIMEOUT;
if (length != cmd.data_len)
status = -ENOMEM;
else
status = nvme_submit_admin_cmd(dev, &c, &cmd.result);
status = nvme_submit_sync_cmd(dev->queues[0], &c, &cmd.result,
timeout);
if (cmd.data_len) {
nvme_unmap_user_pages(dev, cmd.opcode & 1, iod);
......@@ -1266,6 +1454,10 @@ static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
return nvme_user_admin_cmd(ns->dev, (void __user *)arg);
case NVME_IOCTL_SUBMIT_IO:
return nvme_submit_io(ns, (void __user *)arg);
case SG_GET_VERSION_NUM:
return nvme_sg_get_version_num((void __user *)arg);
case SG_IO:
return nvme_sg_io(ns, (void __user *)arg);
default:
return -ENOTTY;
}
......@@ -1282,13 +1474,17 @@ static void nvme_resubmit_bios(struct nvme_queue *nvmeq)
while (bio_list_peek(&nvmeq->sq_cong)) {
struct bio *bio = bio_list_pop(&nvmeq->sq_cong);
struct nvme_ns *ns = bio->bi_bdev->bd_disk->private_data;
if (bio_list_empty(&nvmeq->sq_cong))
remove_wait_queue(&nvmeq->sq_full,
&nvmeq->sq_cong_wait);
if (nvme_submit_bio_queue(nvmeq, ns, bio)) {
if (bio_list_empty(&nvmeq->sq_cong))
add_wait_queue(&nvmeq->sq_full,
&nvmeq->sq_cong_wait);
bio_list_add_head(&nvmeq->sq_cong, bio);
break;
}
if (bio_list_empty(&nvmeq->sq_cong))
remove_wait_queue(&nvmeq->sq_full,
&nvmeq->sq_cong_wait);
}
}
......@@ -1297,7 +1493,7 @@ static int nvme_kthread(void *data)
struct nvme_dev *dev;
while (!kthread_should_stop()) {
__set_current_state(TASK_RUNNING);
set_current_state(TASK_INTERRUPTIBLE);
spin_lock(&dev_list_lock);
list_for_each_entry(dev, &dev_list, node) {
int i;
......@@ -1314,8 +1510,7 @@ static int nvme_kthread(void *data)
}
}
spin_unlock(&dev_list_lock);
set_current_state(TASK_INTERRUPTIBLE);
schedule_timeout(HZ);
schedule_timeout(round_jiffies_relative(HZ));
}
return 0;
}
......@@ -1347,6 +1542,16 @@ static void nvme_put_ns_idx(int index)
spin_unlock(&dev_list_lock);
}
static void nvme_config_discard(struct nvme_ns *ns)
{
u32 logical_block_size = queue_logical_block_size(ns->queue);
ns->queue->limits.discard_zeroes_data = 0;
ns->queue->limits.discard_alignment = logical_block_size;
ns->queue->limits.discard_granularity = logical_block_size;
ns->queue->limits.max_discard_sectors = 0xffffffff;
queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
}
static struct nvme_ns *nvme_alloc_ns(struct nvme_dev *dev, int nsid,
struct nvme_id_ns *id, struct nvme_lba_range_type *rt)
{
......@@ -1366,7 +1571,6 @@ static struct nvme_ns *nvme_alloc_ns(struct nvme_dev *dev, int nsid,
ns->queue->queue_flags = QUEUE_FLAG_DEFAULT;
queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
/* queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue); */
blk_queue_make_request(ns->queue, nvme_make_request);
ns->dev = dev;
ns->queue->queuedata = ns;
......@@ -1378,6 +1582,7 @@ static struct nvme_ns *nvme_alloc_ns(struct nvme_dev *dev, int nsid,
ns->disk = disk;
lbaf = id->flbas & 0xf;
ns->lba_shift = id->lbaf[lbaf].ds;
ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
if (dev->max_hw_sectors)
blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
......@@ -1392,6 +1597,9 @@ static struct nvme_ns *nvme_alloc_ns(struct nvme_dev *dev, int nsid,
sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
if (dev->oncs & NVME_CTRL_ONCS_DSM)
nvme_config_discard(ns);
return ns;
out_free_queue:
......@@ -1496,14 +1704,21 @@ static void nvme_free_queues(struct nvme_dev *dev)
nvme_free_queue(dev, i);
}
/*
* Return: error value if an error occurred setting up the queues or calling
* Identify Device. 0 if these succeeded, even if adding some of the
* namespaces failed. At the moment, these failures are silent. TBD which
* failures should be reported.
*/
static int nvme_dev_add(struct nvme_dev *dev)
{
int res, nn, i;
struct nvme_ns *ns, *next;
struct nvme_ns *ns;
struct nvme_id_ctrl *ctrl;
struct nvme_id_ns *id_ns;
void *mem;
dma_addr_t dma_addr;
int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
res = nvme_setup_io_queues(dev);
if (res)
......@@ -1511,22 +1726,26 @@ static int nvme_dev_add(struct nvme_dev *dev)
mem = dma_alloc_coherent(&dev->pci_dev->dev, 8192, &dma_addr,
GFP_KERNEL);
if (!mem)
return -ENOMEM;
res = nvme_identify(dev, 0, 1, dma_addr);
if (res) {
res = -EIO;
goto out_free;
goto out;
}
ctrl = mem;
nn = le32_to_cpup(&ctrl->nn);
dev->oncs = le16_to_cpup(&ctrl->oncs);
memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
if (ctrl->mdts) {
int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
if (ctrl->mdts)
dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
}
if ((dev->pci_dev->vendor == PCI_VENDOR_ID_INTEL) &&
(dev->pci_dev->device == 0x0953) && ctrl->vs[3])
dev->stripe_size = 1 << (ctrl->vs[3] + shift);
id_ns = mem;
for (i = 1; i <= nn; i++) {
......@@ -1548,14 +1767,7 @@ static int nvme_dev_add(struct nvme_dev *dev)
}
list_for_each_entry(ns, &dev->namespaces, list)
add_disk(ns->disk);
goto out;
out_free:
list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
list_del(&ns->list);
nvme_ns_free(ns);
}
res = 0;
out:
dma_free_coherent(&dev->pci_dev->dev, 8192, mem, dma_addr);
......@@ -1634,6 +1846,56 @@ static void nvme_release_instance(struct nvme_dev *dev)
spin_unlock(&dev_list_lock);
}
static void nvme_free_dev(struct kref *kref)
{
struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
nvme_dev_remove(dev);
pci_disable_msix(dev->pci_dev);
iounmap(dev->bar);
nvme_release_instance(dev);
nvme_release_prp_pools(dev);
pci_disable_device(dev->pci_dev);
pci_release_regions(dev->pci_dev);
kfree(dev->queues);
kfree(dev->entry);
kfree(dev);
}
static int nvme_dev_open(struct inode *inode, struct file *f)
{
struct nvme_dev *dev = container_of(f->private_data, struct nvme_dev,
miscdev);
kref_get(&dev->kref);
f->private_data = dev;
return 0;
}
static int nvme_dev_release(struct inode *inode, struct file *f)
{
struct nvme_dev *dev = f->private_data;
kref_put(&dev->kref, nvme_free_dev);
return 0;
}
static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
{
struct nvme_dev *dev = f->private_data;
switch (cmd) {
case NVME_IOCTL_ADMIN_CMD:
return nvme_user_admin_cmd(dev, (void __user *)arg);
default:
return -ENOTTY;
}
}
static const struct file_operations nvme_dev_fops = {
.owner = THIS_MODULE,
.open = nvme_dev_open,
.release = nvme_dev_release,
.unlocked_ioctl = nvme_dev_ioctl,
.compat_ioctl = nvme_dev_ioctl,
};
static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{
int bars, result = -ENOMEM;
......@@ -1692,8 +1954,20 @@ static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
if (result)
goto delete;
scnprintf(dev->name, sizeof(dev->name), "nvme%d", dev->instance);
dev->miscdev.minor = MISC_DYNAMIC_MINOR;
dev->miscdev.parent = &pdev->dev;
dev->miscdev.name = dev->name;
dev->miscdev.fops = &nvme_dev_fops;
result = misc_register(&dev->miscdev);
if (result)
goto remove;
kref_init(&dev->kref);
return 0;
remove:
nvme_dev_remove(dev);
delete:
spin_lock(&dev_list_lock);
list_del(&dev->node);
......@@ -1719,16 +1993,8 @@ static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
static void nvme_remove(struct pci_dev *pdev)
{
struct nvme_dev *dev = pci_get_drvdata(pdev);
nvme_dev_remove(dev);
pci_disable_msix(pdev);
iounmap(dev->bar);
nvme_release_instance(dev);
nvme_release_prp_pools(dev);
pci_disable_device(pdev);
pci_release_regions(pdev);
kfree(dev->queues);
kfree(dev->entry);
kfree(dev);
misc_deregister(&dev->miscdev);
kref_put(&dev->kref, nvme_free_dev);
}
/* These functions are yet to be implemented */
......
drivers/block/nvme-scsi.c 0 → 100644
浏览文件 @ 2d4fe278
/*
* NVM Express device driver
* Copyright (c) 2011, Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*/
/*
* Refer to the SCSI-NVMe Translation spec for details on how
* each command is translated.
*/
#include <linux/nvme.h>
#include <linux/bio.h>
#include <linux/bitops.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/fs.h>
#include <linux/genhd.h>
#include <linux/idr.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kdev_t.h>
#include <linux/kthread.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/pci.h>
#include <linux/poison.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <linux/version.h>
#include <scsi/sg.h>
#include <scsi/scsi.h>
static int sg_version_num = 30534; /* 2 digits for each component */
#define SNTI_TRANSLATION_SUCCESS 0
#define SNTI_INTERNAL_ERROR 1
/* VPD Page Codes */
#define VPD_SUPPORTED_PAGES 0x00
#define VPD_SERIAL_NUMBER 0x80
#define VPD_DEVICE_IDENTIFIERS 0x83
#define VPD_EXTENDED_INQUIRY 0x86
#define VPD_BLOCK_DEV_CHARACTERISTICS 0xB1
/* CDB offsets */
#define REPORT_LUNS_CDB_ALLOC_LENGTH_OFFSET 6
#define REPORT_LUNS_SR_OFFSET 2
#define READ_CAP_16_CDB_ALLOC_LENGTH_OFFSET 10
#define REQUEST_SENSE_CDB_ALLOC_LENGTH_OFFSET 4
#define REQUEST_SENSE_DESC_OFFSET 1
#define REQUEST_SENSE_DESC_MASK 0x01
#define DESCRIPTOR_FORMAT_SENSE_DATA_TYPE 1
#define INQUIRY_EVPD_BYTE_OFFSET 1
#define INQUIRY_PAGE_CODE_BYTE_OFFSET 2
#define INQUIRY_EVPD_BIT_MASK 1
#define INQUIRY_CDB_ALLOCATION_LENGTH_OFFSET 3
#define START_STOP_UNIT_CDB_IMMED_OFFSET 1
#define START_STOP_UNIT_CDB_IMMED_MASK 0x1
#define START_STOP_UNIT_CDB_POWER_COND_MOD_OFFSET 3
#define START_STOP_UNIT_CDB_POWER_COND_MOD_MASK 0xF
#define START_STOP_UNIT_CDB_POWER_COND_OFFSET 4
#define START_STOP_UNIT_CDB_POWER_COND_MASK 0xF0
#define START_STOP_UNIT_CDB_NO_FLUSH_OFFSET 4
#define START_STOP_UNIT_CDB_NO_FLUSH_MASK 0x4
#define START_STOP_UNIT_CDB_START_OFFSET 4
#define START_STOP_UNIT_CDB_START_MASK 0x1
#define WRITE_BUFFER_CDB_MODE_OFFSET 1
#define WRITE_BUFFER_CDB_MODE_MASK 0x1F
#define WRITE_BUFFER_CDB_BUFFER_ID_OFFSET 2
#define WRITE_BUFFER_CDB_BUFFER_OFFSET_OFFSET 3
#define WRITE_BUFFER_CDB_PARM_LIST_LENGTH_OFFSET 6
#define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_OFFSET 1
#define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_MASK 0xC0
#define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_SHIFT 6
#define FORMAT_UNIT_CDB_LONG_LIST_OFFSET 1
#define FORMAT_UNIT_CDB_LONG_LIST_MASK 0x20
#define FORMAT_UNIT_CDB_FORMAT_DATA_OFFSET 1
#define FORMAT_UNIT_CDB_FORMAT_DATA_MASK 0x10
#define FORMAT_UNIT_SHORT_PARM_LIST_LEN 4
#define FORMAT_UNIT_LONG_PARM_LIST_LEN 8
#define FORMAT_UNIT_PROT_INT_OFFSET 3
#define FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET 0
#define FORMAT_UNIT_PROT_FIELD_USAGE_MASK 0x07
#define UNMAP_CDB_PARAM_LIST_LENGTH_OFFSET 7
/* Misc. defines */
#define NIBBLE_SHIFT 4
#define FIXED_SENSE_DATA 0x70
#define DESC_FORMAT_SENSE_DATA 0x72
#define FIXED_SENSE_DATA_ADD_LENGTH 10
#define LUN_ENTRY_SIZE 8
#define LUN_DATA_HEADER_SIZE 8
#define ALL_LUNS_RETURNED 0x02
#define ALL_WELL_KNOWN_LUNS_RETURNED 0x01
#define RESTRICTED_LUNS_RETURNED 0x00
#define NVME_POWER_STATE_START_VALID 0x00
#define NVME_POWER_STATE_ACTIVE 0x01
#define NVME_POWER_STATE_IDLE 0x02
#define NVME_POWER_STATE_STANDBY 0x03
#define NVME_POWER_STATE_LU_CONTROL 0x07
#define POWER_STATE_0 0
#define POWER_STATE_1 1
#define POWER_STATE_2 2
#define POWER_STATE_3 3
#define DOWNLOAD_SAVE_ACTIVATE 0x05
#define DOWNLOAD_SAVE_DEFER_ACTIVATE 0x0E
#define ACTIVATE_DEFERRED_MICROCODE 0x0F
#define FORMAT_UNIT_IMMED_MASK 0x2
#define FORMAT_UNIT_IMMED_OFFSET 1
#define KELVIN_TEMP_FACTOR 273
#define FIXED_FMT_SENSE_DATA_SIZE 18
#define DESC_FMT_SENSE_DATA_SIZE 8
/* SCSI/NVMe defines and bit masks */
#define INQ_STANDARD_INQUIRY_PAGE 0x00
#define INQ_SUPPORTED_VPD_PAGES_PAGE 0x00
#define INQ_UNIT_SERIAL_NUMBER_PAGE 0x80
#define INQ_DEVICE_IDENTIFICATION_PAGE 0x83
#define INQ_EXTENDED_INQUIRY_DATA_PAGE 0x86
#define INQ_BDEV_CHARACTERISTICS_PAGE 0xB1
#define INQ_SERIAL_NUMBER_LENGTH 0x14
#define INQ_NUM_SUPPORTED_VPD_PAGES 5
#define VERSION_SPC_4 0x06
#define ACA_UNSUPPORTED 0
#define STANDARD_INQUIRY_LENGTH 36
#define ADDITIONAL_STD_INQ_LENGTH 31
#define EXTENDED_INQUIRY_DATA_PAGE_LENGTH 0x3C
#define RESERVED_FIELD 0
/* SCSI READ/WRITE Defines */
#define IO_CDB_WP_MASK 0xE0
#define IO_CDB_WP_SHIFT 5
#define IO_CDB_FUA_MASK 0x8
#define IO_6_CDB_LBA_OFFSET 0
#define IO_6_CDB_LBA_MASK 0x001FFFFF
#define IO_6_CDB_TX_LEN_OFFSET 4
#define IO_6_DEFAULT_TX_LEN 256
#define IO_10_CDB_LBA_OFFSET 2
#define IO_10_CDB_TX_LEN_OFFSET 7
#define IO_10_CDB_WP_OFFSET 1
#define IO_10_CDB_FUA_OFFSET 1
#define IO_12_CDB_LBA_OFFSET 2
#define IO_12_CDB_TX_LEN_OFFSET 6
#define IO_12_CDB_WP_OFFSET 1
#define IO_12_CDB_FUA_OFFSET 1
#define IO_16_CDB_FUA_OFFSET 1
#define IO_16_CDB_WP_OFFSET 1
#define IO_16_CDB_LBA_OFFSET 2
#define IO_16_CDB_TX_LEN_OFFSET 10
/* Mode Sense/Select defines */
#define MODE_PAGE_INFO_EXCEP 0x1C
#define MODE_PAGE_CACHING 0x08
#define MODE_PAGE_CONTROL 0x0A
#define MODE_PAGE_POWER_CONDITION 0x1A
#define MODE_PAGE_RETURN_ALL 0x3F
#define MODE_PAGE_BLK_DES_LEN 0x08
#define MODE_PAGE_LLBAA_BLK_DES_LEN 0x10
#define MODE_PAGE_CACHING_LEN 0x14
#define MODE_PAGE_CONTROL_LEN 0x0C
#define MODE_PAGE_POW_CND_LEN 0x28
#define MODE_PAGE_INF_EXC_LEN 0x0C
#define MODE_PAGE_ALL_LEN 0x54
#define MODE_SENSE6_MPH_SIZE 4
#define MODE_SENSE6_ALLOC_LEN_OFFSET 4
#define MODE_SENSE_PAGE_CONTROL_OFFSET 2
#define MODE_SENSE_PAGE_CONTROL_MASK 0xC0
#define MODE_SENSE_PAGE_CODE_OFFSET 2
#define MODE_SENSE_PAGE_CODE_MASK 0x3F
#define MODE_SENSE_LLBAA_OFFSET 1
#define MODE_SENSE_LLBAA_MASK 0x10
#define MODE_SENSE_LLBAA_SHIFT 4
#define MODE_SENSE_DBD_OFFSET 1
#define MODE_SENSE_DBD_MASK 8
#define MODE_SENSE_DBD_SHIFT 3
#define MODE_SENSE10_MPH_SIZE 8
#define MODE_SENSE10_ALLOC_LEN_OFFSET 7
#define MODE_SELECT_CDB_PAGE_FORMAT_OFFSET 1
#define MODE_SELECT_CDB_SAVE_PAGES_OFFSET 1
#define MODE_SELECT_6_CDB_PARAM_LIST_LENGTH_OFFSET 4
#define MODE_SELECT_10_CDB_PARAM_LIST_LENGTH_OFFSET 7
#define MODE_SELECT_CDB_PAGE_FORMAT_MASK 0x10
#define MODE_SELECT_CDB_SAVE_PAGES_MASK 0x1
#define MODE_SELECT_6_BD_OFFSET 3
#define MODE_SELECT_10_BD_OFFSET 6
#define MODE_SELECT_10_LLBAA_OFFSET 4
#define MODE_SELECT_10_LLBAA_MASK 1
#define MODE_SELECT_6_MPH_SIZE 4
#define MODE_SELECT_10_MPH_SIZE 8
#define CACHING_MODE_PAGE_WCE_MASK 0x04
#define MODE_SENSE_BLK_DESC_ENABLED 0
#define MODE_SENSE_BLK_DESC_COUNT 1
#define MODE_SELECT_PAGE_CODE_MASK 0x3F
#define SHORT_DESC_BLOCK 8
#define LONG_DESC_BLOCK 16
#define MODE_PAGE_POW_CND_LEN_FIELD 0x26
#define MODE_PAGE_INF_EXC_LEN_FIELD 0x0A
#define MODE_PAGE_CACHING_LEN_FIELD 0x12
#define MODE_PAGE_CONTROL_LEN_FIELD 0x0A
#define MODE_SENSE_PC_CURRENT_VALUES 0
/* Log Sense defines */
#define LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE 0x00
#define LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH 0x07
#define LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE 0x2F
#define LOG_PAGE_TEMPERATURE_PAGE 0x0D
#define LOG_SENSE_CDB_SP_OFFSET 1
#define LOG_SENSE_CDB_SP_NOT_ENABLED 0
#define LOG_SENSE_CDB_PC_OFFSET 2
#define LOG_SENSE_CDB_PC_MASK 0xC0
#define LOG_SENSE_CDB_PC_SHIFT 6
#define LOG_SENSE_CDB_PC_CUMULATIVE_VALUES 1
#define LOG_SENSE_CDB_PAGE_CODE_MASK 0x3F
#define LOG_SENSE_CDB_ALLOC_LENGTH_OFFSET 7
#define REMAINING_INFO_EXCP_PAGE_LENGTH 0x8
#define LOG_INFO_EXCP_PAGE_LENGTH 0xC
#define REMAINING_TEMP_PAGE_LENGTH 0xC
#define LOG_TEMP_PAGE_LENGTH 0x10
#define LOG_TEMP_UNKNOWN 0xFF
#define SUPPORTED_LOG_PAGES_PAGE_LENGTH 0x3
/* Read Capacity defines */
#define READ_CAP_10_RESP_SIZE 8
#define READ_CAP_16_RESP_SIZE 32
/* NVMe Namespace and Command Defines */
#define NVME_GET_SMART_LOG_PAGE 0x02
#define NVME_GET_FEAT_TEMP_THRESH 0x04
#define BYTES_TO_DWORDS 4
#define NVME_MAX_FIRMWARE_SLOT 7
/* Report LUNs defines */
#define REPORT_LUNS_FIRST_LUN_OFFSET 8
/* SCSI ADDITIONAL SENSE Codes */
#define SCSI_ASC_NO_SENSE 0x00
#define SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT 0x03
#define SCSI_ASC_LUN_NOT_READY 0x04
#define SCSI_ASC_WARNING 0x0B
#define SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED 0x10
#define SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED 0x10
#define SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED 0x10
#define SCSI_ASC_UNRECOVERED_READ_ERROR 0x11
#define SCSI_ASC_MISCOMPARE_DURING_VERIFY 0x1D
#define SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID 0x20
#define SCSI_ASC_ILLEGAL_COMMAND 0x20
#define SCSI_ASC_ILLEGAL_BLOCK 0x21
#define SCSI_ASC_INVALID_CDB 0x24
#define SCSI_ASC_INVALID_LUN 0x25
#define SCSI_ASC_INVALID_PARAMETER 0x26
#define SCSI_ASC_FORMAT_COMMAND_FAILED 0x31
#define SCSI_ASC_INTERNAL_TARGET_FAILURE 0x44
/* SCSI ADDITIONAL SENSE Code Qualifiers */
#define SCSI_ASCQ_CAUSE_NOT_REPORTABLE 0x00
#define SCSI_ASCQ_FORMAT_COMMAND_FAILED 0x01
#define SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED 0x01
#define SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED 0x02
#define SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED 0x03
#define SCSI_ASCQ_FORMAT_IN_PROGRESS 0x04
#define SCSI_ASCQ_POWER_LOSS_EXPECTED 0x08
#define SCSI_ASCQ_INVALID_LUN_ID 0x09
/**
* DEVICE_SPECIFIC_PARAMETER in mode parameter header (see sbc2r16) to
* enable DPOFUA support type 0x10 value.
*/
#define DEVICE_SPECIFIC_PARAMETER 0
#define VPD_ID_DESCRIPTOR_LENGTH sizeof(VPD_IDENTIFICATION_DESCRIPTOR)
/* MACROs to extract information from CDBs */
#define GET_OPCODE(cdb) cdb[0]
#define GET_U8_FROM_CDB(cdb, index) (cdb[index] << 0)
#define GET_U16_FROM_CDB(cdb, index) ((cdb[index] << 8) | (cdb[index + 1] << 0))
#define GET_U24_FROM_CDB(cdb, index) ((cdb[index] << 16) | \
(cdb[index + 1] << 8) | \
(cdb[index + 2] << 0))
#define GET_U32_FROM_CDB(cdb, index) ((cdb[index] << 24) | \
(cdb[index + 1] << 16) | \
(cdb[index + 2] << 8) | \
(cdb[index + 3] << 0))
#define GET_U64_FROM_CDB(cdb, index) ((((u64)cdb[index]) << 56) | \
(((u64)cdb[index + 1]) << 48) | \
(((u64)cdb[index + 2]) << 40) | \
(((u64)cdb[index + 3]) << 32) | \
(((u64)cdb[index + 4]) << 24) | \
(((u64)cdb[index + 5]) << 16) | \
(((u64)cdb[index + 6]) << 8) | \
(((u64)cdb[index + 7]) << 0))
/* Inquiry Helper Macros */
#define GET_INQ_EVPD_BIT(cdb) \
((GET_U8_FROM_CDB(cdb, INQUIRY_EVPD_BYTE_OFFSET) & \
INQUIRY_EVPD_BIT_MASK) ? 1 : 0)
#define GET_INQ_PAGE_CODE(cdb) \
(GET_U8_FROM_CDB(cdb, INQUIRY_PAGE_CODE_BYTE_OFFSET))
#define GET_INQ_ALLOC_LENGTH(cdb) \
(GET_U16_FROM_CDB(cdb, INQUIRY_CDB_ALLOCATION_LENGTH_OFFSET))
/* Report LUNs Helper Macros */
#define GET_REPORT_LUNS_ALLOC_LENGTH(cdb) \
(GET_U32_FROM_CDB(cdb, REPORT_LUNS_CDB_ALLOC_LENGTH_OFFSET))
/* Read Capacity Helper Macros */
#define GET_READ_CAP_16_ALLOC_LENGTH(cdb) \
(GET_U32_FROM_CDB(cdb, READ_CAP_16_CDB_ALLOC_LENGTH_OFFSET))
#define IS_READ_CAP_16(cdb) \
((cdb[0] == SERVICE_ACTION_IN && cdb[1] == SAI_READ_CAPACITY_16) ? 1 : 0)
/* Request Sense Helper Macros */
#define GET_REQUEST_SENSE_ALLOC_LENGTH(cdb) \
(GET_U8_FROM_CDB(cdb, REQUEST_SENSE_CDB_ALLOC_LENGTH_OFFSET))
/* Mode Sense Helper Macros */
#define GET_MODE_SENSE_DBD(cdb) \
((GET_U8_FROM_CDB(cdb, MODE_SENSE_DBD_OFFSET) & MODE_SENSE_DBD_MASK) >> \
MODE_SENSE_DBD_SHIFT)
#define GET_MODE_SENSE_LLBAA(cdb) \
((GET_U8_FROM_CDB(cdb, MODE_SENSE_LLBAA_OFFSET) & \
MODE_SENSE_LLBAA_MASK) >> MODE_SENSE_LLBAA_SHIFT)
#define GET_MODE_SENSE_MPH_SIZE(cdb10) \
(cdb10 ? MODE_SENSE10_MPH_SIZE : MODE_SENSE6_MPH_SIZE)
/* Struct to gather data that needs to be extracted from a SCSI CDB.
Not conforming to any particular CDB variant, but compatible with all. */
struct nvme_trans_io_cdb {
u8 fua;
u8 prot_info;
u64 lba;
u32 xfer_len;
};
/* Internal Helper Functions */
/* Copy data to userspace memory */
static int nvme_trans_copy_to_user(struct sg_io_hdr *hdr, void *from,
unsigned long n)
{
int res = SNTI_TRANSLATION_SUCCESS;
unsigned long not_copied;
int i;
void *index = from;
size_t remaining = n;
size_t xfer_len;
if (hdr->iovec_count > 0) {
struct sg_iovec sgl;
for (i = 0; i < hdr->iovec_count; i++) {
not_copied = copy_from_user(&sgl, hdr->dxferp +
i * sizeof(struct sg_iovec),
sizeof(struct sg_iovec));
if (not_copied)
return -EFAULT;
xfer_len = min(remaining, sgl.iov_len);
not_copied = copy_to_user(sgl.iov_base, index,
xfer_len);
if (not_copied) {
res = -EFAULT;
break;
}
index += xfer_len;
remaining -= xfer_len;
if (remaining == 0)
break;
}
return res;
}
not_copied = copy_to_user(hdr->dxferp, from, n);
if (not_copied)
res = -EFAULT;
return res;
}
/* Copy data from userspace memory */
static int nvme_trans_copy_from_user(struct sg_io_hdr *hdr, void *to,
unsigned long n)
{
int res = SNTI_TRANSLATION_SUCCESS;
unsigned long not_copied;
int i;
void *index = to;
size_t remaining = n;
size_t xfer_len;
if (hdr->iovec_count > 0) {
struct sg_iovec sgl;
for (i = 0; i < hdr->iovec_count; i++) {
not_copied = copy_from_user(&sgl, hdr->dxferp +
i * sizeof(struct sg_iovec),
sizeof(struct sg_iovec));
if (not_copied)
return -EFAULT;
xfer_len = min(remaining, sgl.iov_len);
not_copied = copy_from_user(index, sgl.iov_base,
xfer_len);
if (not_copied) {
res = -EFAULT;
break;
}
index += xfer_len;
remaining -= xfer_len;
if (remaining == 0)
break;
}
return res;
}
not_copied = copy_from_user(to, hdr->dxferp, n);
if (not_copied)
res = -EFAULT;
return res;
}
/* Status/Sense Buffer Writeback */
static int nvme_trans_completion(struct sg_io_hdr *hdr, u8 status, u8 sense_key,
u8 asc, u8 ascq)
{
int res = SNTI_TRANSLATION_SUCCESS;
u8 xfer_len;
u8 resp[DESC_FMT_SENSE_DATA_SIZE];
if (scsi_status_is_good(status)) {
hdr->status = SAM_STAT_GOOD;
hdr->masked_status = GOOD;
hdr->host_status = DID_OK;
hdr->driver_status = DRIVER_OK;
hdr->sb_len_wr = 0;
} else {
hdr->status = status;
hdr->masked_status = status >> 1;
hdr->host_status = DID_OK;
hdr->driver_status = DRIVER_OK;
memset(resp, 0, DESC_FMT_SENSE_DATA_SIZE);
resp[0] = DESC_FORMAT_SENSE_DATA;
resp[1] = sense_key;
resp[2] = asc;
resp[3] = ascq;
xfer_len = min_t(u8, hdr->mx_sb_len, DESC_FMT_SENSE_DATA_SIZE);
hdr->sb_len_wr = xfer_len;
if (copy_to_user(hdr->sbp, resp, xfer_len) > 0)
res = -EFAULT;
}
return res;
}
static int nvme_trans_status_code(struct sg_io_hdr *hdr, int nvme_sc)
{
u8 status, sense_key, asc, ascq;
int res = SNTI_TRANSLATION_SUCCESS;
/* For non-nvme (Linux) errors, simply return the error code */
if (nvme_sc < 0)
return nvme_sc;
/* Mask DNR, More, and reserved fields */
nvme_sc &= 0x7FF;
switch (nvme_sc) {
/* Generic Command Status */
case NVME_SC_SUCCESS:
status = SAM_STAT_GOOD;
sense_key = NO_SENSE;
asc = SCSI_ASC_NO_SENSE;
ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
break;
case NVME_SC_INVALID_OPCODE:
status = SAM_STAT_CHECK_CONDITION;
sense_key = ILLEGAL_REQUEST;
asc = SCSI_ASC_ILLEGAL_COMMAND;
ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
break;
case NVME_SC_INVALID_FIELD:
status = SAM_STAT_CHECK_CONDITION;
sense_key = ILLEGAL_REQUEST;
asc = SCSI_ASC_INVALID_CDB;
ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
break;
case NVME_SC_DATA_XFER_ERROR:
status = SAM_STAT_CHECK_CONDITION;
sense_key = MEDIUM_ERROR;
asc = SCSI_ASC_NO_SENSE;
ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
break;
case NVME_SC_POWER_LOSS:
status = SAM_STAT_TASK_ABORTED;
sense_key = ABORTED_COMMAND;
asc = SCSI_ASC_WARNING;
ascq = SCSI_ASCQ_POWER_LOSS_EXPECTED;
break;
case NVME_SC_INTERNAL:
status = SAM_STAT_CHECK_CONDITION;
sense_key = HARDWARE_ERROR;
asc = SCSI_ASC_INTERNAL_TARGET_FAILURE;
ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
break;
case NVME_SC_ABORT_REQ:
status = SAM_STAT_TASK_ABORTED;
sense_key = ABORTED_COMMAND;
asc = SCSI_ASC_NO_SENSE;
ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
break;
case NVME_SC_ABORT_QUEUE:
status = SAM_STAT_TASK_ABORTED;
sense_key = ABORTED_COMMAND;
asc = SCSI_ASC_NO_SENSE;
ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
break;
case NVME_SC_FUSED_FAIL:
status = SAM_STAT_TASK_ABORTED;
sense_key = ABORTED_COMMAND;
asc = SCSI_ASC_NO_SENSE;
ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
break;
case NVME_SC_FUSED_MISSING:
status = SAM_STAT_TASK_ABORTED;
sense_key = ABORTED_COMMAND;
asc = SCSI_ASC_NO_SENSE;
ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
break;
case NVME_SC_INVALID_NS:
status = SAM_STAT_CHECK_CONDITION;
sense_key = ILLEGAL_REQUEST;
asc = SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID;
ascq = SCSI_ASCQ_INVALID_LUN_ID;
break;
case NVME_SC_LBA_RANGE:
status = SAM_STAT_CHECK_CONDITION;
sense_key = ILLEGAL_REQUEST;
asc = SCSI_ASC_ILLEGAL_BLOCK;
ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
break;
case NVME_SC_CAP_EXCEEDED:
status = SAM_STAT_CHECK_CONDITION;
sense_key = MEDIUM_ERROR;
asc = SCSI_ASC_NO_SENSE;
ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
break;
case NVME_SC_NS_NOT_READY:
status = SAM_STAT_CHECK_CONDITION;
sense_key = NOT_READY;
asc = SCSI_ASC_LUN_NOT_READY;
ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
break;
/* Command Specific Status */
case NVME_SC_INVALID_FORMAT:
status = SAM_STAT_CHECK_CONDITION;
sense_key = ILLEGAL_REQUEST;
asc = SCSI_ASC_FORMAT_COMMAND_FAILED;
ascq = SCSI_ASCQ_FORMAT_COMMAND_FAILED;
break;
case NVME_SC_BAD_ATTRIBUTES:
status = SAM_STAT_CHECK_CONDITION;
sense_key = ILLEGAL_REQUEST;
asc = SCSI_ASC_INVALID_CDB;
ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
break;
/* Media Errors */
case NVME_SC_WRITE_FAULT:
status = SAM_STAT_CHECK_CONDITION;
sense_key = MEDIUM_ERROR;
asc = SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT;
ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
break;
case NVME_SC_READ_ERROR:
status = SAM_STAT_CHECK_CONDITION;
sense_key = MEDIUM_ERROR;
asc = SCSI_ASC_UNRECOVERED_READ_ERROR;
ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
break;
case NVME_SC_GUARD_CHECK:
status = SAM_STAT_CHECK_CONDITION;
sense_key = MEDIUM_ERROR;
asc = SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED;
ascq = SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED;
break;
case NVME_SC_APPTAG_CHECK:
status = SAM_STAT_CHECK_CONDITION;
sense_key = MEDIUM_ERROR;
asc = SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED;
ascq = SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED;
break;
case NVME_SC_REFTAG_CHECK:
status = SAM_STAT_CHECK_CONDITION;
sense_key = MEDIUM_ERROR;
asc = SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED;
ascq = SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED;
break;
case NVME_SC_COMPARE_FAILED:
status = SAM_STAT_CHECK_CONDITION;
sense_key = MISCOMPARE;
asc = SCSI_ASC_MISCOMPARE_DURING_VERIFY;
ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
break;
case NVME_SC_ACCESS_DENIED:
status = SAM_STAT_CHECK_CONDITION;
sense_key = ILLEGAL_REQUEST;
asc = SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID;
ascq = SCSI_ASCQ_INVALID_LUN_ID;
break;
/* Unspecified/Default */
case NVME_SC_CMDID_CONFLICT:
case NVME_SC_CMD_SEQ_ERROR:
case NVME_SC_CQ_INVALID:
case NVME_SC_QID_INVALID:
case NVME_SC_QUEUE_SIZE:
case NVME_SC_ABORT_LIMIT:
case NVME_SC_ABORT_MISSING:
case NVME_SC_ASYNC_LIMIT:
case NVME_SC_FIRMWARE_SLOT:
case NVME_SC_FIRMWARE_IMAGE:
case NVME_SC_INVALID_VECTOR:
case NVME_SC_INVALID_LOG_PAGE:
default:
status = SAM_STAT_CHECK_CONDITION;
sense_key = ILLEGAL_REQUEST;
asc = SCSI_ASC_NO_SENSE;
ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
break;
}
res = nvme_trans_completion(hdr, status, sense_key, asc, ascq);
return res;
}
/* INQUIRY Helper Functions */
static int nvme_trans_standard_inquiry_page(struct nvme_ns *ns,
struct sg_io_hdr *hdr, u8 *inq_response,
int alloc_len)
{
struct nvme_dev *dev = ns->dev;
dma_addr_t dma_addr;
void *mem;
struct nvme_id_ns *id_ns;
int res = SNTI_TRANSLATION_SUCCESS;
int nvme_sc;
int xfer_len;
u8 resp_data_format = 0x02;
u8 protect;
u8 cmdque = 0x01 << 1;
mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
&dma_addr, GFP_KERNEL);
if (mem == NULL) {
res = -ENOMEM;
goto out_dma;
}
/* nvme ns identify - use DPS value for PROTECT field */
nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
res = nvme_trans_status_code(hdr, nvme_sc);
/*
* If nvme_sc was -ve, res will be -ve here.
* If nvme_sc was +ve, the status would bace been translated, and res
* can only be 0 or -ve.
* - If 0 && nvme_sc > 0, then go into next if where res gets nvme_sc
* - If -ve, return because its a Linux error.
*/
if (res)
goto out_free;
if (nvme_sc) {
res = nvme_sc;
goto out_free;
}
id_ns = mem;
(id_ns->dps) ? (protect = 0x01) : (protect = 0);
memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
inq_response[2] = VERSION_SPC_4;
inq_response[3] = resp_data_format; /*normaca=0 | hisup=0 */
inq_response[4] = ADDITIONAL_STD_INQ_LENGTH;
inq_response[5] = protect; /* sccs=0 | acc=0 | tpgs=0 | pc3=0 */
inq_response[7] = cmdque; /* wbus16=0 | sync=0 | vs=0 */
strncpy(&inq_response[8], "NVMe ", 8);
strncpy(&inq_response[16], dev->model, 16);
strncpy(&inq_response[32], dev->firmware_rev, 4);
xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
out_free:
dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
dma_addr);
out_dma:
return res;
}
static int nvme_trans_supported_vpd_pages(struct nvme_ns *ns,
struct sg_io_hdr *hdr, u8 *inq_response,
int alloc_len)
{
int res = SNTI_TRANSLATION_SUCCESS;
int xfer_len;
memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
inq_response[1] = INQ_SUPPORTED_VPD_PAGES_PAGE; /* Page Code */
inq_response[3] = INQ_NUM_SUPPORTED_VPD_PAGES; /* Page Length */
inq_response[4] = INQ_SUPPORTED_VPD_PAGES_PAGE;
inq_response[5] = INQ_UNIT_SERIAL_NUMBER_PAGE;
inq_response[6] = INQ_DEVICE_IDENTIFICATION_PAGE;
inq_response[7] = INQ_EXTENDED_INQUIRY_DATA_PAGE;
inq_response[8] = INQ_BDEV_CHARACTERISTICS_PAGE;
xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
return res;
}
static int nvme_trans_unit_serial_page(struct nvme_ns *ns,
struct sg_io_hdr *hdr, u8 *inq_response,
int alloc_len)
{
struct nvme_dev *dev = ns->dev;
int res = SNTI_TRANSLATION_SUCCESS;
int xfer_len;
memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
inq_response[1] = INQ_UNIT_SERIAL_NUMBER_PAGE; /* Page Code */
inq_response[3] = INQ_SERIAL_NUMBER_LENGTH; /* Page Length */
strncpy(&inq_response[4], dev->serial, INQ_SERIAL_NUMBER_LENGTH);
xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
return res;
}
static int nvme_trans_device_id_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
u8 *inq_response, int alloc_len)
{
struct nvme_dev *dev = ns->dev;
dma_addr_t dma_addr;
void *mem;
struct nvme_id_ctrl *id_ctrl;
int res = SNTI_TRANSLATION_SUCCESS;
int nvme_sc;
u8 ieee[4];
int xfer_len;
__be32 tmp_id = cpu_to_be32(ns->ns_id);
mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
&dma_addr, GFP_KERNEL);
if (mem == NULL) {
res = -ENOMEM;
goto out_dma;
}
/* nvme controller identify */
nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
res = nvme_trans_status_code(hdr, nvme_sc);
if (res)
goto out_free;
if (nvme_sc) {
res = nvme_sc;
goto out_free;
}
id_ctrl = mem;
/* Since SCSI tried to save 4 bits... [SPC-4(r34) Table 591] */
ieee[0] = id_ctrl->ieee[0] << 4;
ieee[1] = id_ctrl->ieee[0] >> 4 | id_ctrl->ieee[1] << 4;
ieee[2] = id_ctrl->ieee[1] >> 4 | id_ctrl->ieee[2] << 4;
ieee[3] = id_ctrl->ieee[2] >> 4;
memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
inq_response[1] = INQ_DEVICE_IDENTIFICATION_PAGE; /* Page Code */
inq_response[3] = 20; /* Page Length */
/* Designation Descriptor start */
inq_response[4] = 0x01; /* Proto ID=0h | Code set=1h */
inq_response[5] = 0x03; /* PIV=0b | Asso=00b | Designator Type=3h */
inq_response[6] = 0x00; /* Rsvd */
inq_response[7] = 16; /* Designator Length */
/* Designator start */
inq_response[8] = 0x60 | ieee[3]; /* NAA=6h | IEEE ID MSB, High nibble*/
inq_response[9] = ieee[2]; /* IEEE ID */
inq_response[10] = ieee[1]; /* IEEE ID */
inq_response[11] = ieee[0]; /* IEEE ID| Vendor Specific ID... */
inq_response[12] = (dev->pci_dev->vendor & 0xFF00) >> 8;
inq_response[13] = (dev->pci_dev->vendor & 0x00FF);
inq_response[14] = dev->serial[0];
inq_response[15] = dev->serial[1];
inq_response[16] = dev->model[0];
inq_response[17] = dev->model[1];
memcpy(&inq_response[18], &tmp_id, sizeof(u32));
/* Last 2 bytes are zero */
xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
out_free:
dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
dma_addr);
out_dma:
return res;
}
static int nvme_trans_ext_inq_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
int alloc_len)
{
u8 *inq_response;
int res = SNTI_TRANSLATION_SUCCESS;
int nvme_sc;
struct nvme_dev *dev = ns->dev;
dma_addr_t dma_addr;
void *mem;
struct nvme_id_ctrl *id_ctrl;
struct nvme_id_ns *id_ns;
int xfer_len;
u8 microcode = 0x80;
u8 spt;
u8 spt_lut[8] = {0, 0, 2, 1, 4, 6, 5, 7};
u8 grd_chk, app_chk, ref_chk, protect;
u8 uask_sup = 0x20;
u8 v_sup;
u8 luiclr = 0x01;
inq_response = kmalloc(EXTENDED_INQUIRY_DATA_PAGE_LENGTH, GFP_KERNEL);
if (inq_response == NULL) {
res = -ENOMEM;
goto out_mem;
}
mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
&dma_addr, GFP_KERNEL);
if (mem == NULL) {
res = -ENOMEM;
goto out_dma;
}
/* nvme ns identify */
nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
res = nvme_trans_status_code(hdr, nvme_sc);
if (res)
goto out_free;
if (nvme_sc) {
res = nvme_sc;
goto out_free;
}
id_ns = mem;
spt = spt_lut[(id_ns->dpc) & 0x07] << 3;
(id_ns->dps) ? (protect = 0x01) : (protect = 0);
grd_chk = protect << 2;
app_chk = protect << 1;
ref_chk = protect;
/* nvme controller identify */
nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
res = nvme_trans_status_code(hdr, nvme_sc);
if (res)
goto out_free;
if (nvme_sc) {
res = nvme_sc;
goto out_free;
}
id_ctrl = mem;
v_sup = id_ctrl->vwc;
memset(inq_response, 0, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
inq_response[1] = INQ_EXTENDED_INQUIRY_DATA_PAGE; /* Page Code */
inq_response[2] = 0x00; /* Page Length MSB */
inq_response[3] = 0x3C; /* Page Length LSB */
inq_response[4] = microcode | spt | grd_chk | app_chk | ref_chk;
inq_response[5] = uask_sup;
inq_response[6] = v_sup;
inq_response[7] = luiclr;
inq_response[8] = 0;
inq_response[9] = 0;
xfer_len = min(alloc_len, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
out_free:
dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
dma_addr);
out_dma:
kfree(inq_response);
out_mem:
return res;
}
static int nvme_trans_bdev_char_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
int alloc_len)
{
u8 *inq_response;
int res = SNTI_TRANSLATION_SUCCESS;
int xfer_len;
inq_response = kmalloc(EXTENDED_INQUIRY_DATA_PAGE_LENGTH, GFP_KERNEL);
if (inq_response == NULL) {
res = -ENOMEM;
goto out_mem;
}
memset(inq_response, 0, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
inq_response[1] = INQ_BDEV_CHARACTERISTICS_PAGE; /* Page Code */
inq_response[2] = 0x00; /* Page Length MSB */
inq_response[3] = 0x3C; /* Page Length LSB */
inq_response[4] = 0x00; /* Medium Rotation Rate MSB */
inq_response[5] = 0x01; /* Medium Rotation Rate LSB */
inq_response[6] = 0x00; /* Form Factor */
xfer_len = min(alloc_len, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
kfree(inq_response);
out_mem:
return res;
}
/* LOG SENSE Helper Functions */
static int nvme_trans_log_supp_pages(struct nvme_ns *ns, struct sg_io_hdr *hdr,
int alloc_len)
{
int res = SNTI_TRANSLATION_SUCCESS;
int xfer_len;
u8 *log_response;
log_response = kmalloc(LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH, GFP_KERNEL);
if (log_response == NULL) {
res = -ENOMEM;
goto out_mem;
}
memset(log_response, 0, LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH);
log_response[0] = LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE;
/* Subpage=0x00, Page Length MSB=0 */
log_response[3] = SUPPORTED_LOG_PAGES_PAGE_LENGTH;
log_response[4] = LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE;
log_response[5] = LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE;
log_response[6] = LOG_PAGE_TEMPERATURE_PAGE;
xfer_len = min(alloc_len, LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH);
res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
kfree(log_response);
out_mem:
return res;
}
static int nvme_trans_log_info_exceptions(struct nvme_ns *ns,
struct sg_io_hdr *hdr, int alloc_len)
{
int res = SNTI_TRANSLATION_SUCCESS;
int xfer_len;
u8 *log_response;
struct nvme_command c;
struct nvme_dev *dev = ns->dev;
struct nvme_smart_log *smart_log;
dma_addr_t dma_addr;
void *mem;
u8 temp_c;
u16 temp_k;
log_response = kmalloc(LOG_INFO_EXCP_PAGE_LENGTH, GFP_KERNEL);
if (log_response == NULL) {
res = -ENOMEM;
goto out_mem;
}
memset(log_response, 0, LOG_INFO_EXCP_PAGE_LENGTH);
mem = dma_alloc_coherent(&dev->pci_dev->dev,
sizeof(struct nvme_smart_log),
&dma_addr, GFP_KERNEL);
if (mem == NULL) {
res = -ENOMEM;
goto out_dma;
}
/* Get SMART Log Page */
memset(&c, 0, sizeof(c));
c.common.opcode = nvme_admin_get_log_page;
c.common.nsid = cpu_to_le32(0xFFFFFFFF);
c.common.prp1 = cpu_to_le64(dma_addr);
c.common.cdw10[0] = cpu_to_le32(((sizeof(struct nvme_smart_log) /
BYTES_TO_DWORDS) << 16) | NVME_GET_SMART_LOG_PAGE);
res = nvme_submit_admin_cmd(dev, &c, NULL);
if (res != NVME_SC_SUCCESS) {
temp_c = LOG_TEMP_UNKNOWN;
} else {
smart_log = mem;
temp_k = (smart_log->temperature[1] << 8) +
(smart_log->temperature[0]);
temp_c = temp_k - KELVIN_TEMP_FACTOR;
}
log_response[0] = LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE;
/* Subpage=0x00, Page Length MSB=0 */
log_response[3] = REMAINING_INFO_EXCP_PAGE_LENGTH;
/* Informational Exceptions Log Parameter 1 Start */
/* Parameter Code=0x0000 bytes 4,5 */
log_response[6] = 0x23; /* DU=0, TSD=1, ETC=0, TMC=0, FMT_AND_LNK=11b */
log_response[7] = 0x04; /* PARAMETER LENGTH */
/* Add sense Code and qualifier = 0x00 each */
/* Use Temperature from NVMe Get Log Page, convert to C from K */
log_response[10] = temp_c;
xfer_len = min(alloc_len, LOG_INFO_EXCP_PAGE_LENGTH);
res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_smart_log),
mem, dma_addr);
out_dma:
kfree(log_response);
out_mem:
return res;
}
static int nvme_trans_log_temperature(struct nvme_ns *ns, struct sg_io_hdr *hdr,
int alloc_len)
{
int res = SNTI_TRANSLATION_SUCCESS;
int xfer_len;
u8 *log_response;
struct nvme_command c;
struct nvme_dev *dev = ns->dev;
struct nvme_smart_log *smart_log;
dma_addr_t dma_addr;
void *mem;
u32 feature_resp;
u8 temp_c_cur, temp_c_thresh;
u16 temp_k;
log_response = kmalloc(LOG_TEMP_PAGE_LENGTH, GFP_KERNEL);
if (log_response == NULL) {
res = -ENOMEM;
goto out_mem;
}
memset(log_response, 0, LOG_TEMP_PAGE_LENGTH);
mem = dma_alloc_coherent(&dev->pci_dev->dev,
sizeof(struct nvme_smart_log),
&dma_addr, GFP_KERNEL);
if (mem == NULL) {
res = -ENOMEM;
goto out_dma;
}
/* Get SMART Log Page */
memset(&c, 0, sizeof(c));
c.common.opcode = nvme_admin_get_log_page;
c.common.nsid = cpu_to_le32(0xFFFFFFFF);
c.common.prp1 = cpu_to_le64(dma_addr);
c.common.cdw10[0] = cpu_to_le32(((sizeof(struct nvme_smart_log) /
BYTES_TO_DWORDS) << 16) | NVME_GET_SMART_LOG_PAGE);
res = nvme_submit_admin_cmd(dev, &c, NULL);
if (res != NVME_SC_SUCCESS) {
temp_c_cur = LOG_TEMP_UNKNOWN;
} else {
smart_log = mem;
temp_k = (smart_log->temperature[1] << 8) +
(smart_log->temperature[0]);
temp_c_cur = temp_k - KELVIN_TEMP_FACTOR;
}
/* Get Features for Temp Threshold */
res = nvme_get_features(dev, NVME_FEAT_TEMP_THRESH, 0, 0,
&feature_resp);
if (res != NVME_SC_SUCCESS)
temp_c_thresh = LOG_TEMP_UNKNOWN;
else
temp_c_thresh = (feature_resp & 0xFFFF) - KELVIN_TEMP_FACTOR;
log_response[0] = LOG_PAGE_TEMPERATURE_PAGE;
/* Subpage=0x00, Page Length MSB=0 */
log_response[3] = REMAINING_TEMP_PAGE_LENGTH;
/* Temperature Log Parameter 1 (Temperature) Start */
/* Parameter Code = 0x0000 */
log_response[6] = 0x01; /* Format and Linking = 01b */
log_response[7] = 0x02; /* Parameter Length */
/* Use Temperature from NVMe Get Log Page, convert to C from K */
log_response[9] = temp_c_cur;
/* Temperature Log Parameter 2 (Reference Temperature) Start */
log_response[11] = 0x01; /* Parameter Code = 0x0001 */
log_response[12] = 0x01; /* Format and Linking = 01b */
log_response[13] = 0x02; /* Parameter Length */
/* Use Temperature Thresh from NVMe Get Log Page, convert to C from K */
log_response[15] = temp_c_thresh;
xfer_len = min(alloc_len, LOG_TEMP_PAGE_LENGTH);
res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_smart_log),
mem, dma_addr);
out_dma:
kfree(log_response);
out_mem:
return res;
}
/* MODE SENSE Helper Functions */
static int nvme_trans_fill_mode_parm_hdr(u8 *resp, int len, u8 cdb10, u8 llbaa,
u16 mode_data_length, u16 blk_desc_len)
{
/* Quick check to make sure I don't stomp on my own memory... */
if ((cdb10 && len < 8) || (!cdb10 && len < 4))
return SNTI_INTERNAL_ERROR;
if (cdb10) {
resp[0] = (mode_data_length & 0xFF00) >> 8;
resp[1] = (mode_data_length & 0x00FF);
/* resp[2] and [3] are zero */
resp[4] = llbaa;
resp[5] = RESERVED_FIELD;
resp[6] = (blk_desc_len & 0xFF00) >> 8;
resp[7] = (blk_desc_len & 0x00FF);
} else {
resp[0] = (mode_data_length & 0x00FF);
/* resp[1] and [2] are zero */
resp[3] = (blk_desc_len & 0x00FF);
}
return SNTI_TRANSLATION_SUCCESS;
}
static int nvme_trans_fill_blk_desc(struct nvme_ns *ns, struct sg_io_hdr *hdr,
u8 *resp, int len, u8 llbaa)
{
int res = SNTI_TRANSLATION_SUCCESS;
int nvme_sc;
struct nvme_dev *dev = ns->dev;
dma_addr_t dma_addr;
void *mem;
struct nvme_id_ns *id_ns;
u8 flbas;
u32 lba_length;
if (llbaa == 0 && len < MODE_PAGE_BLK_DES_LEN)
return SNTI_INTERNAL_ERROR;
else if (llbaa > 0 && len < MODE_PAGE_LLBAA_BLK_DES_LEN)
return SNTI_INTERNAL_ERROR;
mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
&dma_addr, GFP_KERNEL);
if (mem == NULL) {
res = -ENOMEM;
goto out;
}
/* nvme ns identify */
nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
res = nvme_trans_status_code(hdr, nvme_sc);
if (res)
goto out_dma;
if (nvme_sc) {
res = nvme_sc;
goto out_dma;
}
id_ns = mem;
flbas = (id_ns->flbas) & 0x0F;
lba_length = (1 << (id_ns->lbaf[flbas].ds));
if (llbaa == 0) {
__be32 tmp_cap = cpu_to_be32(le64_to_cpu(id_ns->ncap));
/* Byte 4 is reserved */
__be32 tmp_len = cpu_to_be32(lba_length & 0x00FFFFFF);
memcpy(resp, &tmp_cap, sizeof(u32));
memcpy(&resp[4], &tmp_len, sizeof(u32));
} else {
__be64 tmp_cap = cpu_to_be64(le64_to_cpu(id_ns->ncap));
__be32 tmp_len = cpu_to_be32(lba_length);
memcpy(resp, &tmp_cap, sizeof(u64));
/* Bytes 8, 9, 10, 11 are reserved */
memcpy(&resp[12], &tmp_len, sizeof(u32));
}
out_dma:
dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
dma_addr);
out:
return res;
}
static int nvme_trans_fill_control_page(struct nvme_ns *ns,
struct sg_io_hdr *hdr, u8 *resp,
int len)
{
if (len < MODE_PAGE_CONTROL_LEN)
return SNTI_INTERNAL_ERROR;
resp[0] = MODE_PAGE_CONTROL;
resp[1] = MODE_PAGE_CONTROL_LEN_FIELD;
resp[2] = 0x0E; /* TST=000b, TMF_ONLY=0, DPICZ=1,
* D_SENSE=1, GLTSD=1, RLEC=0 */
resp[3] = 0x12; /* Q_ALGO_MODIFIER=1h, NUAR=0, QERR=01b */
/* Byte 4: VS=0, RAC=0, UA_INT=0, SWP=0 */
resp[5] = 0x40; /* ATO=0, TAS=1, ATMPE=0, RWWP=0, AUTOLOAD=0 */
/* resp[6] and [7] are obsolete, thus zero */
resp[8] = 0xFF; /* Busy timeout period = 0xffff */
resp[9] = 0xFF;
/* Bytes 10,11: Extended selftest completion time = 0x0000 */
return SNTI_TRANSLATION_SUCCESS;
}
static int nvme_trans_fill_caching_page(struct nvme_ns *ns,
struct sg_io_hdr *hdr,
u8 *resp, int len)
{
int res = SNTI_TRANSLATION_SUCCESS;
int nvme_sc;
struct nvme_dev *dev = ns->dev;
u32 feature_resp;
u8 vwc;
if (len < MODE_PAGE_CACHING_LEN)
return SNTI_INTERNAL_ERROR;
nvme_sc = nvme_get_features(dev, NVME_FEAT_VOLATILE_WC, 0, 0,
&feature_resp);
res = nvme_trans_status_code(hdr, nvme_sc);
if (res)
goto out;
if (nvme_sc) {
res = nvme_sc;
goto out;
}
vwc = feature_resp & 0x00000001;
resp[0] = MODE_PAGE_CACHING;
resp[1] = MODE_PAGE_CACHING_LEN_FIELD;
resp[2] = vwc << 2;
out:
return res;
}
static int nvme_trans_fill_pow_cnd_page(struct nvme_ns *ns,
struct sg_io_hdr *hdr, u8 *resp,
int len)
{
int res = SNTI_TRANSLATION_SUCCESS;
if (len < MODE_PAGE_POW_CND_LEN)
return SNTI_INTERNAL_ERROR;
resp[0] = MODE_PAGE_POWER_CONDITION;
resp[1] = MODE_PAGE_POW_CND_LEN_FIELD;
/* All other bytes are zero */
return res;
}
static int nvme_trans_fill_inf_exc_page(struct nvme_ns *ns,
struct sg_io_hdr *hdr, u8 *resp,
int len)
{
int res = SNTI_TRANSLATION_SUCCESS;
if (len < MODE_PAGE_INF_EXC_LEN)
return SNTI_INTERNAL_ERROR;
resp[0] = MODE_PAGE_INFO_EXCEP;
resp[1] = MODE_PAGE_INF_EXC_LEN_FIELD;
resp[2] = 0x88;
/* All other bytes are zero */
return res;
}
static int nvme_trans_fill_all_pages(struct nvme_ns *ns, struct sg_io_hdr *hdr,
u8 *resp, int len)
{
int res = SNTI_TRANSLATION_SUCCESS;
u16 mode_pages_offset_1 = 0;
u16 mode_pages_offset_2, mode_pages_offset_3, mode_pages_offset_4;
mode_pages_offset_2 = mode_pages_offset_1 + MODE_PAGE_CACHING_LEN;
mode_pages_offset_3 = mode_pages_offset_2 + MODE_PAGE_CONTROL_LEN;
mode_pages_offset_4 = mode_pages_offset_3 + MODE_PAGE_POW_CND_LEN;
res = nvme_trans_fill_caching_page(ns, hdr, &resp[mode_pages_offset_1],
MODE_PAGE_CACHING_LEN);
if (res != SNTI_TRANSLATION_SUCCESS)
goto out;
res = nvme_trans_fill_control_page(ns, hdr, &resp[mode_pages_offset_2],
MODE_PAGE_CONTROL_LEN);
if (res != SNTI_TRANSLATION_SUCCESS)
goto out;
res = nvme_trans_fill_pow_cnd_page(ns, hdr, &resp[mode_pages_offset_3],
MODE_PAGE_POW_CND_LEN);
if (res != SNTI_TRANSLATION_SUCCESS)
goto out;
res = nvme_trans_fill_inf_exc_page(ns, hdr, &resp[mode_pages_offset_4],
MODE_PAGE_INF_EXC_LEN);
if (res != SNTI_TRANSLATION_SUCCESS)
goto out;
out:
return res;
}
static inline int nvme_trans_get_blk_desc_len(u8 dbd, u8 llbaa)
{
if (dbd == MODE_SENSE_BLK_DESC_ENABLED) {
/* SPC-4: len = 8 x Num_of_descriptors if llbaa = 0, 16x if 1 */
return 8 * (llbaa + 1) * MODE_SENSE_BLK_DESC_COUNT;
} else {
return 0;
}
}
static int nvme_trans_mode_page_create(struct nvme_ns *ns,
struct sg_io_hdr *hdr, u8 *cmd,
u16 alloc_len, u8 cdb10,
int (*mode_page_fill_func)
(struct nvme_ns *,
struct sg_io_hdr *hdr, u8 *, int),
u16 mode_pages_tot_len)
{
int res = SNTI_TRANSLATION_SUCCESS;
int xfer_len;
u8 *response;
u8 dbd, llbaa;
u16 resp_size;
int mph_size;
u16 mode_pages_offset_1;
u16 blk_desc_len, blk_desc_offset, mode_data_length;
dbd = GET_MODE_SENSE_DBD(cmd);
llbaa = GET_MODE_SENSE_LLBAA(cmd);
mph_size = GET_MODE_SENSE_MPH_SIZE(cdb10);
blk_desc_len = nvme_trans_get_blk_desc_len(dbd, llbaa);
resp_size = mph_size + blk_desc_len + mode_pages_tot_len;
/* Refer spc4r34 Table 440 for calculation of Mode data Length field */
mode_data_length = 3 + (3 * cdb10) + blk_desc_len + mode_pages_tot_len;
blk_desc_offset = mph_size;
mode_pages_offset_1 = blk_desc_offset + blk_desc_len;
response = kmalloc(resp_size, GFP_KERNEL);
if (response == NULL) {
res = -ENOMEM;
goto out_mem;
}
memset(response, 0, resp_size);
res = nvme_trans_fill_mode_parm_hdr(&response[0], mph_size, cdb10,
llbaa, mode_data_length, blk_desc_len);
if (res != SNTI_TRANSLATION_SUCCESS)
goto out_free;
if (blk_desc_len > 0) {
res = nvme_trans_fill_blk_desc(ns, hdr,
&response[blk_desc_offset],
blk_desc_len, llbaa);
if (res != SNTI_TRANSLATION_SUCCESS)
goto out_free;
}
res = mode_page_fill_func(ns, hdr, &response[mode_pages_offset_1],
mode_pages_tot_len);
if (res != SNTI_TRANSLATION_SUCCESS)
goto out_free;
xfer_len = min(alloc_len, resp_size);
res = nvme_trans_copy_to_user(hdr, response, xfer_len);
out_free:
kfree(response);
out_mem:
return res;
}
/* Read Capacity Helper Functions */
static void nvme_trans_fill_read_cap(u8 *response, struct nvme_id_ns *id_ns,
u8 cdb16)
{
u8 flbas;
u32 lba_length;
u64 rlba;
u8 prot_en;
u8 p_type_lut[4] = {0, 0, 1, 2};
__be64 tmp_rlba;
__be32 tmp_rlba_32;
__be32 tmp_len;
flbas = (id_ns->flbas) & 0x0F;
lba_length = (1 << (id_ns->lbaf[flbas].ds));
rlba = le64_to_cpup(&id_ns->nsze) - 1;
(id_ns->dps) ? (prot_en = 0x01) : (prot_en = 0);
if (!cdb16) {
if (rlba > 0xFFFFFFFF)
rlba = 0xFFFFFFFF;
tmp_rlba_32 = cpu_to_be32(rlba);
tmp_len = cpu_to_be32(lba_length);
memcpy(response, &tmp_rlba_32, sizeof(u32));
memcpy(&response[4], &tmp_len, sizeof(u32));
} else {
tmp_rlba = cpu_to_be64(rlba);
tmp_len = cpu_to_be32(lba_length);
memcpy(response, &tmp_rlba, sizeof(u64));
memcpy(&response[8], &tmp_len, sizeof(u32));
response[12] = (p_type_lut[id_ns->dps & 0x3] << 1) | prot_en;
/* P_I_Exponent = 0x0 | LBPPBE = 0x0 */
/* LBPME = 0 | LBPRZ = 0 | LALBA = 0x00 */
/* Bytes 16-31 - Reserved */
}
}
/* Start Stop Unit Helper Functions */
static int nvme_trans_power_state(struct nvme_ns *ns, struct sg_io_hdr *hdr,
u8 pc, u8 pcmod, u8 start)
{
int res = SNTI_TRANSLATION_SUCCESS;
int nvme_sc;
struct nvme_dev *dev = ns->dev;
dma_addr_t dma_addr;
void *mem;
struct nvme_id_ctrl *id_ctrl;
int lowest_pow_st; /* max npss = lowest power consumption */
unsigned ps_desired = 0;
/* NVMe Controller Identify */
mem = dma_alloc_coherent(&dev->pci_dev->dev,
sizeof(struct nvme_id_ctrl),
&dma_addr, GFP_KERNEL);
if (mem == NULL) {
res = -ENOMEM;
goto out;
}
nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
res = nvme_trans_status_code(hdr, nvme_sc);
if (res)
goto out_dma;
if (nvme_sc) {
res = nvme_sc;
goto out_dma;
}
id_ctrl = mem;
lowest_pow_st = id_ctrl->npss - 1;
switch (pc) {
case NVME_POWER_STATE_START_VALID:
/* Action unspecified if POWER CONDITION MODIFIER != 0 */
if (pcmod == 0 && start == 0x1)
ps_desired = POWER_STATE_0;
if (pcmod == 0 && start == 0x0)
ps_desired = lowest_pow_st;
break;
case NVME_POWER_STATE_ACTIVE:
/* Action unspecified if POWER CONDITION MODIFIER != 0 */
if (pcmod == 0)
ps_desired = POWER_STATE_0;
break;
case NVME_POWER_STATE_IDLE:
/* Action unspecified if POWER CONDITION MODIFIER != [0,1,2] */
/* min of desired state and (lps-1) because lps is STOP */
if (pcmod == 0x0)
ps_desired = min(POWER_STATE_1, (lowest_pow_st - 1));
else if (pcmod == 0x1)
ps_desired = min(POWER_STATE_2, (lowest_pow_st - 1));
else if (pcmod == 0x2)
ps_desired = min(POWER_STATE_3, (lowest_pow_st - 1));
break;
case NVME_POWER_STATE_STANDBY:
/* Action unspecified if POWER CONDITION MODIFIER != [0,1] */
if (pcmod == 0x0)
ps_desired = max(0, (lowest_pow_st - 2));
else if (pcmod == 0x1)
ps_desired = max(0, (lowest_pow_st - 1));
break;
case NVME_POWER_STATE_LU_CONTROL:
default:
res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
break;
}
nvme_sc = nvme_set_features(dev, NVME_FEAT_POWER_MGMT, ps_desired, 0,
NULL);
res = nvme_trans_status_code(hdr, nvme_sc);
if (res)
goto out_dma;
if (nvme_sc)
res = nvme_sc;
out_dma:
dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ctrl), mem,
dma_addr);
out:
return res;
}
/* Write Buffer Helper Functions */
/* Also using this for Format Unit with hdr passed as NULL, and buffer_id, 0 */
static int nvme_trans_send_fw_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
u8 opcode, u32 tot_len, u32 offset,
u8 buffer_id)
{
int res = SNTI_TRANSLATION_SUCCESS;
int nvme_sc;
struct nvme_dev *dev = ns->dev;
struct nvme_command c;
struct nvme_iod *iod = NULL;
unsigned length;
memset(&c, 0, sizeof(c));
c.common.opcode = opcode;
if (opcode == nvme_admin_download_fw) {
if (hdr->iovec_count > 0) {
/* Assuming SGL is not allowed for this command */
res = nvme_trans_completion(hdr,
SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST,
SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
goto out;
}
iod = nvme_map_user_pages(dev, DMA_TO_DEVICE,
(unsigned long)hdr->dxferp, tot_len);
if (IS_ERR(iod)) {
res = PTR_ERR(iod);
goto out;
}
length = nvme_setup_prps(dev, &c.common, iod, tot_len,
GFP_KERNEL);
if (length != tot_len) {
res = -ENOMEM;
goto out_unmap;
}
c.dlfw.numd = cpu_to_le32((tot_len/BYTES_TO_DWORDS) - 1);
c.dlfw.offset = cpu_to_le32(offset/BYTES_TO_DWORDS);
} else if (opcode == nvme_admin_activate_fw) {
u32 cdw10 = buffer_id | NVME_FWACT_REPL_ACTV;
c.common.cdw10[0] = cpu_to_le32(cdw10);
}
nvme_sc = nvme_submit_admin_cmd(dev, &c, NULL);
res = nvme_trans_status_code(hdr, nvme_sc);
if (res)
goto out_unmap;
if (nvme_sc)
res = nvme_sc;
out_unmap:
if (opcode == nvme_admin_download_fw) {
nvme_unmap_user_pages(dev, DMA_TO_DEVICE, iod);
nvme_free_iod(dev, iod);
}
out:
return res;
}
/* Mode Select Helper Functions */
static inline void nvme_trans_modesel_get_bd_len(u8 *parm_list, u8 cdb10,
u16 *bd_len, u8 *llbaa)
{
if (cdb10) {
/* 10 Byte CDB */
*bd_len = (parm_list[MODE_SELECT_10_BD_OFFSET] << 8) +
parm_list[MODE_SELECT_10_BD_OFFSET + 1];
*llbaa = parm_list[MODE_SELECT_10_LLBAA_OFFSET] &&
MODE_SELECT_10_LLBAA_MASK;
} else {
/* 6 Byte CDB */
*bd_len = parm_list[MODE_SELECT_6_BD_OFFSET];
}
}
static void nvme_trans_modesel_save_bd(struct nvme_ns *ns, u8 *parm_list,
u16 idx, u16 bd_len, u8 llbaa)
{
u16 bd_num;
bd_num = bd_len / ((llbaa == 0) ?
SHORT_DESC_BLOCK : LONG_DESC_BLOCK);
/* Store block descriptor info if a FORMAT UNIT comes later */
/* TODO Saving 1st BD info; what to do if multiple BD received? */
if (llbaa == 0) {
/* Standard Block Descriptor - spc4r34 7.5.5.1 */
ns->mode_select_num_blocks =
(parm_list[idx + 1] << 16) +
(parm_list[idx + 2] << 8) +
(parm_list[idx + 3]);
ns->mode_select_block_len =
(parm_list[idx + 5] << 16) +
(parm_list[idx + 6] << 8) +
(parm_list[idx + 7]);
} else {
/* Long LBA Block Descriptor - sbc3r27 6.4.2.3 */
ns->mode_select_num_blocks =
(((u64)parm_list[idx + 0]) << 56) +
(((u64)parm_list[idx + 1]) << 48) +
(((u64)parm_list[idx + 2]) << 40) +
(((u64)parm_list[idx + 3]) << 32) +
(((u64)parm_list[idx + 4]) << 24) +
(((u64)parm_list[idx + 5]) << 16) +
(((u64)parm_list[idx + 6]) << 8) +
((u64)parm_list[idx + 7]);
ns->mode_select_block_len =
(parm_list[idx + 12] << 24) +
(parm_list[idx + 13] << 16) +
(parm_list[idx + 14] << 8) +
(parm_list[idx + 15]);
}
}
static u16 nvme_trans_modesel_get_mp(struct nvme_ns *ns, struct sg_io_hdr *hdr,
u8 *mode_page, u8 page_code)
{
int res = SNTI_TRANSLATION_SUCCESS;
int nvme_sc;
struct nvme_dev *dev = ns->dev;
unsigned dword11;
switch (page_code) {
case MODE_PAGE_CACHING:
dword11 = ((mode_page[2] & CACHING_MODE_PAGE_WCE_MASK) ? 1 : 0);
nvme_sc = nvme_set_features(dev, NVME_FEAT_VOLATILE_WC, dword11,
0, NULL);
res = nvme_trans_status_code(hdr, nvme_sc);
if (res)
break;
if (nvme_sc) {
res = nvme_sc;
break;
}
break;
case MODE_PAGE_CONTROL:
break;
case MODE_PAGE_POWER_CONDITION:
/* Verify the OS is not trying to set timers */
if ((mode_page[2] & 0x01) != 0 || (mode_page[3] & 0x0F) != 0) {
res = nvme_trans_completion(hdr,
SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST,
SCSI_ASC_INVALID_PARAMETER,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
if (!res)
res = SNTI_INTERNAL_ERROR;
break;
}
break;
default:
res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
if (!res)
res = SNTI_INTERNAL_ERROR;
break;
}
return res;
}
static int nvme_trans_modesel_data(struct nvme_ns *ns, struct sg_io_hdr *hdr,
u8 *cmd, u16 parm_list_len, u8 pf,
u8 sp, u8 cdb10)
{
int res = SNTI_TRANSLATION_SUCCESS;
u8 *parm_list;
u16 bd_len;
u8 llbaa = 0;
u16 index, saved_index;
u8 page_code;
u16 mp_size;
/* Get parm list from data-in/out buffer */
parm_list = kmalloc(parm_list_len, GFP_KERNEL);
if (parm_list == NULL) {
res = -ENOMEM;
goto out;
}
res = nvme_trans_copy_from_user(hdr, parm_list, parm_list_len);
if (res != SNTI_TRANSLATION_SUCCESS)
goto out_mem;
nvme_trans_modesel_get_bd_len(parm_list, cdb10, &bd_len, &llbaa);
index = (cdb10) ? (MODE_SELECT_10_MPH_SIZE) : (MODE_SELECT_6_MPH_SIZE);
if (bd_len != 0) {
/* Block Descriptors present, parse */
nvme_trans_modesel_save_bd(ns, parm_list, index, bd_len, llbaa);
index += bd_len;
}
saved_index = index;
/* Multiple mode pages may be present; iterate through all */
/* In 1st Iteration, don't do NVME Command, only check for CDB errors */
do {
page_code = parm_list[index] & MODE_SELECT_PAGE_CODE_MASK;
mp_size = parm_list[index + 1] + 2;
if ((page_code != MODE_PAGE_CACHING) &&
(page_code != MODE_PAGE_CONTROL) &&
(page_code != MODE_PAGE_POWER_CONDITION)) {
res = nvme_trans_completion(hdr,
SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST,
SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
goto out_mem;
}
index += mp_size;
} while (index < parm_list_len);
/* In 2nd Iteration, do the NVME Commands */
index = saved_index;
do {
page_code = parm_list[index] & MODE_SELECT_PAGE_CODE_MASK;
mp_size = parm_list[index + 1] + 2;
res = nvme_trans_modesel_get_mp(ns, hdr, &parm_list[index],
page_code);
if (res != SNTI_TRANSLATION_SUCCESS)
break;
index += mp_size;
} while (index < parm_list_len);
out_mem:
kfree(parm_list);
out:
return res;
}
/* Format Unit Helper Functions */
static int nvme_trans_fmt_set_blk_size_count(struct nvme_ns *ns,
struct sg_io_hdr *hdr)
{
int res = SNTI_TRANSLATION_SUCCESS;
int nvme_sc;
struct nvme_dev *dev = ns->dev;
dma_addr_t dma_addr;
void *mem;
struct nvme_id_ns *id_ns;
u8 flbas;
/*
* SCSI Expects a MODE SELECT would have been issued prior to
* a FORMAT UNIT, and the block size and number would be used
* from the block descriptor in it. If a MODE SELECT had not
* been issued, FORMAT shall use the current values for both.
*/
if (ns->mode_select_num_blocks == 0 || ns->mode_select_block_len == 0) {
mem = dma_alloc_coherent(&dev->pci_dev->dev,
sizeof(struct nvme_id_ns), &dma_addr, GFP_KERNEL);
if (mem == NULL) {
res = -ENOMEM;
goto out;
}
/* nvme ns identify */
nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
res = nvme_trans_status_code(hdr, nvme_sc);
if (res)
goto out_dma;
if (nvme_sc) {
res = nvme_sc;
goto out_dma;
}
id_ns = mem;
if (ns->mode_select_num_blocks == 0)
ns->mode_select_num_blocks = le64_to_cpu(id_ns->ncap);
if (ns->mode_select_block_len == 0) {
flbas = (id_ns->flbas) & 0x0F;
ns->mode_select_block_len =
(1 << (id_ns->lbaf[flbas].ds));
}
out_dma:
dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
mem, dma_addr);
}
out:
return res;
}
static int nvme_trans_fmt_get_parm_header(struct sg_io_hdr *hdr, u8 len,
u8 format_prot_info, u8 *nvme_pf_code)
{
int res = SNTI_TRANSLATION_SUCCESS;
u8 *parm_list;
u8 pf_usage, pf_code;
parm_list = kmalloc(len, GFP_KERNEL);
if (parm_list == NULL) {
res = -ENOMEM;
goto out;
}
res = nvme_trans_copy_from_user(hdr, parm_list, len);
if (res != SNTI_TRANSLATION_SUCCESS)
goto out_mem;
if ((parm_list[FORMAT_UNIT_IMMED_OFFSET] &
FORMAT_UNIT_IMMED_MASK) != 0) {
res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
goto out_mem;
}
if (len == FORMAT_UNIT_LONG_PARM_LIST_LEN &&
(parm_list[FORMAT_UNIT_PROT_INT_OFFSET] & 0x0F) != 0) {
res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
goto out_mem;
}
pf_usage = parm_list[FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET] &
FORMAT_UNIT_PROT_FIELD_USAGE_MASK;
pf_code = (pf_usage << 2) | format_prot_info;
switch (pf_code) {
case 0:
*nvme_pf_code = 0;
break;
case 2:
*nvme_pf_code = 1;
break;
case 3:
*nvme_pf_code = 2;
break;
case 7:
*nvme_pf_code = 3;
break;
default:
res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
break;
}
out_mem:
kfree(parm_list);
out:
return res;
}
static int nvme_trans_fmt_send_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
u8 prot_info)
{
int res = SNTI_TRANSLATION_SUCCESS;
int nvme_sc;
struct nvme_dev *dev = ns->dev;
dma_addr_t dma_addr;
void *mem;
struct nvme_id_ns *id_ns;
u8 i;
u8 flbas, nlbaf;
u8 selected_lbaf = 0xFF;
u32 cdw10 = 0;
struct nvme_command c;
/* Loop thru LBAF's in id_ns to match reqd lbaf, put in cdw10 */
mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
&dma_addr, GFP_KERNEL);
if (mem == NULL) {
res = -ENOMEM;
goto out;
}
/* nvme ns identify */
nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
res = nvme_trans_status_code(hdr, nvme_sc);
if (res)
goto out_dma;
if (nvme_sc) {
res = nvme_sc;
goto out_dma;
}
id_ns = mem;
flbas = (id_ns->flbas) & 0x0F;
nlbaf = id_ns->nlbaf;
for (i = 0; i < nlbaf; i++) {
if (ns->mode_select_block_len == (1 << (id_ns->lbaf[i].ds))) {
selected_lbaf = i;
break;
}
}
if (selected_lbaf > 0x0F) {
res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_INVALID_PARAMETER,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
}
if (ns->mode_select_num_blocks != le64_to_cpu(id_ns->ncap)) {
res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_INVALID_PARAMETER,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
}
cdw10 |= prot_info << 5;
cdw10 |= selected_lbaf & 0x0F;
memset(&c, 0, sizeof(c));
c.format.opcode = nvme_admin_format_nvm;
c.format.nsid = cpu_to_le32(ns->ns_id);
c.format.cdw10 = cpu_to_le32(cdw10);
nvme_sc = nvme_submit_admin_cmd(dev, &c, NULL);
res = nvme_trans_status_code(hdr, nvme_sc);
if (res)
goto out_dma;
if (nvme_sc)
res = nvme_sc;
out_dma:
dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
dma_addr);
out:
return res;
}
/* Read/Write Helper Functions */
static inline void nvme_trans_get_io_cdb6(u8 *cmd,
struct nvme_trans_io_cdb *cdb_info)
{
cdb_info->fua = 0;
cdb_info->prot_info = 0;
cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_6_CDB_LBA_OFFSET) &
IO_6_CDB_LBA_MASK;
cdb_info->xfer_len = GET_U8_FROM_CDB(cmd, IO_6_CDB_TX_LEN_OFFSET);
/* sbc3r27 sec 5.32 - TRANSFER LEN of 0 implies a 256 Block transfer */
if (cdb_info->xfer_len == 0)
cdb_info->xfer_len = IO_6_DEFAULT_TX_LEN;
}
static inline void nvme_trans_get_io_cdb10(u8 *cmd,
struct nvme_trans_io_cdb *cdb_info)
{
cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_10_CDB_FUA_OFFSET) &
IO_CDB_FUA_MASK;
cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_10_CDB_WP_OFFSET) &
IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_10_CDB_LBA_OFFSET);
cdb_info->xfer_len = GET_U16_FROM_CDB(cmd, IO_10_CDB_TX_LEN_OFFSET);
}
static inline void nvme_trans_get_io_cdb12(u8 *cmd,
struct nvme_trans_io_cdb *cdb_info)
{
cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_12_CDB_FUA_OFFSET) &
IO_CDB_FUA_MASK;
cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_12_CDB_WP_OFFSET) &
IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_12_CDB_LBA_OFFSET);
cdb_info->xfer_len = GET_U32_FROM_CDB(cmd, IO_12_CDB_TX_LEN_OFFSET);
}
static inline void nvme_trans_get_io_cdb16(u8 *cmd,
struct nvme_trans_io_cdb *cdb_info)
{
cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_16_CDB_FUA_OFFSET) &
IO_CDB_FUA_MASK;
cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_16_CDB_WP_OFFSET) &
IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
cdb_info->lba = GET_U64_FROM_CDB(cmd, IO_16_CDB_LBA_OFFSET);
cdb_info->xfer_len = GET_U32_FROM_CDB(cmd, IO_16_CDB_TX_LEN_OFFSET);
}
static inline u32 nvme_trans_io_get_num_cmds(struct sg_io_hdr *hdr,
struct nvme_trans_io_cdb *cdb_info,
u32 max_blocks)
{
/* If using iovecs, send one nvme command per vector */
if (hdr->iovec_count > 0)
return hdr->iovec_count;
else if (cdb_info->xfer_len > max_blocks)
return ((cdb_info->xfer_len - 1) / max_blocks) + 1;
else
return 1;
}
static u16 nvme_trans_io_get_control(struct nvme_ns *ns,
struct nvme_trans_io_cdb *cdb_info)
{
u16 control = 0;
/* When Protection information support is added, implement here */
if (cdb_info->fua > 0)
control |= NVME_RW_FUA;
return control;
}
static int nvme_trans_do_nvme_io(struct nvme_ns *ns, struct sg_io_hdr *hdr,
struct nvme_trans_io_cdb *cdb_info, u8 is_write)
{
int res = SNTI_TRANSLATION_SUCCESS;
int nvme_sc;
struct nvme_dev *dev = ns->dev;
struct nvme_queue *nvmeq;
u32 num_cmds;
struct nvme_iod *iod;
u64 unit_len;
u64 unit_num_blocks; /* Number of blocks to xfer in each nvme cmd */
u32 retcode;
u32 i = 0;
u64 nvme_offset = 0;
void __user *next_mapping_addr;
struct nvme_command c;
u8 opcode = (is_write ? nvme_cmd_write : nvme_cmd_read);
u16 control;
u32 max_blocks = nvme_block_nr(ns, dev->max_hw_sectors);
num_cmds = nvme_trans_io_get_num_cmds(hdr, cdb_info, max_blocks);
/*
* This loop handles two cases.
* First, when an SGL is used in the form of an iovec list:
* - Use iov_base as the next mapping address for the nvme command_id
* - Use iov_len as the data transfer length for the command.
* Second, when we have a single buffer
* - If larger than max_blocks, split into chunks, offset
* each nvme command accordingly.
*/
for (i = 0; i < num_cmds; i++) {
memset(&c, 0, sizeof(c));
if (hdr->iovec_count > 0) {
struct sg_iovec sgl;
retcode = copy_from_user(&sgl, hdr->dxferp +
i * sizeof(struct sg_iovec),
sizeof(struct sg_iovec));
if (retcode)
return -EFAULT;
unit_len = sgl.iov_len;
unit_num_blocks = unit_len >> ns->lba_shift;
next_mapping_addr = sgl.iov_base;
} else {
unit_num_blocks = min((u64)max_blocks,
(cdb_info->xfer_len - nvme_offset));
unit_len = unit_num_blocks << ns->lba_shift;
next_mapping_addr = hdr->dxferp +
((1 << ns->lba_shift) * nvme_offset);
}
c.rw.opcode = opcode;
c.rw.nsid = cpu_to_le32(ns->ns_id);
c.rw.slba = cpu_to_le64(cdb_info->lba + nvme_offset);
c.rw.length = cpu_to_le16(unit_num_blocks - 1);
control = nvme_trans_io_get_control(ns, cdb_info);
c.rw.control = cpu_to_le16(control);
iod = nvme_map_user_pages(dev,
(is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
(unsigned long)next_mapping_addr, unit_len);
if (IS_ERR(iod)) {
res = PTR_ERR(iod);
goto out;
}
retcode = nvme_setup_prps(dev, &c.common, iod, unit_len,
GFP_KERNEL);
if (retcode != unit_len) {
nvme_unmap_user_pages(dev,
(is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
iod);
nvme_free_iod(dev, iod);
res = -ENOMEM;
goto out;
}
nvme_offset += unit_num_blocks;
nvmeq = get_nvmeq(dev);
/*
* Since nvme_submit_sync_cmd sleeps, we can't keep
* preemption disabled. We may be preempted at any
* point, and be rescheduled to a different CPU. That
* will cause cacheline bouncing, but no additional
* races since q_lock already protects against other
* CPUs.
*/
put_nvmeq(nvmeq);
nvme_sc = nvme_submit_sync_cmd(nvmeq, &c, NULL,
NVME_IO_TIMEOUT);
if (nvme_sc != NVME_SC_SUCCESS) {
nvme_unmap_user_pages(dev,
(is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
iod);
nvme_free_iod(dev, iod);
res = nvme_trans_status_code(hdr, nvme_sc);
goto out;
}
nvme_unmap_user_pages(dev,
(is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
iod);
nvme_free_iod(dev, iod);
}
res = nvme_trans_status_code(hdr, NVME_SC_SUCCESS);
out:
return res;
}
/* SCSI Command Translation Functions */
static int nvme_trans_io(struct nvme_ns *ns, struct sg_io_hdr *hdr, u8 is_write,
u8 *cmd)
{
int res = SNTI_TRANSLATION_SUCCESS;
struct nvme_trans_io_cdb cdb_info;
u8 opcode = cmd[0];
u64 xfer_bytes;
u64 sum_iov_len = 0;
struct sg_iovec sgl;
int i;
size_t not_copied;
/* Extract Fields from CDB */
switch (opcode) {
case WRITE_6:
case READ_6:
nvme_trans_get_io_cdb6(cmd, &cdb_info);
break;
case WRITE_10:
case READ_10:
nvme_trans_get_io_cdb10(cmd, &cdb_info);
break;
case WRITE_12:
case READ_12:
nvme_trans_get_io_cdb12(cmd, &cdb_info);
break;
case WRITE_16:
case READ_16:
nvme_trans_get_io_cdb16(cmd, &cdb_info);
break;
default:
/* Will never really reach here */
res = SNTI_INTERNAL_ERROR;
goto out;
}
/* Calculate total length of transfer (in bytes) */
if (hdr->iovec_count > 0) {
for (i = 0; i < hdr->iovec_count; i++) {
not_copied = copy_from_user(&sgl, hdr->dxferp +
i * sizeof(struct sg_iovec),
sizeof(struct sg_iovec));
if (not_copied)
return -EFAULT;
sum_iov_len += sgl.iov_len;
/* IO vector sizes should be multiples of block size */
if (sgl.iov_len % (1 << ns->lba_shift) != 0) {
res = nvme_trans_completion(hdr,
SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST,
SCSI_ASC_INVALID_PARAMETER,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
goto out;
}
}
} else {
sum_iov_len = hdr->dxfer_len;
}
/* As Per sg ioctl howto, if the lengths differ, use the lower one */
xfer_bytes = min(((u64)hdr->dxfer_len), sum_iov_len);
/* If block count and actual data buffer size dont match, error out */
if (xfer_bytes != (cdb_info.xfer_len << ns->lba_shift)) {
res = -EINVAL;
goto out;
}
/* Check for 0 length transfer - it is not illegal */
if (cdb_info.xfer_len == 0)
goto out;
/* Send NVMe IO Command(s) */
res = nvme_trans_do_nvme_io(ns, hdr, &cdb_info, is_write);
if (res != SNTI_TRANSLATION_SUCCESS)
goto out;
out:
return res;
}
static int nvme_trans_inquiry(struct nvme_ns *ns, struct sg_io_hdr *hdr,
u8 *cmd)
{
int res = SNTI_TRANSLATION_SUCCESS;
u8 evpd;
u8 page_code;
int alloc_len;
u8 *inq_response;
evpd = GET_INQ_EVPD_BIT(cmd);
page_code = GET_INQ_PAGE_CODE(cmd);
alloc_len = GET_INQ_ALLOC_LENGTH(cmd);
inq_response = kmalloc(STANDARD_INQUIRY_LENGTH, GFP_KERNEL);
if (inq_response == NULL) {
res = -ENOMEM;
goto out_mem;
}
if (evpd == 0) {
if (page_code == INQ_STANDARD_INQUIRY_PAGE) {
res = nvme_trans_standard_inquiry_page(ns, hdr,
inq_response, alloc_len);
} else {
res = nvme_trans_completion(hdr,
SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST,
SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
}
} else {
switch (page_code) {
case VPD_SUPPORTED_PAGES:
res = nvme_trans_supported_vpd_pages(ns, hdr,
inq_response, alloc_len);
break;
case VPD_SERIAL_NUMBER:
res = nvme_trans_unit_serial_page(ns, hdr, inq_response,
alloc_len);
break;
case VPD_DEVICE_IDENTIFIERS:
res = nvme_trans_device_id_page(ns, hdr, inq_response,
alloc_len);
break;
case VPD_EXTENDED_INQUIRY:
res = nvme_trans_ext_inq_page(ns, hdr, alloc_len);
break;
case VPD_BLOCK_DEV_CHARACTERISTICS:
res = nvme_trans_bdev_char_page(ns, hdr, alloc_len);
break;
default:
res = nvme_trans_completion(hdr,
SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST,
SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
break;
}
}
kfree(inq_response);
out_mem:
return res;
}
static int nvme_trans_log_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
u8 *cmd)
{
int res = SNTI_TRANSLATION_SUCCESS;
u16 alloc_len;
u8 sp;
u8 pc;
u8 page_code;
sp = GET_U8_FROM_CDB(cmd, LOG_SENSE_CDB_SP_OFFSET);
if (sp != LOG_SENSE_CDB_SP_NOT_ENABLED) {
res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
goto out;
}
pc = GET_U8_FROM_CDB(cmd, LOG_SENSE_CDB_PC_OFFSET);
page_code = pc & LOG_SENSE_CDB_PAGE_CODE_MASK;
pc = (pc & LOG_SENSE_CDB_PC_MASK) >> LOG_SENSE_CDB_PC_SHIFT;
if (pc != LOG_SENSE_CDB_PC_CUMULATIVE_VALUES) {
res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
goto out;
}
alloc_len = GET_U16_FROM_CDB(cmd, LOG_SENSE_CDB_ALLOC_LENGTH_OFFSET);
switch (page_code) {
case LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE:
res = nvme_trans_log_supp_pages(ns, hdr, alloc_len);
break;
case LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE:
res = nvme_trans_log_info_exceptions(ns, hdr, alloc_len);
break;
case LOG_PAGE_TEMPERATURE_PAGE:
res = nvme_trans_log_temperature(ns, hdr, alloc_len);
break;
default:
res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
break;
}
out:
return res;
}
static int nvme_trans_mode_select(struct nvme_ns *ns, struct sg_io_hdr *hdr,
u8 *cmd)
{
int res = SNTI_TRANSLATION_SUCCESS;
u8 cdb10 = 0;
u16 parm_list_len;
u8 page_format;
u8 save_pages;
page_format = GET_U8_FROM_CDB(cmd, MODE_SELECT_CDB_PAGE_FORMAT_OFFSET);
page_format &= MODE_SELECT_CDB_PAGE_FORMAT_MASK;
save_pages = GET_U8_FROM_CDB(cmd, MODE_SELECT_CDB_SAVE_PAGES_OFFSET);
save_pages &= MODE_SELECT_CDB_SAVE_PAGES_MASK;
if (GET_OPCODE(cmd) == MODE_SELECT) {
parm_list_len = GET_U8_FROM_CDB(cmd,
MODE_SELECT_6_CDB_PARAM_LIST_LENGTH_OFFSET);
} else {
parm_list_len = GET_U16_FROM_CDB(cmd,
MODE_SELECT_10_CDB_PARAM_LIST_LENGTH_OFFSET);
cdb10 = 1;
}
if (parm_list_len != 0) {
/*
* According to SPC-4 r24, a paramter list length field of 0
* shall not be considered an error
*/
res = nvme_trans_modesel_data(ns, hdr, cmd, parm_list_len,
page_format, save_pages, cdb10);
}
return res;
}
static int nvme_trans_mode_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
u8 *cmd)
{
int res = SNTI_TRANSLATION_SUCCESS;
u16 alloc_len;
u8 cdb10 = 0;
u8 page_code;
u8 pc;
if (GET_OPCODE(cmd) == MODE_SENSE) {
alloc_len = GET_U8_FROM_CDB(cmd, MODE_SENSE6_ALLOC_LEN_OFFSET);
} else {
alloc_len = GET_U16_FROM_CDB(cmd,
MODE_SENSE10_ALLOC_LEN_OFFSET);
cdb10 = 1;
}
pc = GET_U8_FROM_CDB(cmd, MODE_SENSE_PAGE_CONTROL_OFFSET) &
MODE_SENSE_PAGE_CONTROL_MASK;
if (pc != MODE_SENSE_PC_CURRENT_VALUES) {
res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
goto out;
}
page_code = GET_U8_FROM_CDB(cmd, MODE_SENSE_PAGE_CODE_OFFSET) &
MODE_SENSE_PAGE_CODE_MASK;
switch (page_code) {
case MODE_PAGE_CACHING:
res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
cdb10,
&nvme_trans_fill_caching_page,
MODE_PAGE_CACHING_LEN);
break;
case MODE_PAGE_CONTROL:
res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
cdb10,
&nvme_trans_fill_control_page,
MODE_PAGE_CONTROL_LEN);
break;
case MODE_PAGE_POWER_CONDITION:
res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
cdb10,
&nvme_trans_fill_pow_cnd_page,
MODE_PAGE_POW_CND_LEN);
break;
case MODE_PAGE_INFO_EXCEP:
res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
cdb10,
&nvme_trans_fill_inf_exc_page,
MODE_PAGE_INF_EXC_LEN);
break;
case MODE_PAGE_RETURN_ALL:
res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
cdb10,
&nvme_trans_fill_all_pages,
MODE_PAGE_ALL_LEN);
break;
default:
res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
break;
}
out:
return res;
}
static int nvme_trans_read_capacity(struct nvme_ns *ns, struct sg_io_hdr *hdr,
u8 *cmd)
{
int res = SNTI_TRANSLATION_SUCCESS;
int nvme_sc;
u32 alloc_len = READ_CAP_10_RESP_SIZE;
u32 resp_size = READ_CAP_10_RESP_SIZE;
u32 xfer_len;
u8 cdb16;
struct nvme_dev *dev = ns->dev;
dma_addr_t dma_addr;
void *mem;
struct nvme_id_ns *id_ns;
u8 *response;
cdb16 = IS_READ_CAP_16(cmd);
if (cdb16) {
alloc_len = GET_READ_CAP_16_ALLOC_LENGTH(cmd);
resp_size = READ_CAP_16_RESP_SIZE;
}
mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
&dma_addr, GFP_KERNEL);
if (mem == NULL) {
res = -ENOMEM;
goto out;
}
/* nvme ns identify */
nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
res = nvme_trans_status_code(hdr, nvme_sc);
if (res)
goto out_dma;
if (nvme_sc) {
res = nvme_sc;
goto out_dma;
}
id_ns = mem;
response = kmalloc(resp_size, GFP_KERNEL);
if (response == NULL) {
res = -ENOMEM;
goto out_dma;
}
memset(response, 0, resp_size);
nvme_trans_fill_read_cap(response, id_ns, cdb16);
xfer_len = min(alloc_len, resp_size);
res = nvme_trans_copy_to_user(hdr, response, xfer_len);
kfree(response);
out_dma:
dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
dma_addr);
out:
return res;
}
static int nvme_trans_report_luns(struct nvme_ns *ns, struct sg_io_hdr *hdr,
u8 *cmd)
{
int res = SNTI_TRANSLATION_SUCCESS;
int nvme_sc;
u32 alloc_len, xfer_len, resp_size;
u8 select_report;
u8 *response;
struct nvme_dev *dev = ns->dev;
dma_addr_t dma_addr;
void *mem;
struct nvme_id_ctrl *id_ctrl;
u32 ll_length, lun_id;
u8 lun_id_offset = REPORT_LUNS_FIRST_LUN_OFFSET;
__be32 tmp_len;
alloc_len = GET_REPORT_LUNS_ALLOC_LENGTH(cmd);
select_report = GET_U8_FROM_CDB(cmd, REPORT_LUNS_SR_OFFSET);
if ((select_report != ALL_LUNS_RETURNED) &&
(select_report != ALL_WELL_KNOWN_LUNS_RETURNED) &&
(select_report != RESTRICTED_LUNS_RETURNED)) {
res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
goto out;
} else {
/* NVMe Controller Identify */
mem = dma_alloc_coherent(&dev->pci_dev->dev,
sizeof(struct nvme_id_ctrl),
&dma_addr, GFP_KERNEL);
if (mem == NULL) {
res = -ENOMEM;
goto out;
}
nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
res = nvme_trans_status_code(hdr, nvme_sc);
if (res)
goto out_dma;
if (nvme_sc) {
res = nvme_sc;
goto out_dma;
}
id_ctrl = mem;
ll_length = le32_to_cpu(id_ctrl->nn) * LUN_ENTRY_SIZE;
resp_size = ll_length + LUN_DATA_HEADER_SIZE;
if (alloc_len < resp_size) {
res = nvme_trans_completion(hdr,
SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
goto out_dma;
}
response = kmalloc(resp_size, GFP_KERNEL);
if (response == NULL) {
res = -ENOMEM;
goto out_dma;
}
memset(response, 0, resp_size);
/* The first LUN ID will always be 0 per the SAM spec */
for (lun_id = 0; lun_id < le32_to_cpu(id_ctrl->nn); lun_id++) {
/*
* Set the LUN Id and then increment to the next LUN
* location in the parameter data.
*/
__be64 tmp_id = cpu_to_be64(lun_id);
memcpy(&response[lun_id_offset], &tmp_id, sizeof(u64));
lun_id_offset += LUN_ENTRY_SIZE;
}
tmp_len = cpu_to_be32(ll_length);
memcpy(response, &tmp_len, sizeof(u32));
}
xfer_len = min(alloc_len, resp_size);
res = nvme_trans_copy_to_user(hdr, response, xfer_len);
kfree(response);
out_dma:
dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ctrl), mem,
dma_addr);
out:
return res;
}
static int nvme_trans_request_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
u8 *cmd)
{
int res = SNTI_TRANSLATION_SUCCESS;
u8 alloc_len, xfer_len, resp_size;
u8 desc_format;
u8 *response;
alloc_len = GET_REQUEST_SENSE_ALLOC_LENGTH(cmd);
desc_format = GET_U8_FROM_CDB(cmd, REQUEST_SENSE_DESC_OFFSET);
desc_format &= REQUEST_SENSE_DESC_MASK;
resp_size = ((desc_format) ? (DESC_FMT_SENSE_DATA_SIZE) :
(FIXED_FMT_SENSE_DATA_SIZE));
response = kmalloc(resp_size, GFP_KERNEL);
if (response == NULL) {
res = -ENOMEM;
goto out;
}
memset(response, 0, resp_size);
if (desc_format == DESCRIPTOR_FORMAT_SENSE_DATA_TYPE) {
/* Descriptor Format Sense Data */
response[0] = DESC_FORMAT_SENSE_DATA;
response[1] = NO_SENSE;
/* TODO How is LOW POWER CONDITION ON handled? (byte 2) */
response[2] = SCSI_ASC_NO_SENSE;
response[3] = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
/* SDAT_OVFL = 0 | Additional Sense Length = 0 */
} else {
/* Fixed Format Sense Data */
response[0] = FIXED_SENSE_DATA;
/* Byte 1 = Obsolete */
response[2] = NO_SENSE; /* FM, EOM, ILI, SDAT_OVFL = 0 */
/* Bytes 3-6 - Information - set to zero */
response[7] = FIXED_SENSE_DATA_ADD_LENGTH;
/* Bytes 8-11 - Cmd Specific Information - set to zero */
response[12] = SCSI_ASC_NO_SENSE;
response[13] = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
/* Byte 14 = Field Replaceable Unit Code = 0 */
/* Bytes 15-17 - SKSV=0; Sense Key Specific = 0 */
}
xfer_len = min(alloc_len, resp_size);
res = nvme_trans_copy_to_user(hdr, response, xfer_len);
kfree(response);
out:
return res;
}
static int nvme_trans_security_protocol(struct nvme_ns *ns,
struct sg_io_hdr *hdr,
u8 *cmd)
{
return nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_COMMAND,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
}
static int nvme_trans_start_stop(struct nvme_ns *ns, struct sg_io_hdr *hdr,
u8 *cmd)
{
int res = SNTI_TRANSLATION_SUCCESS;
int nvme_sc;
struct nvme_queue *nvmeq;
struct nvme_command c;
u8 immed, pcmod, pc, no_flush, start;
immed = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_IMMED_OFFSET);
pcmod = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_POWER_COND_MOD_OFFSET);
pc = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_POWER_COND_OFFSET);
no_flush = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_NO_FLUSH_OFFSET);
start = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_START_OFFSET);
immed &= START_STOP_UNIT_CDB_IMMED_MASK;
pcmod &= START_STOP_UNIT_CDB_POWER_COND_MOD_MASK;
pc = (pc & START_STOP_UNIT_CDB_POWER_COND_MASK) >> NIBBLE_SHIFT;
no_flush &= START_STOP_UNIT_CDB_NO_FLUSH_MASK;
start &= START_STOP_UNIT_CDB_START_MASK;
if (immed != 0) {
res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
} else {
if (no_flush == 0) {
/* Issue NVME FLUSH command prior to START STOP UNIT */
memset(&c, 0, sizeof(c));
c.common.opcode = nvme_cmd_flush;
c.common.nsid = cpu_to_le32(ns->ns_id);
nvmeq = get_nvmeq(ns->dev);
put_nvmeq(nvmeq);
nvme_sc = nvme_submit_sync_cmd(nvmeq, &c, NULL, NVME_IO_TIMEOUT);
res = nvme_trans_status_code(hdr, nvme_sc);
if (res)
goto out;
if (nvme_sc) {
res = nvme_sc;
goto out;
}
}
/* Setup the expected power state transition */
res = nvme_trans_power_state(ns, hdr, pc, pcmod, start);
}
out:
return res;
}
static int nvme_trans_synchronize_cache(struct nvme_ns *ns,
struct sg_io_hdr *hdr, u8 *cmd)
{
int res = SNTI_TRANSLATION_SUCCESS;
int nvme_sc;
struct nvme_command c;
struct nvme_queue *nvmeq;
memset(&c, 0, sizeof(c));
c.common.opcode = nvme_cmd_flush;
c.common.nsid = cpu_to_le32(ns->ns_id);
nvmeq = get_nvmeq(ns->dev);
put_nvmeq(nvmeq);
nvme_sc = nvme_submit_sync_cmd(nvmeq, &c, NULL, NVME_IO_TIMEOUT);
res = nvme_trans_status_code(hdr, nvme_sc);
if (res)
goto out;
if (nvme_sc)
res = nvme_sc;
out:
return res;
}
static int nvme_trans_format_unit(struct nvme_ns *ns, struct sg_io_hdr *hdr,
u8 *cmd)
{
int res = SNTI_TRANSLATION_SUCCESS;
u8 parm_hdr_len = 0;
u8 nvme_pf_code = 0;
u8 format_prot_info, long_list, format_data;
format_prot_info = GET_U8_FROM_CDB(cmd,
FORMAT_UNIT_CDB_FORMAT_PROT_INFO_OFFSET);
long_list = GET_U8_FROM_CDB(cmd, FORMAT_UNIT_CDB_LONG_LIST_OFFSET);
format_data = GET_U8_FROM_CDB(cmd, FORMAT_UNIT_CDB_FORMAT_DATA_OFFSET);
format_prot_info = (format_prot_info &
FORMAT_UNIT_CDB_FORMAT_PROT_INFO_MASK) >>
FORMAT_UNIT_CDB_FORMAT_PROT_INFO_SHIFT;
long_list &= FORMAT_UNIT_CDB_LONG_LIST_MASK;
format_data &= FORMAT_UNIT_CDB_FORMAT_DATA_MASK;
if (format_data != 0) {
if (format_prot_info != 0) {
if (long_list == 0)
parm_hdr_len = FORMAT_UNIT_SHORT_PARM_LIST_LEN;
else
parm_hdr_len = FORMAT_UNIT_LONG_PARM_LIST_LEN;
}
} else if (format_data == 0 && format_prot_info != 0) {
res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
goto out;
}
/* Get parm header from data-in/out buffer */
/*
* According to the translation spec, the only fields in the parameter
* list we are concerned with are in the header. So allocate only that.
*/
if (parm_hdr_len > 0) {
res = nvme_trans_fmt_get_parm_header(hdr, parm_hdr_len,
format_prot_info, &nvme_pf_code);
if (res != SNTI_TRANSLATION_SUCCESS)
goto out;
}
/* Attempt to activate any previously downloaded firmware image */
res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw, 0, 0, 0);
/* Determine Block size and count and send format command */
res = nvme_trans_fmt_set_blk_size_count(ns, hdr);
if (res != SNTI_TRANSLATION_SUCCESS)
goto out;
res = nvme_trans_fmt_send_cmd(ns, hdr, nvme_pf_code);
out:
return res;
}
static int nvme_trans_test_unit_ready(struct nvme_ns *ns,
struct sg_io_hdr *hdr,
u8 *cmd)
{
int res = SNTI_TRANSLATION_SUCCESS;
struct nvme_dev *dev = ns->dev;
if (!(readl(&dev->bar->csts) & NVME_CSTS_RDY))
res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
NOT_READY, SCSI_ASC_LUN_NOT_READY,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
else
res = nvme_trans_completion(hdr, SAM_STAT_GOOD, NO_SENSE, 0, 0);
return res;
}
static int nvme_trans_write_buffer(struct nvme_ns *ns, struct sg_io_hdr *hdr,
u8 *cmd)
{
int res = SNTI_TRANSLATION_SUCCESS;
u32 buffer_offset, parm_list_length;
u8 buffer_id, mode;
parm_list_length =
GET_U24_FROM_CDB(cmd, WRITE_BUFFER_CDB_PARM_LIST_LENGTH_OFFSET);
if (parm_list_length % BYTES_TO_DWORDS != 0) {
/* NVMe expects Firmware file to be a whole number of DWORDS */
res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
goto out;
}
buffer_id = GET_U8_FROM_CDB(cmd, WRITE_BUFFER_CDB_BUFFER_ID_OFFSET);
if (buffer_id > NVME_MAX_FIRMWARE_SLOT) {
res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
goto out;
}
mode = GET_U8_FROM_CDB(cmd, WRITE_BUFFER_CDB_MODE_OFFSET) &
WRITE_BUFFER_CDB_MODE_MASK;
buffer_offset =
GET_U24_FROM_CDB(cmd, WRITE_BUFFER_CDB_BUFFER_OFFSET_OFFSET);
switch (mode) {
case DOWNLOAD_SAVE_ACTIVATE:
res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_download_fw,
parm_list_length, buffer_offset,
buffer_id);
if (res != SNTI_TRANSLATION_SUCCESS)
goto out;
res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw,
parm_list_length, buffer_offset,
buffer_id);
break;
case DOWNLOAD_SAVE_DEFER_ACTIVATE:
res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_download_fw,
parm_list_length, buffer_offset,
buffer_id);
break;
case ACTIVATE_DEFERRED_MICROCODE:
res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw,
parm_list_length, buffer_offset,
buffer_id);
break;
default:
res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
break;
}
out:
return res;
}
struct scsi_unmap_blk_desc {
__be64 slba;
__be32 nlb;
u32 resv;
};
struct scsi_unmap_parm_list {
__be16 unmap_data_len;
__be16 unmap_blk_desc_data_len;
u32 resv;
struct scsi_unmap_blk_desc desc[0];
};
static int nvme_trans_unmap(struct nvme_ns *ns, struct sg_io_hdr *hdr,
u8 *cmd)
{
struct nvme_dev *dev = ns->dev;
struct scsi_unmap_parm_list *plist;
struct nvme_dsm_range *range;
struct nvme_queue *nvmeq;
struct nvme_command c;
int i, nvme_sc, res = -ENOMEM;
u16 ndesc, list_len;
dma_addr_t dma_addr;
list_len = GET_U16_FROM_CDB(cmd, UNMAP_CDB_PARAM_LIST_LENGTH_OFFSET);
if (!list_len)
return -EINVAL;
plist = kmalloc(list_len, GFP_KERNEL);
if (!plist)
return -ENOMEM;
res = nvme_trans_copy_from_user(hdr, plist, list_len);
if (res != SNTI_TRANSLATION_SUCCESS)
goto out;
ndesc = be16_to_cpu(plist->unmap_blk_desc_data_len) >> 4;
if (!ndesc || ndesc > 256) {
res = -EINVAL;
goto out;
}
range = dma_alloc_coherent(&dev->pci_dev->dev, ndesc * sizeof(*range),
&dma_addr, GFP_KERNEL);
if (!range)
goto out;
for (i = 0; i < ndesc; i++) {
range[i].nlb = cpu_to_le32(be32_to_cpu(plist->desc[i].nlb));
range[i].slba = cpu_to_le64(be64_to_cpu(plist->desc[i].slba));
range[i].cattr = 0;
}
memset(&c, 0, sizeof(c));
c.dsm.opcode = nvme_cmd_dsm;
c.dsm.nsid = cpu_to_le32(ns->ns_id);
c.dsm.prp1 = cpu_to_le64(dma_addr);
c.dsm.nr = cpu_to_le32(ndesc - 1);
c.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
nvmeq = get_nvmeq(dev);
put_nvmeq(nvmeq);
nvme_sc = nvme_submit_sync_cmd(nvmeq, &c, NULL, NVME_IO_TIMEOUT);
res = nvme_trans_status_code(hdr, nvme_sc);
dma_free_coherent(&dev->pci_dev->dev, ndesc * sizeof(*range),
range, dma_addr);
out:
kfree(plist);
return res;
}
static int nvme_scsi_translate(struct nvme_ns *ns, struct sg_io_hdr *hdr)
{
u8 cmd[BLK_MAX_CDB];
int retcode;
unsigned int opcode;
if (hdr->cmdp == NULL)
return -EMSGSIZE;
if (copy_from_user(cmd, hdr->cmdp, hdr->cmd_len))
return -EFAULT;
opcode = cmd[0];
switch (opcode) {
case READ_6:
case READ_10:
case READ_12:
case READ_16:
retcode = nvme_trans_io(ns, hdr, 0, cmd);
break;
case WRITE_6:
case WRITE_10:
case WRITE_12:
case WRITE_16:
retcode = nvme_trans_io(ns, hdr, 1, cmd);
break;
case INQUIRY:
retcode = nvme_trans_inquiry(ns, hdr, cmd);
break;
case LOG_SENSE:
retcode = nvme_trans_log_sense(ns, hdr, cmd);
break;
case MODE_SELECT:
case MODE_SELECT_10:
retcode = nvme_trans_mode_select(ns, hdr, cmd);
break;
case MODE_SENSE:
case MODE_SENSE_10:
retcode = nvme_trans_mode_sense(ns, hdr, cmd);
break;
case READ_CAPACITY:
retcode = nvme_trans_read_capacity(ns, hdr, cmd);
break;
case SERVICE_ACTION_IN:
if (IS_READ_CAP_16(cmd))
retcode = nvme_trans_read_capacity(ns, hdr, cmd);
else
goto out;
break;
case REPORT_LUNS:
retcode = nvme_trans_report_luns(ns, hdr, cmd);
break;
case REQUEST_SENSE:
retcode = nvme_trans_request_sense(ns, hdr, cmd);
break;
case SECURITY_PROTOCOL_IN:
case SECURITY_PROTOCOL_OUT:
retcode = nvme_trans_security_protocol(ns, hdr, cmd);
break;
case START_STOP:
retcode = nvme_trans_start_stop(ns, hdr, cmd);
break;
case SYNCHRONIZE_CACHE:
retcode = nvme_trans_synchronize_cache(ns, hdr, cmd);
break;
case FORMAT_UNIT:
retcode = nvme_trans_format_unit(ns, hdr, cmd);
break;
case TEST_UNIT_READY:
retcode = nvme_trans_test_unit_ready(ns, hdr, cmd);
break;
case WRITE_BUFFER:
retcode = nvme_trans_write_buffer(ns, hdr, cmd);
break;
case UNMAP:
retcode = nvme_trans_unmap(ns, hdr, cmd);
break;
default:
out:
retcode = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_COMMAND,
SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
break;
}
return retcode;
}
int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr)
{
struct sg_io_hdr hdr;
int retcode;
if (!capable(CAP_SYS_ADMIN))
return -EACCES;
if (copy_from_user(&hdr, u_hdr, sizeof(hdr)))
return -EFAULT;
if (hdr.interface_id != 'S')
return -EINVAL;
if (hdr.cmd_len > BLK_MAX_CDB)
return -EINVAL;
retcode = nvme_scsi_translate(ns, &hdr);
if (retcode < 0)
return retcode;
if (retcode > 0)
retcode = SNTI_TRANSLATION_SUCCESS;
if (copy_to_user(u_hdr, &hdr, sizeof(sg_io_hdr_t)) > 0)
return -EFAULT;
return retcode;
}
int nvme_sg_get_version_num(int __user *ip)
{
return put_user(sg_version_num, ip);
}
include/linux/nvme.h
浏览文件 @ 2d4fe278
......@@ -107,6 +107,12 @@ struct nvme_id_ctrl {
__u8 vs[1024];
};
enum {
NVME_CTRL_ONCS_COMPARE = 1 << 0,
NVME_CTRL_ONCS_WRITE_UNCORRECTABLE = 1 << 1,
NVME_CTRL_ONCS_DSM = 1 << 2,
};
struct nvme_lbaf {
__le16 ms;
__u8 ds;
......@@ -201,11 +207,11 @@ struct nvme_common_command {
__u8 flags;
__u16 command_id;
__le32 nsid;
__u32 cdw2[2];
__le32 cdw2[2];
__le64 metadata;
__le64 prp1;
__le64 prp2;
__u32 cdw10[6];
__le32 cdw10[6];
};
struct nvme_rw_command {
......@@ -246,6 +252,31 @@ enum {
NVME_RW_DSM_COMPRESSED = 1 << 7,
};
struct nvme_dsm_cmd {
__u8 opcode;
__u8 flags;
__u16 command_id;
__le32 nsid;
__u64 rsvd2[2];
__le64 prp1;
__le64 prp2;
__le32 nr;
__le32 attributes;
__u32 rsvd12[4];
};
enum {
NVME_DSMGMT_IDR = 1 << 0,
NVME_DSMGMT_IDW = 1 << 1,
NVME_DSMGMT_AD = 1 << 2,
};
struct nvme_dsm_range {
__le32 cattr;
__le32 nlb;
__le64 slba;
};
/* Admin commands */
enum nvme_admin_opcode {
......@@ -285,6 +316,9 @@ enum {
NVME_FEAT_WRITE_ATOMIC = 0x0a,
NVME_FEAT_ASYNC_EVENT = 0x0b,
NVME_FEAT_SW_PROGRESS = 0x0c,
NVME_FWACT_REPL = (0 << 3),
NVME_FWACT_REPL_ACTV = (1 << 3),
NVME_FWACT_ACTV = (2 << 3),
};
struct nvme_identify {
......@@ -362,6 +396,16 @@ struct nvme_download_firmware {
__u32 rsvd12[4];
};
struct nvme_format_cmd {
__u8 opcode;
__u8 flags;
__u16 command_id;
__le32 nsid;
__u64 rsvd2[4];
__le32 cdw10;
__u32 rsvd11[5];
};
struct nvme_command {
union {
struct nvme_common_command common;
......@@ -372,6 +416,8 @@ struct nvme_command {
struct nvme_create_sq create_sq;
struct nvme_delete_queue delete_queue;
struct nvme_download_firmware dlfw;
struct nvme_format_cmd format;
struct nvme_dsm_cmd dsm;
};
};
......@@ -388,6 +434,7 @@ enum {
NVME_SC_FUSED_FAIL = 0x9,
NVME_SC_FUSED_MISSING = 0xa,
NVME_SC_INVALID_NS = 0xb,
NVME_SC_CMD_SEQ_ERROR = 0xc,
NVME_SC_LBA_RANGE = 0x80,
NVME_SC_CAP_EXCEEDED = 0x81,
NVME_SC_NS_NOT_READY = 0x82,
......@@ -461,4 +508,111 @@ struct nvme_admin_cmd {
#define NVME_IOCTL_ADMIN_CMD _IOWR('N', 0x41, struct nvme_admin_cmd)
#define NVME_IOCTL_SUBMIT_IO _IOW('N', 0x42, struct nvme_user_io)
#ifdef __KERNEL__
#include <linux/pci.h>
#include <linux/miscdevice.h>
#include <linux/kref.h>
#define NVME_IO_TIMEOUT (5 * HZ)
/*
* Represents an NVM Express device. Each nvme_dev is a PCI function.
*/
struct nvme_dev {
struct list_head node;
struct nvme_queue **queues;
u32 __iomem *dbs;
struct pci_dev *pci_dev;
struct dma_pool *prp_page_pool;
struct dma_pool *prp_small_pool;
int instance;
int queue_count;
int db_stride;
u32 ctrl_config;
struct msix_entry *entry;
struct nvme_bar __iomem *bar;
struct list_head namespaces;
struct kref kref;
struct miscdevice miscdev;
char name[12];
char serial[20];
char model[40];
char firmware_rev[8];
u32 max_hw_sectors;
u32 stripe_size;
u16 oncs;
};
/*
* An NVM Express namespace is equivalent to a SCSI LUN
*/
struct nvme_ns {
struct list_head list;
struct nvme_dev *dev;
struct request_queue *queue;
struct gendisk *disk;
int ns_id;
int lba_shift;
int ms;
u64 mode_select_num_blocks;
u32 mode_select_block_len;
};
/*
* The nvme_iod describes the data in an I/O, including the list of PRP
* entries. You can't see it in this data structure because C doesn't let
* me express that. Use nvme_alloc_iod to ensure there's enough space
* allocated to store the PRP list.
*/
struct nvme_iod {
void *private; /* For the use of the submitter of the I/O */
int npages; /* In the PRP list. 0 means small pool in use */
int offset; /* Of PRP list */
int nents; /* Used in scatterlist */
int length; /* Of data, in bytes */
dma_addr_t first_dma;
struct scatterlist sg[0];
};
static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
{
return (sector >> (ns->lba_shift - 9));
}
/**
* nvme_free_iod - frees an nvme_iod
* @dev: The device that the I/O was submitted to
* @iod: The memory to free
*/
void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod);
int nvme_setup_prps(struct nvme_dev *dev, struct nvme_common_command *cmd,
struct nvme_iod *iod, int total_len, gfp_t gfp);
struct nvme_iod *nvme_map_user_pages(struct nvme_dev *dev, int write,
unsigned long addr, unsigned length);
void nvme_unmap_user_pages(struct nvme_dev *dev, int write,
struct nvme_iod *iod);
struct nvme_queue *get_nvmeq(struct nvme_dev *dev);
void put_nvmeq(struct nvme_queue *nvmeq);
int nvme_submit_sync_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd,
u32 *result, unsigned timeout);
int nvme_submit_flush_data(struct nvme_queue *nvmeq, struct nvme_ns *ns);
int nvme_submit_admin_cmd(struct nvme_dev *, struct nvme_command *,
u32 *result);
int nvme_identify(struct nvme_dev *, unsigned nsid, unsigned cns,
dma_addr_t dma_addr);
int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
dma_addr_t dma_addr, u32 *result);
int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
dma_addr_t dma_addr, u32 *result);
struct sg_io_hdr;
int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr);
int nvme_sg_get_version_num(int __user *ip);
#endif
#endif /* _LINUX_NVME_H */
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