提交 2461bdb3 编写于 作者: J Jani Nikula

drm/i915/dpio: un-inline the vlv phy/channel mapping functions

Simplify the heavy intel_display_types.h header.
Signed-off-by: NJani Nikula <jani.nikula@intel.com>
Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/943dd3e9812138b1cf3ddcfde896cfec006f3847.1667383630.git.jani.nikula@intel.com
上级 d29c410f
...@@ -90,6 +90,7 @@ ...@@ -90,6 +90,7 @@
#include "intel_display_types.h" #include "intel_display_types.h"
#include "intel_dmc.h" #include "intel_dmc.h"
#include "intel_dp_link_training.h" #include "intel_dp_link_training.h"
#include "intel_dpio_phy.h"
#include "intel_dpt.h" #include "intel_dpt.h"
#include "intel_dsb.h" #include "intel_dsb.h"
#include "intel_fbc.h" #include "intel_fbc.h"
......
...@@ -1803,51 +1803,6 @@ struct intel_dp_mst_encoder { ...@@ -1803,51 +1803,6 @@ struct intel_dp_mst_encoder {
struct intel_connector *connector; struct intel_connector *connector;
}; };
static inline enum dpio_channel
vlv_dig_port_to_channel(struct intel_digital_port *dig_port)
{
switch (dig_port->base.port) {
default:
MISSING_CASE(dig_port->base.port);
fallthrough;
case PORT_B:
case PORT_D:
return DPIO_CH0;
case PORT_C:
return DPIO_CH1;
}
}
static inline enum dpio_phy
vlv_dig_port_to_phy(struct intel_digital_port *dig_port)
{
switch (dig_port->base.port) {
default:
MISSING_CASE(dig_port->base.port);
fallthrough;
case PORT_B:
case PORT_C:
return DPIO_PHY0;
case PORT_D:
return DPIO_PHY1;
}
}
static inline enum dpio_channel
vlv_pipe_to_channel(enum pipe pipe)
{
switch (pipe) {
default:
MISSING_CASE(pipe);
fallthrough;
case PIPE_A:
case PIPE_C:
return DPIO_CH0;
case PIPE_B:
return DPIO_CH1;
}
}
struct intel_load_detect_pipe { struct intel_load_detect_pipe {
struct drm_atomic_state *restore_state; struct drm_atomic_state *restore_state;
}; };
......
...@@ -655,6 +655,48 @@ bxt_ddi_phy_get_lane_lat_optim_mask(struct intel_encoder *encoder) ...@@ -655,6 +655,48 @@ bxt_ddi_phy_get_lane_lat_optim_mask(struct intel_encoder *encoder)
return mask; return mask;
} }
enum dpio_channel vlv_dig_port_to_channel(struct intel_digital_port *dig_port)
{
switch (dig_port->base.port) {
default:
MISSING_CASE(dig_port->base.port);
fallthrough;
case PORT_B:
case PORT_D:
return DPIO_CH0;
case PORT_C:
return DPIO_CH1;
}
}
enum dpio_phy vlv_dig_port_to_phy(struct intel_digital_port *dig_port)
{
switch (dig_port->base.port) {
default:
MISSING_CASE(dig_port->base.port);
fallthrough;
case PORT_B:
case PORT_C:
return DPIO_PHY0;
case PORT_D:
return DPIO_PHY1;
}
}
enum dpio_channel vlv_pipe_to_channel(enum pipe pipe)
{
switch (pipe) {
default:
MISSING_CASE(pipe);
fallthrough;
case PIPE_A:
case PIPE_C:
return DPIO_CH0;
case PIPE_B:
return DPIO_CH1;
}
}
void chv_set_phy_signal_level(struct intel_encoder *encoder, void chv_set_phy_signal_level(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state, const struct intel_crtc_state *crtc_state,
u32 deemph_reg_value, u32 margin_reg_value, u32 deemph_reg_value, u32 margin_reg_value,
......
...@@ -10,9 +10,11 @@ ...@@ -10,9 +10,11 @@
enum dpio_channel; enum dpio_channel;
enum dpio_phy; enum dpio_phy;
enum pipe;
enum port; enum port;
struct drm_i915_private; struct drm_i915_private;
struct intel_crtc_state; struct intel_crtc_state;
struct intel_digital_port;
struct intel_encoder; struct intel_encoder;
void bxt_port_to_phy_channel(struct drm_i915_private *dev_priv, enum port port, void bxt_port_to_phy_channel(struct drm_i915_private *dev_priv, enum port port,
...@@ -30,6 +32,10 @@ void bxt_ddi_phy_set_lane_optim_mask(struct intel_encoder *encoder, ...@@ -30,6 +32,10 @@ void bxt_ddi_phy_set_lane_optim_mask(struct intel_encoder *encoder,
u8 lane_lat_optim_mask); u8 lane_lat_optim_mask);
u8 bxt_ddi_phy_get_lane_lat_optim_mask(struct intel_encoder *encoder); u8 bxt_ddi_phy_get_lane_lat_optim_mask(struct intel_encoder *encoder);
enum dpio_channel vlv_dig_port_to_channel(struct intel_digital_port *dig_port);
enum dpio_phy vlv_dig_port_to_phy(struct intel_digital_port *dig_port);
enum dpio_channel vlv_pipe_to_channel(enum pipe pipe);
void chv_set_phy_signal_level(struct intel_encoder *encoder, void chv_set_phy_signal_level(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state, const struct intel_crtc_state *crtc_state,
u32 deemph_reg_value, u32 margin_reg_value, u32 deemph_reg_value, u32 margin_reg_value,
......
...@@ -10,6 +10,7 @@ ...@@ -10,6 +10,7 @@
#include "intel_de.h" #include "intel_de.h"
#include "intel_display.h" #include "intel_display.h"
#include "intel_display_types.h" #include "intel_display_types.h"
#include "intel_dpio_phy.h"
#include "intel_dpll.h" #include "intel_dpll.h"
#include "intel_lvds.h" #include "intel_lvds.h"
#include "intel_panel.h" #include "intel_panel.h"
......
...@@ -9,6 +9,7 @@ ...@@ -9,6 +9,7 @@
#include "intel_display_power_well.h" #include "intel_display_power_well.h"
#include "intel_display_types.h" #include "intel_display_types.h"
#include "intel_dp.h" #include "intel_dp.h"
#include "intel_dpio_phy.h"
#include "intel_dpll.h" #include "intel_dpll.h"
#include "intel_lvds.h" #include "intel_lvds.h"
#include "intel_pps.h" #include "intel_pps.h"
......
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