提交 238017aa 编写于 作者: M Marc Zyngier 提交者: Cheng Jian

arm64: Add missing ISB after invalidating TLB in __primary_switch

stable inclusion
from linux-4.19.178
commit 73ff5db113009d6072e63b25b8beed1f47e55baf

--------------------------------

[ Upstream commit 9d41053e ]

Although there has been a bit of back and forth on the subject, it
appears that invalidating TLBs requires an ISB instruction when FEAT_ETS
is not implemented by the CPU.

From the bible:

  | In an implementation that does not implement FEAT_ETS, a TLB
  | maintenance instruction executed by a PE, PEx, can complete at any
  | time after it is issued, but is only guaranteed to be finished for a
  | PE, PEx, after the execution of DSB by the PEx followed by a Context
  | synchronization event

Add the missing ISB in __primary_switch, just in case.

Fixes: 3c5e9f23 ("arm64: head.S: move KASLR processing out of __enable_mmu()")
Suggested-by: NWill Deacon <will@kernel.org>
Signed-off-by: NMarc Zyngier <maz@kernel.org>
Acked-by: NMark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20210224093738.3629662-3-maz@kernel.orgSigned-off-by: NWill Deacon <will@kernel.org>
Signed-off-by: NSasha Levin <sashal@kernel.org>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>
Signed-off-by: NCheng Jian <cj.chengjian@huawei.com>
上级 8bed4371
...@@ -867,6 +867,7 @@ __primary_switch: ...@@ -867,6 +867,7 @@ __primary_switch:
tlbi vmalle1 // Remove any stale TLB entries tlbi vmalle1 // Remove any stale TLB entries
dsb nsh dsb nsh
isb
msr sctlr_el1, x19 // re-enable the MMU msr sctlr_el1, x19 // re-enable the MMU
isb isb
......
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