LoongArch: Old BPI compatibility

LoongArch inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I5OHOB

--------------------------------
Signed-off-by: Nliuyun <liuyun@loongson.cn>
Change-Id: I4c2efc3e9e960f21d78d617f256ad129ffa96979

arch/loongarch/include/asm/addrspace.h

@@ -124,5 +124,6 @@ extern unsigned long vm_map_base;
 #define PCI_IOSIZE	SZ_32M
 #define ISA_IOSIZE	SZ_16K
 #define IO_SPACE_LIMIT	(PCI_IOSIZE - 1)
+#define ISA_PHY_IOBASE  LOONGSON_LIO_BASE
 
 #endif /* _ASM_ADDRSPACE_H */

arch/loongarch/include/asm/bootinfo.h

@@ -36,7 +36,7 @@ struct loongson_system_configuration {
 };
 
 extern u64 efi_system_table;
-extern unsigned long fw_arg0, fw_arg1;
+extern unsigned long fw_arg0, fw_arg1, fw_arg2;
 extern struct loongson_board_info b_info;
 extern struct loongson_system_configuration loongson_sysconf;
 

arch/loongarch/include/asm/efi.h

@@ -7,7 +7,7 @@
 
 #include <linux/efi.h>
 
-void __init efi_init(void);
+void __init loongson_efi_init(void);
 void __init efi_runtime_init(void);
 
 #define ARCH_EFI_IRQ_FLAGS_MASK  0x00000004  /* Bit 2: CSR.CRMD.IE */
@@ -40,5 +40,6 @@ static inline unsigned long efi_get_max_initrd_addr(unsigned long image_addr)
 {
 	return ULONG_MAX;
 }
+extern void *early_memremap_ro(resource_size_t phys_addr, unsigned long size);
 
 #endif /* _ASM_LOONGARCH_EFI_H */

arch/loongarch/kernel/Makefile

@@ -7,7 +7,7 @@ extra-y		:= head.o vmlinux.lds
 
 obj-y		+= cpu-probe.o cacheinfo.o env.o setup.o entry.o genex.o \
 		   traps.o irq.o idle.o process.o dma.o mem.o io.o reset.o switch.o \
-		   elf.o syscall.o signal.o time.o topology.o inst.o ptrace.o vdso.o
+		   elf.o legacy_boot.o syscall.o signal.o time.o topology.o inst.o ptrace.o vdso.o
 
 obj-$(CONFIG_ACPI)		+= acpi.o
 obj-$(CONFIG_EFI) 		+= efi.o

arch/loongarch/kernel/acpi.c

@@ -16,6 +16,7 @@
 #include <asm/io.h>
 #include <asm/numa.h>
 #include <asm/loongson.h>
+#include "legacy_boot.h"
 
 int acpi_disabled;
 EXPORT_SYMBOL(acpi_disabled);
@@ -74,7 +75,7 @@ void __init acpi_boot_table_init(void)
 }
 
 #ifdef CONFIG_SMP
-static int set_processor_mask(u32 id, u32 flags)
+int set_processor_mask(u32 id, u32 flags)
 {
 
 	int cpu, cpuid = id;
@@ -139,6 +140,7 @@ acpi_parse_eio_master(union acpi_subtable_headers *header, const unsigned long e
 
 static void __init acpi_process_madt(void)
 {
+	int error;
 #ifdef CONFIG_SMP
 	int i;
 
@@ -147,6 +149,16 @@ static void __init acpi_process_madt(void)
 		__cpu_logical_map[i] = -1;
 	}
 #endif
+
+	if (efi_bp && bpi_version <= BPI_VERSION_V1) {
+		error = legacy_madt_table_init();
+		if (error < 0) {
+			disable_acpi();
+			pr_err(PREFIX "Invalid BIOS MADT (legacy), ACPI disabled\n");
+		}
+		return;
+	}
+
 	acpi_table_parse_madt(ACPI_MADT_TYPE_CORE_PIC,
 			acpi_parse_processor, MAX_CORE_PIC);
 

arch/loongarch/kernel/efi.c

@@ -24,6 +24,7 @@
 #include <asm/efi.h>
 #include <asm/tlb.h>
 #include <asm/loongson.h>
+#include "legacy_boot.h"
 
 static unsigned long efi_nr_tables;
 static unsigned long efi_config_table;
@@ -89,6 +90,9 @@ static int __init set_virtual_map(void)
 	efi_set_virtual_address_map_t *svam;
 	efi_memory_desc_t *in, runtime_map[32];
 
+	if (efi_bp)
+		return EFI_SUCCESS;
+
 	size = sizeof(efi_memory_desc_t);
 
 	for_each_efi_memory_desc(in) {
@@ -146,15 +150,16 @@ void __init efi_runtime_init(void)
 	set_bit(EFI_RUNTIME_SERVICES, &efi.flags);
 }
 
-void __init efi_init(void)
+void __init loongson_efi_init(void)
 {
 	int size;
 	void *config_tables;
 
-	if (!efi_system_table)
-		return;
+	if (efi_system_table)
+		efi_systab = (efi_system_table_t *)early_memremap_ro(efi_system_table, sizeof(*efi_systab));
+	else
+		efi_systab = (efi_system_table_t *)efi_bp->systemtable;
 
-	efi_systab = (efi_system_table_t *)early_memremap_ro(efi_system_table, sizeof(*efi_systab));
 	if (!efi_systab) {
 		pr_err("Can't find EFI system table.\n");
 		return;

arch/loongarch/kernel/env.c

@@ -12,6 +12,7 @@
 #include <asm/early_ioremap.h>
 #include <asm/bootinfo.h>
 #include <asm/loongson.h>
+#include "legacy_boot.h"
 
 u64 efi_system_table;
 struct loongson_system_configuration loongson_sysconf;
@@ -23,6 +24,9 @@ void __init init_environ(void)
 	struct efi_memory_map_data data;
 	void *fdt_ptr = early_memremap_ro(fw_arg1, SZ_64K);
 
+	if (efi_bp)
+		return;
+
 	if (efi_boot)
 		set_bit(EFI_BOOT, &efi.flags);
 	else

arch/loongarch/kernel/head.S

@@ -67,6 +67,8 @@ SYM_CODE_START(kernel_entry)			# kernel entry point
 	st.d		a0, t0, 0		# firmware arguments
 	la.pcrel	t0, fw_arg1
 	st.d		a1, t0, 0
+	la.pcrel	t0, fw_arg2
+	st.d		a2, t0, 0
 
 	/* KSave3 used for percpu base, initialized as 0 */
 	csrwr		zero, PERCPU_BASE_KS

arch/loongarch/kernel/irq.c

@@ -20,6 +20,7 @@
 #include <asm/irq.h>
 #include <asm/loongson.h>
 #include <asm/setup.h>
+#include "legacy_boot.h"
 
 DEFINE_PER_CPU(unsigned long, irq_stack);
 DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
@@ -61,6 +62,12 @@ static int __init early_pci_mcfg_parse(struct acpi_table_header *header)
 	if (header->length < sizeof(struct acpi_table_mcfg))
 		return -EINVAL;
 
+	for (i = 0; i < MAX_IO_PICS; i++) {
+		msi_group[i].pci_segment = -1;
+		msi_group[i].node = -1;
+		pch_group[i].node = -1;
+	}
+
 	n = (header->length - sizeof(struct acpi_table_mcfg)) /
 					sizeof(struct acpi_mcfg_allocation);
 	mcfg = (struct acpi_table_mcfg *)header;
@@ -76,14 +83,6 @@ static int __init early_pci_mcfg_parse(struct acpi_table_header *header)
 
 static void __init init_vec_parent_group(void)
 {
-	int i;
-
-	for (i = 0; i < MAX_IO_PICS; i++) {
-		msi_group[i].pci_segment = -1;
-		msi_group[i].node = -1;
-		pch_group[i].node = -1;
-	}
-
 	acpi_table_parse(ACPI_SIG_MCFG, early_pci_mcfg_parse);
 }
 
@@ -99,7 +98,7 @@ static int __init get_ipi_irq(void)
 
 void __init init_IRQ(void)
 {
-	int i;
+	int i, ret;
 #ifdef CONFIG_SMP
 	int r, ipi_irq;
 	static int ipi_dummy_dev;
@@ -111,7 +110,13 @@ void __init init_IRQ(void)
 	clear_csr_estat(ESTATF_IP);
 
 	init_vec_parent_group();
-	irqchip_init();
+	if (efi_bp && bpi_version <= BPI_VERSION_V1) {
+		ret = setup_legacy_IRQ();
+		if (ret)
+			panic("IRQ domain init error!\n");
+	} else {
+		irqchip_init();
+	}
 #ifdef CONFIG_SMP
 	ipi_irq = get_ipi_irq();
 	if (ipi_irq < 0)

arch/loongarch/kernel/legacy_boot.c

+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Author: Yun Liu, liuyun@loongson.cn
+ * Copyright (C) 2020 Loongson Technology Co., Ltd.
+ *
+ * This program is free software; you can redistribute	it and/or modify it
+ * under  the terms of	the GNU General	 Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <linux/acpi.h>
+#include <linux/efi.h>
+#include <linux/export.h>
+#include <linux/memblock.h>
+#include <linux/of_fdt.h>
+#include <linux/initrd.h>
+#include <asm/early_ioremap.h>
+#include <asm/bootinfo.h>
+#include <asm/loongson.h>
+#include "legacy_boot.h"
+
+#define MAX_CORE_PIC 256
+#define PREFIX			"ACPI: "
+
+#define MSI_MSG_ADDRESS		0x2FF00000
+#define MSI_MSG_DEFAULT_COUNT	0xC0
+
+struct boot_params *efi_bp;
+struct loongsonlist_mem_map *g_mmap;
+struct acpi_madt_lio_pic *acpi_liointc;
+struct acpi_madt_eio_pic *acpi_eiointc[MAX_IO_PICS];
+
+struct acpi_madt_ht_pic *acpi_htintc;
+struct acpi_madt_lpc_pic *acpi_pchlpc;
+struct acpi_madt_msi_pic *acpi_pchmsi[MAX_IO_PICS];
+struct acpi_madt_bio_pic *acpi_pchpic[MAX_IO_PICS];
+
+struct irq_domain *cpu_domain;
+struct irq_domain *liointc_domain;
+struct irq_domain *pch_lpc_domain;
+struct irq_domain *pch_msi_domain[MAX_IO_PICS];
+struct irq_domain *pch_pic_domain[MAX_IO_PICS];
+
+char arcs_cmdline[COMMAND_LINE_SIZE];
+int nr_io_pics;
+int bpi_version;
+
+struct acpi_madt_lio_pic liointc_default = {
+		.address = LOONGSON_REG_BASE + 0x1400,
+		.size = 256,
+		.cascade = {2, 3},
+		.cascade_map = {0x00FFFFFF, 0xff000000},
+};
+
+struct acpi_madt_lpc_pic pchlpc_default = {
+	.address = LS7A_LPC_REG_BASE,
+	.size = SZ_4K,
+	.cascade = 19,
+};
+
+struct acpi_madt_eio_pic eiointc_default[MAX_IO_PICS];
+struct acpi_madt_msi_pic pchmsi_default[MAX_IO_PICS];
+struct acpi_madt_bio_pic pchpic_default[MAX_IO_PICS];
+
+static int
+acpi_parse_lapic(union acpi_subtable_headers *header, const unsigned long end)
+{
+	struct acpi_madt_local_apic *processor = NULL;
+
+	processor = (struct acpi_madt_local_apic *)header;
+	if (BAD_MADT_ENTRY(processor, end))
+		return -EINVAL;
+
+	acpi_table_print_madt_entry(&header->common);
+	set_processor_mask(processor->id, processor->lapic_flags);
+
+	return 0;
+}
+
+static int acpi_parse_madt_lapic(void)
+{
+	int ret;
+	struct acpi_subtable_proc madt_proc[1];
+
+	memset(madt_proc, 0, sizeof(madt_proc));
+	madt_proc[0].id = ACPI_MADT_TYPE_LOCAL_APIC;
+	madt_proc[0].handler = acpi_parse_lapic;
+	ret = acpi_table_parse_entries_array(ACPI_SIG_MADT,
+				sizeof(struct acpi_table_madt),
+				madt_proc, ARRAY_SIZE(madt_proc),
+				MAX_CORE_PIC);
+	if (ret < 0) {
+		pr_err(PREFIX "Error parsing LAPIC entries\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int bad_pch_pic(unsigned long address)
+{
+	if (nr_io_pics >= MAX_IO_PICS) {
+		pr_warn("WARNING: Max # of I/O PCH_PICs (%d) exceeded (found %d), skipping\n",
+			MAX_IO_PICS, nr_io_pics);
+		return 1;
+	}
+	if (!address) {
+		pr_warn("WARNING: Bogus (zero) I/O PCH_PIC address found in table, skipping!\n");
+		return 1;
+	}
+	return 0;
+}
+
+void register_default_pic(int id, u32 address, u32 irq_base)
+{
+	int idx, entries;
+	unsigned long addr;
+
+	if (bad_pch_pic(address))
+		return;
+
+	idx = nr_io_pics;
+
+	pchpic_default[idx].address = address;
+	if (idx)
+		pchpic_default[idx].address |= nid_to_addrbase(id) | HT1LO_OFFSET;
+	pchpic_default[idx].id = id;
+	pchpic_default[idx].version = 0;
+	pchpic_default[idx].size = 0x1000;
+	pchpic_default[idx].gsi_base = irq_base;
+
+	msi_group[nr_io_pics].pci_segment = nr_io_pics;
+	pch_group[nr_io_pics].node = msi_group[nr_io_pics].node = id;
+
+	addr = pchpic_default[idx].address;
+	entries = (((unsigned long)ls7a_readq(address) >> 48) & 0xff) + 1;
+	pchmsi_default[idx].msg_address = MSI_MSG_ADDRESS;
+	pchmsi_default[idx].start = entries;
+	pchmsi_default[idx].count = MSI_MSG_DEFAULT_COUNT;
+
+	eiointc_default[idx].cascade = 3;
+	eiointc_default[idx].node = id;
+	eiointc_default[idx].node_map = 1;
+
+	if (idx) {
+		eiointc_default[idx].cascade = 0x4;
+		eiointc_default[0].node_map = 0x1DF;
+		eiointc_default[idx].node_map = 0xFE20;
+	}
+
+	acpi_pchpic[idx] = &pchpic_default[idx];
+	acpi_pchmsi[idx] = &pchmsi_default[idx];
+	acpi_eiointc[idx] = &eiointc_default[idx];
+
+	nr_io_pics++;
+}
+
+static int
+acpi_parse_legacy_pch_pic(struct acpi_subtable_header *header,
+		const unsigned long end)
+{
+	struct acpi_madt_io_apic *pch_pic = NULL;
+
+	pch_pic = (struct acpi_madt_io_apic *)header;
+
+	if (BAD_MADT_ENTRY(pch_pic, end))
+		return -EINVAL;
+
+	acpi_table_print_madt_entry(header);
+
+	register_default_pic(pch_pic->id, pch_pic->address,
+			pch_pic->global_irq_base);
+
+	return 0;
+}
+
+/*
+ * Parse PCH_PIC related entries in MADT
+ * returns 0 on success, < 0 on error
+ */
+static int acpi_parse_madt_pch_pic_entries(void)
+{
+	int count;
+
+	/*
+	 * ACPI interpreter is required to complete interrupt setup,
+	 * so if it is off, don't enumerate the io-apics with ACPI.
+	 * If MPS is present, it will handle them,
+	 * otherwise the system will stay in PIC mode
+	 */
+	if (acpi_disabled || acpi_noirq)
+		return -ENODEV;
+
+	count = acpi_table_parse_madt(ACPI_MADT_TYPE_IO_APIC,
+			(void *)acpi_parse_legacy_pch_pic, MAX_IO_PICS);
+	if (!count) {
+		printk(KERN_ERR PREFIX "No PCH_PIC entries present\n");
+		return -ENODEV;
+	} else if (count < 0) {
+		printk(KERN_ERR PREFIX "Error parsing PCH_PIC entry\n");
+		return count;
+	}
+
+	return 0;
+}
+
+int legacy_madt_table_init(void)
+{
+	int error;
+
+	/* Parse MADT LAPIC entries */
+	error = acpi_parse_madt_lapic();
+	if (!error) {
+		acpi_liointc = &liointc_default;
+		acpi_pchlpc = &pchlpc_default;
+		acpi_parse_madt_pch_pic_entries();
+	}
+	if (error == -EINVAL) {
+		pr_err(PREFIX
+			"Invalid BIOS MADT, disabling ACPI\n");
+		disable_acpi();
+		return -1;
+	}
+
+	loongson_sysconf.nr_cpus = num_processors;
+	return 0;
+}
+
+int setup_legacy_IRQ(void)
+{
+	int i, ret;
+	struct irq_domain *pic_domain;
+
+	if (!acpi_eiointc[0])
+		cpu_data[0].options &= ~LOONGARCH_CPU_EXTIOI;
+
+	ret = cpuintc_acpi_init(NULL, 0);
+	if (ret) {
+		printk("CPU domain init eror!\n");
+		return -1;
+	}
+	cpu_domain = get_cpudomain();
+	ret = liointc_acpi_init(cpu_domain, acpi_liointc);
+	if (ret) {
+		printk("Liointc domain init eror!\n");
+		return -1;
+	}
+	liointc_domain = irq_find_matching_fwnode(liointc_handle, DOMAIN_BUS_ANY);
+	if (cpu_has_extioi) {
+		pr_info("Using EIOINTC interrupt mode\n");
+		for (i = 0; i < nr_io_pics; i++) {
+			ret = eiointc_acpi_init(cpu_domain, acpi_eiointc[i]);
+			if (ret) {
+				printk("Eiointc domain init eror!\n");
+				return -1;
+			}
+			pch_pic_parse_madt((union acpi_subtable_headers *)acpi_pchpic[i], 0);
+			pch_msi_parse_madt((union acpi_subtable_headers *)acpi_pchmsi[i], 0);
+		}
+	/* HTVECINTC maybe not use */
+	} else {
+		pr_info("Using HTVECINTC interrupt mode\n");
+		ret = htvec_acpi_init(liointc_domain, acpi_htintc);
+		if (ret) {
+			printk("HTVECintc domain init eror!\n");
+			return -1;
+		}
+		pch_pic_parse_madt((union acpi_subtable_headers *)acpi_pchpic[0], 0);
+		pch_msi_parse_madt((union acpi_subtable_headers *)acpi_pchmsi[0], 0);
+	}
+
+	pic_domain = get_pchpic_irq_domain();
+	if (pic_domain)
+		pch_lpc_acpi_init(pic_domain, acpi_pchlpc);
+
+	return 0;
+}
+
+/*
+ * Manage initrd
+ */
+#ifdef CONFIG_BLK_DEV_INITRD
+static unsigned long init_initrd(unsigned long ps, unsigned long z)
+{
+	static int initalized;
+
+	if (!ps || !z)
+		return 0;
+
+	initrd_start = (unsigned long)__va(ps);
+	initrd_end = initrd_start + z;
+	/*
+	 * Board specific code or command line parser should have
+	 * already set up initrd_start and initrd_end. In these cases
+	 * perfom sanity checks and use them if all looks good.
+	 */
+	if (initrd_start < PAGE_OFFSET || initrd_end <= initrd_start) {
+		pr_err("initrd start load address error!");
+		goto disable;
+	}
+
+	if (initrd_start & ~PAGE_MASK) {
+		pr_err("initrd start must be page aligned\n");
+		goto disable;
+	}
+
+	memblock_reserve(__pa(initrd_start), z);
+	initrd_below_start_ok = 1;
+
+	if (!initalized)
+		pr_info("Initial ramdisk at: 0x%lx (%lu bytes)\n",
+				initrd_start, z);
+	initalized = 1;
+
+	return 0;
+disable:
+	printk(KERN_CONT " - disabling initrd\n");
+	initrd_start = 0;
+	initrd_end = 0;
+	return 0;
+}
+
+static int early_initrd(char *p)
+{
+	unsigned long start, size;
+	char *endp;
+
+	if (!efi_bp)
+		return 0;
+	start = memparse(p, &endp);
+	if (*endp == ',')
+		size = memparse(endp + 1, NULL);
+
+	if (start + size > PFN_PHYS(max_low_pfn)) {
+		pr_err(KERN_INFO "Initrd physical address is out of memory!");
+		return 0;
+	}
+
+	init_initrd(start, size);
+
+	return 0;
+}
+early_param("initrd", early_initrd);
+
+static int rd_start_early(char *p)
+{
+	unsigned long start;
+
+	if (!efi_bp)
+		return 0;
+
+	start = memparse(p, &p);
+	initrd_start = start;
+	initrd_end += start;
+	init_initrd(__pa(start), initrd_end - start);
+
+	return 0;
+}
+early_param("rd_start", rd_start_early);
+
+static int rd_size_early(char *p)
+{
+	unsigned long size;
+
+	if (!efi_bp)
+		return 0;
+	size = memparse(p, &p);
+	initrd_end += size;
+
+	init_initrd(__pa(initrd_start), size);
+	return 0;
+}
+early_param("rd_size", rd_size_early);
+
+#else  /* !CONFIG_BLK_DEV_INITRD */
+static unsigned long init_initrd(void)
+{
+	return 0;
+}
+#endif
+
+void fw_init_cmdline(unsigned long argc, unsigned long cmdp)
+{
+	int i;
+	char **_fw_argv;
+
+	_fw_argv = (char **)cmdp;
+
+	arcs_cmdline[0] = '\0';
+	for (i = 1; i < argc; i++) {
+		strlcat(arcs_cmdline, _fw_argv[i], COMMAND_LINE_SIZE);
+		if (i < (argc - 1))
+			strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE);
+	}
+	strlcat(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE);
+}
+
+static u8 ext_listhdr_checksum(u8 *buffer, u32 length)
+{
+	u8 sum = 0;
+	u8 *end = buffer + length;
+
+	while (buffer < end) {
+		sum = (u8)(sum + *(buffer++));
+	}
+
+	return (sum);
+}
+
+static int parse_mem(struct _extention_list_hdr *head)
+{
+	g_mmap = (struct loongsonlist_mem_map *)head;
+	if (ext_listhdr_checksum((u8 *)g_mmap, head->length)) {
+		printk("mem checksum error\n");
+		return -EPERM;
+	}
+	return 0;
+}
+
+/* legacy firmware passed, add use this info if need vbios */
+static int parse_vbios(struct _extention_list_hdr *head)
+{
+	struct loongsonlist_vbios *pvbios;
+	pvbios = (struct loongsonlist_vbios *)head;
+
+	if (ext_listhdr_checksum((u8 *)pvbios, head->length)) {
+		printk("vbios_addr checksum error\n");
+		return -EPERM;
+	}
+	return 0;
+}
+
+/* legacy firmware passed, add use this info if need screeninfo KVM? */
+static int parse_screeninfo(struct _extention_list_hdr *head)
+{
+	struct loongsonlist_screeninfo *pscreeninfo;
+
+	pscreeninfo = (struct loongsonlist_screeninfo *)head;
+	if (ext_listhdr_checksum((u8 *)pscreeninfo, head->length)) {
+		printk("screeninfo_addr checksum error\n");
+		return -EPERM;
+	}
+
+	memcpy(&screen_info, &pscreeninfo->si, sizeof(screen_info));
+	return 0;
+}
+
+static int list_find(struct boot_params *bp)
+{
+	struct _extention_list_hdr *fhead = NULL;
+	unsigned long index;
+
+	fhead = bp->extlist;
+	if (!fhead) {
+		printk("the bp ext struct empty!\n");
+		return -1;
+	}
+	do {
+		if (memcmp(&(fhead->signature), LOONGSON_MEM_SIGNATURE, 3) == 0) {
+			if (parse_mem(fhead) != 0) {
+				printk("parse mem failed\n");
+				return -EPERM;
+			}
+		} else if (memcmp(&(fhead->signature), LOONGSON_VBIOS_SIGNATURE, 5) == 0) {
+			if (parse_vbios(fhead) != 0) {
+				printk("parse vbios failed\n");
+				return -EPERM;
+			}
+		} else if (memcmp(&(fhead->signature), LOONGSON_SCREENINFO_SIGNATURE, 5) == 0) {
+			if (parse_screeninfo(fhead) != 0) {
+				printk("parse screeninfo failed\n");
+				return -EPERM;
+			}
+		}
+		fhead = (struct _extention_list_hdr *)fhead->next;
+		index = (unsigned long)fhead;
+	} while (index);
+	return 0;
+}
+
+unsigned int bpi_init(void)
+{
+	return list_find(efi_bp);
+}
+
+static void register_addrs_set(u64 *registers, const u64 addr, int num)
+{
+	u64 i;
+
+	for (i = 0; i < num; i++) {
+		*registers = (i << 44) | addr;
+		registers++;
+	}
+}
+
+static int get_bpi_version(u64 *signature)
+{
+	u8 data[9];
+	int version = BPI_VERSION_NONE;
+	data[8] = 0;
+	memcpy(data, signature, sizeof(*signature));
+	if (kstrtoint(&data[3], 10, &version))
+		return BPI_VERSION_NONE;
+	return version;
+}
+
+static void __init parse_bpi_flags(void)
+{
+	if (efi_bp->flags & BPI_FLAGS_UEFI_SUPPORTED) {
+		set_bit(EFI_BOOT, &efi.flags);
+	} else {
+		clear_bit(EFI_BOOT, &efi.flags);
+	}
+}
+
+unsigned long legacy_boot_init(unsigned long argc, unsigned long cmdptr, unsigned long bpi)
+{
+	int ret;
+
+	if (!bpi)
+		return -1;
+	efi_bp = (struct boot_params *)bpi;
+	bpi_version = get_bpi_version(&efi_bp->signature);
+	pr_info("BPI%d with boot flags %llx.\n", bpi_version, efi_bp->flags);
+	if (bpi_version == BPI_VERSION_NONE)
+		panic("Fatal error, bpi ver BONE!\n");
+	else if (bpi_version == BPI_VERSION_V2)
+		parse_bpi_flags();
+
+	fw_init_cmdline(argc, cmdptr);
+	ret = bpi_init();
+	if (ret) {
+		pr_err("init legacy firmware error!\n");
+		return -1;
+	}
+
+	return 0;
+}
+
+static int __init add_legacy_isa_io(struct fwnode_handle *fwnode, unsigned long isa_base)
+{
+	int ret = 0;
+	unsigned long vaddr;
+	struct logic_pio_hwaddr *range;
+
+	range = kzalloc(sizeof(*range), GFP_ATOMIC);
+	if (!range)
+		return -ENOMEM;
+
+	range->fwnode = fwnode;
+	range->size = ISA_IOSIZE;
+	range->hw_start = isa_base;
+	range->flags = LOGIC_PIO_CPU_MMIO;
+
+	ret = logic_pio_register_range(range);
+	if (ret) {
+		kfree(range);
+		return ret;
+	}
+
+	if (range->io_start != 0) {
+		logic_pio_unregister_range(range);
+		kfree(range);
+		return -EINVAL;
+	}
+
+	vaddr = (unsigned long)(PCI_IOBASE + range->io_start);
+	ret = ioremap_page_range(vaddr, vaddr + range->size, range->hw_start, pgprot_device(PAGE_KERNEL));
+	return ret;
+}
+
+static struct fwnode_handle * __init parse_isa_base(u64 *cpu_addr)
+{
+	struct device_node *np;
+	const __be32 *ranges = NULL;
+	int len;
+	struct device_node *node;
+
+	for_each_node_by_name(np, "isa") {
+		node = of_node_get(np);
+
+		if (!node)
+			break;
+
+		ranges = of_get_property(node, "ranges", &len);
+
+		if (!ranges || (ranges && len > 0))
+			break;
+	}
+	if (ranges) {
+		ranges += 2;
+		*cpu_addr = of_translate_address(np, ranges);
+		return &np->fwnode;
+	}
+
+	return NULL;
+}
+
+static int __init register_legacy_isa_io(void)
+{
+	struct fwnode_handle *fwnode;
+	u64 cpu_addr;
+
+	if (!acpi_disabled) {
+		cpu_addr = ISA_PHY_IOBASE;
+		fwnode = kzalloc(sizeof(*fwnode), GFP_ATOMIC);
+	} else {
+		fwnode = parse_isa_base(&cpu_addr);
+	}
+
+	if (fwnode)
+		add_legacy_isa_io(fwnode, cpu_addr);
+
+	return 0;
+}
+arch_initcall(register_legacy_isa_io);

arch/loongarch/kernel/legacy_boot.h

+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __LEGACY_BOOT_H_
+#define __LEGACY_BOOT_H_
+#include <linux/screen_info.h>
+#include <linux/of_address.h>
+#define ADDRESS_TYPE_SYSRAM	1
+#define ADDRESS_TYPE_RESERVED	2
+#define ADDRESS_TYPE_ACPI	3
+#define ADDRESS_TYPE_NVS	4
+#define ADDRESS_TYPE_PMEM	5
+
+#define LOONGSON3_BOOT_MEM_MAP_MAX	128
+#define RT_MAP_START			100
+#define FIX_MAP_ENTRY			32
+
+/* mask of the flags in bootparamsinterface */
+#define BPI_FLAGS_UEFI_SUPPORTED	BIT(0)
+#define BPI_FLAGS_SOC_CPU		BIT(1)
+
+#define LOONGSON_DMA_MASK_BIT			64
+#define LOONGSON_MEM_SIGNATURE			"MEM"
+#define LOONGSON_VBIOS_SIGNATURE		"VBIOS"
+#define LOONGSON_EFIBOOT_SIGNATURE		"BPI"
+#define LOONGSON_SCREENINFO_SIGNATURE	"SINFO"
+#define LOONGSON_EFIBOOT_VERSION		1000
+
+/* Values for Version firmware */
+
+enum bpi_vers {
+	BPI_VERSION_NONE = 0,
+	BPI_VERSION_V1 = 1000,
+	BPI_VERSION_V2 = 1001,
+};
+
+struct boot_params {
+	u64	signature;	/* {"BPIXXXXX"} */
+	void	*systemtable;
+	struct  _extention_list_hdr *extlist;
+	u64		flags;
+} __attribute__((packed));
+
+struct _extention_list_hdr {
+	u64	signature;
+	u32	length;
+	u8	revision;
+	u8	checksum;
+	struct  _extention_list_hdr *next;
+} __attribute__((packed));
+
+struct loongsonlist_mem_map {
+	struct	_extention_list_hdr header;	/*{"M", "E", "M"}*/
+	u8	map_count;
+	struct	_loongson_mem_map {
+		u32 mem_type;
+		u64 mem_start;
+		u64 mem_size;
+	} __attribute__((packed))map[LOONGSON3_BOOT_MEM_MAP_MAX];
+} __attribute__((packed));
+
+struct loongsonlist_vbios {
+	struct	_extention_list_hdr header;	/* {VBIOS} */
+	u64	vbios_addr;
+} __attribute__((packed));
+
+struct loongsonlist_screeninfo{
+	struct  _extention_list_hdr header;
+	struct  screen_info si;
+};
+unsigned long legacy_boot_init(unsigned long argc,
+		unsigned long cmdptr, unsigned long bpi);
+extern int bpi_version;
+extern struct boot_params *efi_bp;
+extern struct loongsonlist_mem_map *g_mmap;
+extern int set_processor_mask(u32 id, u32 flags);
+extern int __init setup_legacy_IRQ(void);
+extern struct loongson_system_configuration loongson_sysconf;
+extern unsigned long long smp_group[MAX_PACKAGES];
+extern int legacy_madt_table_init(void);
+extern struct pch_pic *pch_pic_priv[MAX_IO_PICS];
+extern struct irq_domain *get_cpudomain(void);
+extern int __init cpuintc_acpi_init(union acpi_subtable_headers *header,
+				   const unsigned long end);
+extern int __init
+pch_pic_parse_madt(union acpi_subtable_headers *header,
+		const unsigned long end);
+extern int __init
+pch_msi_parse_madt(union acpi_subtable_headers *header,
+		const unsigned long end);
+extern struct irq_domain *get_pchpic_irq_domain(void);
+#endif

arch/loongarch/kernel/mem.c

@@ -9,13 +9,35 @@
 #include <asm/bootinfo.h>
 #include <asm/loongson.h>
 #include <asm/sections.h>
-
+#include "legacy_boot.h"
 void __init memblock_init(void)
 {
-	u32 mem_type;
+	u32 i, mem_type;
 	u64 mem_start, mem_end, mem_size;
 	efi_memory_desc_t *md;
+	if (g_mmap) {
+		/* parse memory information */
+		for (i = 0; i < g_mmap->map_count; i++) {
+			mem_type = g_mmap->map[i].mem_type;
+			mem_start = g_mmap->map[i].mem_start;
+			mem_size = g_mmap->map[i].mem_size;
+			mem_end = mem_start + mem_size;
+
+			switch (mem_type) {
+			case ADDRESS_TYPE_SYSRAM:
+			pr_info("add memory region memblock - base: %lx size: %x\n", mem_start, mem_size);
+				memblock_add(mem_start, mem_size);
+				if (max_low_pfn < (mem_end >> PAGE_SHIFT))
+					max_low_pfn = mem_end >> PAGE_SHIFT;
+				break;
+			}
+		}
+		memblock_set_current_limit(PFN_PHYS(max_low_pfn));
 
+		memblock_reserve(__pa_symbol(&_text),
+			 __pa_symbol(&_end) - __pa_symbol(&_text));
+		return;
+	}
 	/* Parse memory information */
 	for_each_efi_memory_desc(md) {
 		mem_type = md->type;

arch/loongarch/kernel/numa.c

@@ -25,6 +25,7 @@
 #include <asm/pgalloc.h>
 #include <asm/sections.h>
 #include <asm/time.h>
+#include "legacy_boot.h"
 
 int numa_off;
 struct pglist_data *node_data[MAX_NUMNODES];
@@ -37,7 +38,6 @@ static struct numa_meminfo numa_meminfo;
 cpumask_t cpus_on_node[MAX_NUMNODES];
 cpumask_t phys_cpus_on_node[MAX_NUMNODES];
 EXPORT_SYMBOL(cpus_on_node);
-
 /*
  * apicid, cpu, node mappings
  */
@@ -333,10 +333,45 @@ static void __init add_numamem_region(u64 start, u64 end, u32 type)
 
 static void __init init_node_memblock(void)
 {
-	u32 mem_type;
+	u32 i, mem_type;
 	u64 mem_end, mem_start, mem_size;
 	efi_memory_desc_t *md;
 
+	if (g_mmap) {
+		for (i = 0; i < g_mmap->map_count; i++) {
+			mem_type = g_mmap->map[i].mem_type;
+			mem_start = g_mmap->map[i].mem_start;
+			mem_size = g_mmap->map[i].mem_size;
+			mem_end = g_mmap->map[i].mem_start + mem_size;
+
+			switch (mem_type) {
+			case ADDRESS_TYPE_SYSRAM:
+				mem_start = PFN_ALIGN(mem_start);
+				mem_end = PFN_ALIGN(mem_end - PAGE_SIZE + 1);
+				if (mem_start >= mem_end)
+					break;
+				add_numamem_region(mem_start, mem_end, EFI_PERSISTENT_MEMORY);
+				break;
+
+			case ADDRESS_TYPE_ACPI:
+				mem_start = PFN_ALIGN(mem_start - PAGE_SIZE + 1);
+				mem_end = PFN_ALIGN(mem_end);
+				mem_size = mem_end - mem_start;
+				memblock_add(mem_start, mem_size);
+				memblock_mark_nomap(mem_start, mem_size);
+				memblock_set_node(mem_start, mem_size,
+						&memblock.memory, 0);
+				memblock_reserve(mem_start, mem_size);
+				break;
+
+			case ADDRESS_TYPE_RESERVED:
+				memblock_reserve(mem_start, mem_size);
+				break;
+			}
+		}
+		return;
+	}
+
 	/* Parse memory information and activate */
 	for_each_efi_memory_desc(md) {
 		mem_type = md->type;

arch/loongarch/kernel/reset.c

@@ -42,9 +42,10 @@ void machine_power_off(void)
 	preempt_disable();
 	smp_send_stop();
 #endif
-
+	pm_power_off();
 #ifdef CONFIG_EFI
-	efi.reset_system(EFI_RESET_SHUTDOWN, EFI_SUCCESS, 0, NULL);
+	if (efi.reset_system)
+		efi.reset_system(EFI_RESET_SHUTDOWN, EFI_SUCCESS, 0, NULL);
 #endif
 	while (true) {
 		__arch_cpu_idle();

arch/loongarch/kernel/setup.c

@@ -40,6 +40,7 @@
 #include <asm/sections.h>
 #include <asm/setup.h>
 #include <asm/time.h>
+#include "legacy_boot.h"
 
 #define SMBIOS_BIOSSIZE_OFFSET		0x09
 #define SMBIOS_BIOSEXTERN_OFFSET	0x13
@@ -51,7 +52,7 @@
 
 struct screen_info screen_info __section(".data");
 
-unsigned long fw_arg0, fw_arg1;
+unsigned long fw_arg0, fw_arg1, fw_arg2;
 DEFINE_PER_CPU(unsigned long, kernelsp);
 struct cpuinfo_loongarch cpu_data[NR_CPUS] __read_mostly;
 
@@ -120,9 +121,22 @@ static void __init parse_cpu_table(const struct dmi_header *dm)
 
 static void __init parse_bios_table(const struct dmi_header *dm)
 {
+	int bios_extern;
 	char *dmi_data = (char *)dm;
 
+	bios_extern = *(dmi_data + SMBIOS_BIOSEXTERN_OFFSET);
 	b_info.bios_size = (*(dmi_data + SMBIOS_BIOSSIZE_OFFSET) + 1) << 6;
+
+	if (bpi_version == BPI_VERSION_V2) {
+		if ((!!(efi_bp->flags & BPI_FLAGS_UEFI_SUPPORTED)) != (!!(bios_extern & LOONGSON_EFI_ENABLE)))
+			pr_err("There is a conflict of definitions between efi_bp->flags and smbios\n");
+		return ;
+	}
+
+	if (bios_extern & LOONGSON_EFI_ENABLE)
+		set_bit(EFI_BOOT, &efi.flags);
+	else
+		clear_bit(EFI_BOOT, &efi.flags);
 }
 
 static void __init find_tokens(const struct dmi_header *dm, void *dummy)
@@ -187,7 +201,7 @@ early_param("mem", early_parse_mem);
 
 void __init platform_init(void)
 {
-	efi_init();
+	loongson_efi_init();
 #ifdef CONFIG_ACPI_TABLE_UPGRADE
 	acpi_table_upgrade();
 #endif
@@ -345,6 +359,7 @@ void __init setup_arch(char **cmdline_p)
 {
 	cpu_probe();
 	*cmdline_p = boot_command_line;
+	legacy_boot_init(fw_arg0, fw_arg1, fw_arg2);
 
 	init_environ();
 	memblock_init();

arch/loongarch/kernel/smp.c

@@ -29,6 +29,7 @@
 #include <asm/processor.h>
 #include <asm/setup.h>
 #include <asm/time.h>
+#include "legacy_boot.h"
 
 int __cpu_number_map[NR_CPUS];   /* Map physical to logical */
 EXPORT_SYMBOL(__cpu_number_map);
@@ -195,11 +196,11 @@ void __init loongson3_prepare_cpus(unsigned int max_cpus)
  */
 void loongson3_boot_secondary(int cpu, struct task_struct *idle)
 {
-	unsigned long entry;
+	unsigned long entry = (unsigned long)&smpboot_entry;
 
 	pr_info("Booting CPU#%d...\n", cpu);
-
-	entry = __pa_symbol((unsigned long)&smpboot_entry);
+	if (!efi_bp)
+		entry = __pa_symbol((unsigned long)&smpboot_entry);
 	cpuboot_data.stack = (unsigned long)__KSTK_TOS(idle);
 	cpuboot_data.thread_info = (unsigned long)task_thread_info(idle);
 

arch/loongarch/pci/acpi.c

@@ -55,13 +55,158 @@ static void acpi_release_root_info(struct acpi_pci_root_info *ci)
 	kfree(info);
 }
 
+static void arch_pci_root_validate_resources(struct device *dev,
+					     struct list_head *resources,
+					     unsigned long type)
+{
+	LIST_HEAD(list);
+	struct resource *res1, *res2, *root = NULL;
+	struct resource_entry *tmp, *entry, *entry2;
+
+	BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0);
+	root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource;
+
+	list_splice_init(resources, &list);
+	resource_list_for_each_entry_safe(entry, tmp, &list) {
+		bool free = false;
+		resource_size_t end;
+
+		res1 = entry->res;
+		if (!(res1->flags & type))
+			goto next;
+
+		/* Exclude non-addressable range or non-addressable portion */
+		end = min(res1->end, root->end);
+		if (end <= res1->start) {
+			dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n",
+				 res1);
+			free = true;
+			goto next;
+		} else if (res1->end != end) {
+			dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n",
+				 res1, (unsigned long long)end + 1,
+				 (unsigned long long)res1->end);
+			res1->end = end;
+		}
+
+		resource_list_for_each_entry(entry2, resources) {
+			res2 = entry2->res;
+			if (!(res2->flags & type))
+				continue;
+
+			/*
+			 * I don't like throwing away windows because then
+			 * our resources no longer match the ACPI _CRS, but
+			 * the kernel resource tree doesn't allow overlaps.
+			 */
+			if (resource_overlaps(res1, res2)) {
+				res2->start = min(res1->start, res2->start);
+				res2->end = max(res1->end, res2->end);
+				dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n",
+					 res2, res1);
+				free = true;
+				goto next;
+			}
+		}
+
+next:
+		resource_list_del(entry);
+		if (free)
+			resource_list_free_entry(entry);
+		else
+			resource_list_add_tail(entry, resources);
+	}
+}
+static void arch_pci_root_remap_iospace(struct fwnode_handle *fwnode,
+			struct resource_entry *entry)
+{
+	struct resource *res = entry->res;
+	resource_size_t cpu_addr = res->start;
+	resource_size_t pci_addr = cpu_addr - entry->offset;
+	resource_size_t length = resource_size(res);
+	unsigned long port;
+	if (pci_register_io_range(fwnode, cpu_addr, length)) {
+		res->start += ISA_IOSIZE;
+		cpu_addr = res->start;
+		pci_addr = cpu_addr - entry->offset;
+		length = resource_size(res);
+		if (pci_register_io_range(fwnode, cpu_addr, length))
+			goto err;
+	}
+
+	port = pci_address_to_pio(cpu_addr);
+	if (port == (unsigned long)-1)
+		goto err;
+
+	res->start = port;
+	res->end = port + length - 1;
+	entry->offset = port - pci_addr;
+
+	if (pci_remap_iospace(res, cpu_addr) < 0)
+		goto err;
+
+	pr_info("Remapped I/O %pa to %pR\n", &cpu_addr, res);
+	return;
+err:
+	res->flags |= IORESOURCE_DISABLED;
+}
+
+static int arch_pci_probe_root_resources(struct acpi_pci_root_info *info)
+{
+	int ret;
+	struct list_head *list = &info->resources;
+	struct acpi_device *device = info->bridge;
+	struct resource_entry *entry, *tmp;
+	unsigned long flags;
+	struct resource *res;
+
+	flags = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT;
+	ret = acpi_dev_get_resources(device, list,
+				     acpi_dev_filter_resource_type_cb,
+				     (void *)flags);
+	if (ret < 0)
+		dev_warn(&device->dev,
+			 "failed to parse _CRS method, error code %d\n", ret);
+	else if (ret == 0)
+		dev_dbg(&device->dev,
+			"no IO and memory resources present in _CRS\n");
+	else {
+		resource_list_for_each_entry_safe(entry, tmp, list) {
+			if (entry->res->flags & IORESOURCE_IO) {
+				res = entry->res;
+				res->start = PFN_ALIGN(res->start);
+				res->end += 1;
+				res->end = PFN_ALIGN(res->end);
+				res->end -= 1;
+				if (!entry->offset) {
+					entry->offset = LOONGSON_LIO_BASE;
+					res->start |= LOONGSON_LIO_BASE;
+					res->end |= LOONGSON_LIO_BASE;
+				}
+				arch_pci_root_remap_iospace(&device->fwnode,
+						entry);
+			}
+			if (entry->res->flags & IORESOURCE_DISABLED)
+				resource_list_destroy_entry(entry);
+			else
+				entry->res->name = info->name;
+		}
+		arch_pci_root_validate_resources(&device->dev, list,
+						 IORESOURCE_MEM);
+		arch_pci_root_validate_resources(&device->dev, list,
+						 IORESOURCE_IO);
+	}
+
+	return ret;
+}
+
 static int acpi_prepare_root_resources(struct acpi_pci_root_info *ci)
 {
 	int status;
 	struct resource_entry *entry, *tmp;
 	struct acpi_device *device = ci->bridge;
 
-	status = acpi_pci_probe_root_resources(ci);
+	status = arch_pci_probe_root_resources(ci);
 	if (status > 0) {
 		resource_list_for_each_entry_safe(entry, tmp, &ci->resources) {
 			if (entry->res->flags & IORESOURCE_MEM) {

drivers/firmware/efi/Makefile

@@ -40,6 +40,7 @@ sw64-obj-$(CONFIG_EFI)			:= sunway-init.o sunway-runtime.o
 obj-$(CONFIG_SW64)			+= $(sw64-obj-y)
 riscv-obj-$(CONFIG_EFI)			:= efi-init.o riscv-runtime.o
 obj-$(CONFIG_RISCV)			+= $(riscv-obj-y)
+obj-$(CONFIG_LOONGARCH)			+= efi-init.o
 obj-$(CONFIG_EFI_CAPSULE_LOADER)	+= capsule-loader.o
 obj-$(CONFIG_EFI_EARLYCON)		+= earlycon.o
 obj-$(CONFIG_UEFI_CPER_ARM)		+= cper-arm.o

drivers/firmware/efi/libstub/loongarch-stub.c

@@ -9,7 +9,7 @@
 #include <asm/addrspace.h>
 #include "efistub.h"
 
-typedef void __noreturn (*kernel_entry_t)(bool efi, unsigned long fdt);
+typedef void __noreturn (*kernel_entry_t)(bool efi, unsigned long fdt, int flags);
 
 extern int kernel_asize;
 extern int kernel_fsize;
@@ -52,5 +52,5 @@ void __noreturn efi_enter_kernel(unsigned long entrypoint, unsigned long fdt, un
 	real_kernel_entry = (kernel_entry_t)
 		((unsigned long)&kernel_entry - entrypoint + VMLINUX_LOAD_ADDRESS);
 
-	real_kernel_entry(true, fdt);
+	real_kernel_entry(true, fdt, 0);
 }

drivers/irqchip/irq-loongarch-cpu.c

@@ -119,7 +119,12 @@ static int __init acpi_cascade_irqdomain_init(void)
 	return 0;
 }
 
-static int __init cpuintc_acpi_init(union acpi_subtable_headers *header,
+struct irq_domain *get_cpudomain(void)
+{
+	return irq_domain;
+}
+
+int __init cpuintc_acpi_init(union acpi_subtable_headers *header,
 				   const unsigned long end)
 {
 	if (irq_domain)

drivers/irqchip/irq-loongson-eiointc.c

@@ -333,7 +333,7 @@ static struct syscore_ops eiointc_syscore_ops = {
 	.resume = eiointc_resume,
 };
 
-static int __init
+int __init
 pch_pic_parse_madt(union acpi_subtable_headers *header,
 		       const unsigned long end)
 {
@@ -347,7 +347,7 @@ pch_pic_parse_madt(union acpi_subtable_headers *header,
 	return -EINVAL;
 }
 
-static int __init
+int __init
 pch_msi_parse_madt(union acpi_subtable_headers *header,
 		       const unsigned long end)
 {

drivers/irqchip/irq-loongson-pch-pic.c

@@ -52,6 +52,11 @@ static struct pch_pic *pch_pic_priv[MAX_IO_PICS];
 
 struct fwnode_handle *pch_pic_handle[MAX_IO_PICS];
 
+struct irq_domain *get_pchpic_irq_domain(void)
+{
+	return pch_pic_priv[0]->pic_domain;
+}
+
 static void pch_pic_bitset(struct pch_pic *priv, int offset, int bit)
 {
 	u32 reg;