diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 9665fc127fe2745de8f62ae6efb63b2e7f9f5ea7..1279eb1dfc2edbce5b208079f391b8005f4e2856 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -1620,8 +1620,8 @@ static struct fixed31_32 get_pbn_from_timing(struct pipe_ctx *pipe_ctx)
 	uint32_t numerator;
 	uint32_t denominator;
 
-	bpc = get_color_depth(pipe_ctx->pix_clk_params.color_depth);
-	kbps = pipe_ctx->pix_clk_params.requested_pix_clk * bpc * 3;
+	bpc = get_color_depth(pipe_ctx->stream_res.pix_clk_params.color_depth);
+	kbps = pipe_ctx->stream_res.pix_clk_params.requested_pix_clk * bpc * 3;
 
 	/*
 	 * margin 5300ppm + 300ppm ~ 0.6% as per spec, factor is 1.006
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
index 7d52c6c7cf89b0108f48023141629689429b152c..822568767f2dcd8e340ef43e24f0e25d01ab74da 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
@@ -77,11 +77,11 @@ void dp_enable_link_phy(
 			if (pipes[i].clock_source != NULL &&
 					pipes[i].clock_source->id != CLOCK_SOURCE_ID_DP_DTO) {
 				pipes[i].clock_source = dp_cs;
-				pipes[i].pix_clk_params.requested_pix_clk =
+				pipes[i].stream_res.pix_clk_params.requested_pix_clk =
 						pipes[i].stream->timing.pix_clk_khz;
 				pipes[i].clock_source->funcs->program_pix_clk(
 							pipes[i].clock_source,
-							&pipes[i].pix_clk_params,
+							&pipes[i].stream_res.pix_clk_params,
 							&pipes[i].pll_settings);
 			}
 		}
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index ef5d496656e5092b2dc28bbb0063961358184970..93161a92a427c92a539c4160726eddd37d8c2f60 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -870,20 +870,20 @@ static void build_audio_output(
 		stream->timing.display_color_depth;
 
 	audio_output->crtc_info.requested_pixel_clock =
-			pipe_ctx->pix_clk_params.requested_pix_clk;
+			pipe_ctx->stream_res.pix_clk_params.requested_pix_clk;
 
 	audio_output->crtc_info.calculated_pixel_clock =
-			pipe_ctx->pix_clk_params.requested_pix_clk;
+			pipe_ctx->stream_res.pix_clk_params.requested_pix_clk;
 
 /*for HDMI, audio ACR is with deep color ratio factor*/
 	if (dc_is_hdmi_signal(pipe_ctx->stream->signal) &&
 		audio_output->crtc_info.requested_pixel_clock ==
 				stream->timing.pix_clk_khz) {
-		if (pipe_ctx->pix_clk_params.pixel_encoding == PIXEL_ENCODING_YCBCR420) {
+		if (pipe_ctx->stream_res.pix_clk_params.pixel_encoding == PIXEL_ENCODING_YCBCR420) {
 			audio_output->crtc_info.requested_pixel_clock =
 					audio_output->crtc_info.requested_pixel_clock/2;
 			audio_output->crtc_info.calculated_pixel_clock =
-					pipe_ctx->pix_clk_params.requested_pix_clk/2;
+					pipe_ctx->stream_res.pix_clk_params.requested_pix_clk/2;
 
 		}
 	}
@@ -1003,7 +1003,7 @@ static enum dc_status dce110_prog_pixclk_crtc_otg(
 
 		if (false == pipe_ctx->clock_source->funcs->program_pix_clk(
 				pipe_ctx->clock_source,
-				&pipe_ctx->pix_clk_params,
+				&pipe_ctx->stream_res.pix_clk_params,
 				&pipe_ctx->pll_settings)) {
 			BREAK_TO_DEBUGGER();
 			return DC_ERROR_UNEXPECTED;
@@ -1425,9 +1425,9 @@ static uint32_t get_max_pixel_clock_for_all_paths(
 		if (pipe_ctx->top_pipe)
 			continue;
 
-		if (pipe_ctx->pix_clk_params.requested_pix_clk > max_pix_clk)
+		if (pipe_ctx->stream_res.pix_clk_params.requested_pix_clk > max_pix_clk)
 			max_pix_clk =
-				pipe_ctx->pix_clk_params.requested_pix_clk;
+				pipe_ctx->stream_res.pix_clk_params.requested_pix_clk;
 	}
 
 	if (max_pix_clk == 0)
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
index 94058ee1602948e2842199c2d33ee54885210962..c677f98c3516727778f604f9a0e6617e376d0db2 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
@@ -748,10 +748,10 @@ static void get_pixel_clock_parameters(
 
 enum dc_status dce110_resource_build_pipe_hw_param(struct pipe_ctx *pipe_ctx)
 {
-	get_pixel_clock_parameters(pipe_ctx, &pipe_ctx->pix_clk_params);
+	get_pixel_clock_parameters(pipe_ctx, &pipe_ctx->stream_res.pix_clk_params);
 	pipe_ctx->clock_source->funcs->get_pix_clk_dividers(
 		pipe_ctx->clock_source,
-		&pipe_ctx->pix_clk_params,
+		&pipe_ctx->stream_res.pix_clk_params,
 		&pipe_ctx->pll_settings);
 	resource_build_bit_depth_reduction_params(pipe_ctx->stream,
 			&pipe_ctx->stream->bit_depth_params);
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 16ac96358620d5372c0aef64acfbe2c086688819..e6983980288944f0fa5421b7e20b179179fb003d 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -703,7 +703,7 @@ static enum dc_status dcn10_prog_pixclk_crtc_otg(
 
 	if (false == pipe_ctx->clock_source->funcs->program_pix_clk(
 			pipe_ctx->clock_source,
-			&pipe_ctx->pix_clk_params,
+			&pipe_ctx->stream_res.pix_clk_params,
 			&pipe_ctx->pll_settings)) {
 		BREAK_TO_DEBUGGER();
 		return DC_ERROR_UNEXPECTED;
@@ -1910,7 +1910,7 @@ static void update_dchubp_dpp(
 	enable_dppclk(
 		dc->hwseq,
 		pipe_ctx->pipe_idx,
-		pipe_ctx->pix_clk_params.requested_pix_clk,
+		pipe_ctx->stream_res.pix_clk_params.requested_pix_clk,
 		context->bw.dcn.calc_clk.dppclk_div);
 	dc->current_context->bw.dcn.cur_clk.dppclk_div =
 			context->bw.dcn.calc_clk.dppclk_div;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
index bb9a42d0a1470aef78a9c94a5f2a170730f11f22..ff2dcb7a491dfee58a0092dc76b7b06a2187ad5f 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
@@ -806,11 +806,11 @@ static void build_clamping_params(struct dc_stream_state *stream)
 static enum dc_status build_pipe_hw_param(struct pipe_ctx *pipe_ctx)
 {
 
-	get_pixel_clock_parameters(pipe_ctx, &pipe_ctx->pix_clk_params);
+	get_pixel_clock_parameters(pipe_ctx, &pipe_ctx->stream_res.pix_clk_params);
 
 	pipe_ctx->clock_source->funcs->get_pix_clk_dividers(
 		pipe_ctx->clock_source,
-		&pipe_ctx->pix_clk_params,
+		&pipe_ctx->stream_res.pix_clk_params,
 		&pipe_ctx->pll_settings);
 
 	pipe_ctx->stream->clamping.pixel_encoding = pipe_ctx->stream->timing.pixel_encoding;
diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
index 6f09653ac2cb17b47699176c729f08a5b6575817..968835191da829b92d902d5073658472b8aca88e 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
@@ -157,6 +157,8 @@ struct stream_resource {
 	struct timing_generator *tg;
 	struct stream_encoder *stream_enc;
 	struct audio *audio;
+
+	struct pixel_clk_params pix_clk_params;
 };
 
 struct plane_resource {
@@ -177,7 +179,6 @@ struct pipe_ctx {
 	struct display_clock *dis_clk;
 	struct clock_source *clock_source;
 
-	struct pixel_clk_params pix_clk_params;
 	struct pll_settings pll_settings;
 
 	/*fmt*/