hisi_sec2: refactor the sec2 module code.

driver inclusion
category: feature
bugzilla: NA
CVE: NA

the sec_crypto.c includes offload ecb(aes),2 cbc(aes), xts(sm4),
cbc(des3_ede),ecb(des3_ede) in kernel Crypto,the sec_main.c include
the debugfs, module install and uninstall feature.
Feature or Bugfix:Bugfix
Signed-off-by: Nyekai <yekai13@huawei.com>
Reviewed-by: Nxuzaibo <xuzaibo@huawei.com>
Reviewed-by: NZhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>

drivers/crypto/hisilicon/sec2/sec.h

-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (c) 2018-2019 HiSilicon Limited.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (c) 2018-2019 HiSilicon Limited. */
 
-#ifndef HISI_SEC_H
-#define HISI_SEC_H
+#ifndef __HISI_SEC_V2_H
+#define __HISI_SEC_V2_H
 
 #include <linux/list.h>
+
 #include "../qm.h"
-#include "sec_usr_if.h"
+#include "sec_crypto.h"
 
-#undef pr_fmt
-#define pr_fmt(fmt)	"hisi_sec: " fmt
+/* Cipher resource per hardware SEC queue */
+struct sec_cipher_res {
+	u8 *c_ivin;
+	dma_addr_t c_ivin_dma;
+#ifdef CONFIG_CRYPTO_DEV_HISI_SEC2_FUSION
+	struct skcipher_request **sk_reqs;
+	struct scatterlist *src;
+	struct scatterlist *dst;
+#endif
+};
 
-#define CTX_Q_NUM_DEF		24
-#define FUSION_LIMIT_DEF	1
-#define FUSION_LIMIT_MAX	64
-#define FUSION_TMOUT_NSEC_DEF	(400 * 1000)
+/* Cipher request of SEC private */
+struct sec_cipher_req {
+	struct hisi_acc_hw_sgl *c_in;
+	dma_addr_t c_in_dma;
+	struct hisi_acc_hw_sgl *c_out;
+	dma_addr_t c_out_dma;
+	u8 *c_ivin;
+	dma_addr_t c_ivin_dma;
+	struct skcipher_request *sk_req;
+	u32 c_len;
+#ifdef CONFIG_CRYPTO_DEV_HISI_SEC2_FUSION
+	u32 gran_num;
+	u64 lba;
+	struct scatterlist *src;
+	struct scatterlist *dst;
+#endif
+	bool encrypt;
+};
+
+/* SEC request of Crypto */
+struct sec_req {
+	struct sec_sqe sec_sqe;
+	struct sec_ctx *ctx;
+	struct sec_qp_ctx *qp_ctx;
+
+	/* Cipher supported only at present */
+	struct sec_cipher_req c_req;
+	int err_type;
+	int req_id;
+
+	/* Status of the SEC request */
+	int fake_busy;
+#ifdef CONFIG_CRYPTO_DEV_HISI_SEC2_FUSION
+	struct skcipher_request **sk_reqs;
+	struct scatterlist *src;
+	struct scatterlist *dst;
+	int fusion_num;
+	ktime_t st_time;
+#endif
+};
+
+/**
+ * struct sec_req_op - Operations for SEC request
+ * @get_res: Get resources for TFM on the SEC device
+ * @resource_alloc: Allocate resources for queue context on the SEC device
+ * @resource_free: Free resources for queue context on the SEC device
+ * @buf_map: DMA map the SGL buffers of the request
+ * @buf_unmap: DMA unmap the SGL buffers of the request
+ * @bd_fill: Fill the SEC queue BD
+ * @bd_send: Send the SEC BD into the hardware queue
+ * @callback: Call back for the request
+ * @process: Main processing logic of Skcipher
+ */
+struct sec_req_op {
+	int (*get_res)(struct sec_ctx *ctx, struct sec_req *req);
+	int (*resource_alloc)(struct sec_ctx *ctx, struct sec_qp_ctx *qp_ctx);
+	void (*resource_free)(struct sec_ctx *ctx, struct sec_qp_ctx *qp_ctx);
+	int (*buf_map)(struct sec_ctx *ctx, struct sec_req *req);
+	void (*buf_unmap)(struct sec_ctx *ctx, struct sec_req *req);
+	void (*do_transfer)(struct sec_ctx *ctx, struct sec_req *req);
+	int (*bd_fill)(struct sec_ctx *ctx, struct sec_req *req);
+	int (*bd_send)(struct sec_ctx *ctx, struct sec_req *req);
+	void (*callback)(struct sec_ctx *ctx, struct sec_req *req);
+	int (*process)(struct sec_ctx *ctx, struct sec_req *req);
+};
+
+/* SEC cipher context which cipher's relatives */
+struct sec_cipher_ctx {
+	u8 *c_key;
+	dma_addr_t c_key_dma;
+	sector_t iv_offset;
+	u32 c_gran_size;
+	u32 ivsize;
+	u8 c_mode;
+	u8 c_alg;
+	u8 c_key_len;
+};
+
+/* SEC queue context which defines queue's relatives */
+struct sec_qp_ctx {
+	struct hisi_qp *qp;
+	struct sec_req **req_list;
+	struct idr req_idr;
+	void *alg_meta_data;
+	struct sec_ctx *ctx;
+	struct mutex req_lock;
+	struct hisi_acc_sgl_pool *c_in_pool;
+	struct hisi_acc_sgl_pool *c_out_pool;
+	atomic_t pending_reqs;
+#ifdef CONFIG_CRYPTO_DEV_HISI_SEC2_FUSION
+	struct sec_req *fusion_req;
+	int fusion_num;
+#endif
+};
+
+/* SEC Crypto TFM context which defines queue and cipher .etc relatives */
+struct sec_ctx {
+	struct sec_qp_ctx *qp_ctx;
+	struct sec_dev *sec;
+	const struct sec_req_op *req_op;
+
+	/* Half queues for encipher, and half for decipher */
+	u32 hlf_q_num;
+
+	/* Threshold for fake busy, trigger to return -EBUSY to user */
+	u32 fake_req_limit;
+
+	/* Currrent cyclic index to select a queue for encipher */
+	atomic_t enc_qcyclic;
+
+	 /* Currrent cyclic index to select a queue for decipher */
+	atomic_t dec_qcyclic;
+	struct sec_cipher_ctx c_ctx;
+#ifdef CONFIG_CRYPTO_DEV_HISI_SEC2_FUSION
+	atomic_t thread_cnt;
+	bool is_fusion;
+	struct hrtimer timer;
+	struct work_struct work;
+#endif
+};
 
 enum sec_endian {
 	SEC_LE = 0,
@@ -30,17 +147,24 @@ enum sec_endian {
 	SEC_64BE
 };
 
-struct hisi_sec_ctrl;
+enum sec_debug_file_index {
+	SEC_CURRENT_QM,
+	SEC_CLEAR_ENABLE,
+	SEC_DEBUG_FILE_NUM,
+};
 
-enum hisi_sec_status {
-	HISI_SEC_RESET,
+struct sec_debug_file {
+	enum sec_debug_file_index index;
+	spinlock_t lock;
+	struct hisi_qm *qm;
 };
 
-struct hisi_sec_dfx {
+struct sec_dfx {
 	u64 send_cnt;
+	u64 recv_cnt;
+#ifdef CONFIG_CRYPTO_DEV_HISI_SEC2_FUSION
 	u64 send_by_tmout;
 	u64 send_by_full;
-	u64 recv_cnt;
 	u64 get_task_cnt;
 	u64 put_task_cnt;
 	u64 gran_task_cnt;
@@ -48,20 +172,29 @@ struct hisi_sec_dfx {
 	u64 fake_busy_cnt;
 	u64 busy_comp_cnt;
 	u64 sec_ctrl;
+#endif
+};
+
+struct sec_debug {
+	struct sec_dfx dfx;
+	struct sec_debug_file files[SEC_DEBUG_FILE_NUM];
 };
 
-struct hisi_sec {
+struct sec_dev {
 	struct hisi_qm qm;
 	struct list_head list;
-	struct hisi_sec_dfx sec_dfx;
-	struct hisi_sec_ctrl *ctrl;
-	struct mutex *hisi_sec_list_lock;
-	int q_ref;
-	int ctx_q_num;
-	int fusion_limit;
-	int fusion_tmout_nsec;
+	struct sec_debug debug;
+	u32 ctx_q_num;
+	u32 num_vfs;
 	unsigned long status;
+#ifdef CONFIG_CRYPTO_DEV_HISI_SEC2_FUSION
+	struct workqueue_struct *wq;
+	u32 fusion_limit;
+	u32 fusion_time;
+#endif
 };
 
-struct hisi_sec *find_sec_device(int node);
+struct sec_dev *sec_find_device(int node);
+int sec_register_to_crypto(void);
+void sec_unregister_from_crypto(void);
 #endif

drivers/crypto/hisilicon/sec2/sec_crypto.h

-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (c) 2018-2019 HiSilicon Limited.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (c) 2018-2019 HiSilicon Limited. */
 
-#ifndef HISI_SEC_CRYPTO_H
-#define HISI_SEC_CRYPTO_H
+#ifndef __HISI_SEC_V2_CRYPTO_H
+#define __HISI_SEC_V2_CRYPTO_H
 
 #define SEC_IV_SIZE		24
 #define SEC_MAX_KEY_SIZE	64
+#define SEC_COMM_SCENE		0
+
+#define SEC_DEF_FUSION		1
+#define SEC_FUSION_LIMIT		64
+#define SEC_DEF_FUSION_TIME_NS	(400 * 1000)
+
+enum sec_calg {
+	SEC_CALG_3DES = 0x1,
+	SEC_CALG_AES  = 0x2,
+	SEC_CALG_SM4  = 0x3,
+};
+
+enum sec_cmode {
+	SEC_CMODE_ECB    = 0x0,
+	SEC_CMODE_CBC    = 0x1,
+	SEC_CMODE_CTR    = 0x4,
+	SEC_CMODE_XTS    = 0x7,
+};
+
+enum sec_ckey_type {
+	SEC_CKEY_128BIT = 0x0,
+	SEC_CKEY_192BIT = 0x1,
+	SEC_CKEY_256BIT = 0x2,
+	SEC_CKEY_3DES_3KEY = 0x1,
+	SEC_CKEY_3DES_2KEY = 0x3,
+};
+
+enum sec_bd_type {
+	SEC_BD_TYPE1 = 0x1,
+	SEC_BD_TYPE2 = 0x2,
+};
+
+enum sec_cipher_dir {
+	SEC_CIPHER_ENC = 0x1,
+	SEC_CIPHER_DEC = 0x2,
+};
+
+enum sec_addr_type {
+	SEC_PBUF = 0x0,
+	SEC_SGL  = 0x1,
+	SEC_PRP  = 0x2,
+};
+
+enum sec_ci_gen {
+	SEC_CI_GEN_BY_ADDR = 0x0,
+	SEC_CI_GEN_BY_LBA  = 0X3,
+};
+
+enum sec_scene {
+	SEC_SCENE_IPSEC   = 0x0,
+	SEC_SCENE_STORAGE = 0x5,
+};
+
+enum sec_work_mode {
+	SEC_NO_FUSION = 0x0,
+	SEC_IV_FUSION = 0x1,
+	SEC_FUSION_BUTT
+};
+
+enum sec_req_ops_type {
+	SEC_OPS_SKCIPHER_ALG = 0x0,
+	SEC_OPS_DMCRYPT      = 0x1,
+	SEC_OPS_MULTI_IV     = 0x2,
+	SEC_OPS_BUTT
+};
+
+struct sec_sqe_type2 {
+
+	/*
+	 * mac_len: 0~5 bits
+	 * a_key_len: 6~10 bits
+	 * a_alg: 11~16 bits
+	 */
+	__le32 mac_key_alg;
+
+	/*
+	 * c_icv_len: 0~5 bits
+	 * c_width: 6~8 bits
+	 * c_key_len: 9~11 bits
+	 * c_mode: 12~15 bits
+	 */
+	__le16 icvw_kmode;
+
+	/* c_alg: 0~3 bits */
+	__u8 c_alg;
+	__u8 rsvd4;
+
+	/*
+	 * a_len: 0~23 bits
+	 * iv_offset_l: 24~31 bits
+	 */
+	__le32 alen_ivllen;
+
+	/*
+	 * c_len: 0~23 bits
+	 * iv_offset_h: 24~31 bits
+	 */
+	__le32 clen_ivhlen;
+
+	__le16 auth_src_offset;
+	__le16 cipher_src_offset;
+	__le16 cs_ip_header_offset;
+	__le16 cs_udp_header_offset;
+	__le16 pass_word_len;
+	__le16 dk_len;
+	__u8 salt3;
+	__u8 salt2;
+	__u8 salt1;
+	__u8 salt0;
+
+	__le16 tag;
+	__le16 rsvd5;
+
+	/*
+	 * c_pad_type: 0~3 bits
+	 * c_pad_len: 4~11 bits
+	 * c_pad_data_type: 12~15 bits
+	 */
+	__le16 cph_pad;
+
+	/* c_pad_len_field: 0~1 bits */
+	__le16 c_pad_len_field;
+
+
+	__le64 long_a_data_len;
+	__le64 a_ivin_addr;
+	__le64 a_key_addr;
+	__le64 mac_addr;
+	__le64 c_ivin_addr;
+	__le64 c_key_addr;
+
+	__le64 data_src_addr;
+	__le64 data_dst_addr;
+
+	/*
+	 * done: 0 bit
+	 * icv: 1~3 bits
+	 * csc: 4~6 bits
+	 * flag: 7-10 bits
+	 * dif_check: 11~13 bits
+	 */
+	__le16 done_flag;
+
+	__u8 error_type;
+	__u8 warning_type;
+	__u8 mac_i3;
+	__u8 mac_i2;
+	__u8 mac_i1;
+	__u8 mac_i0;
+	__le16 check_sum_i;
+	__u8 tls_pad_len_i;
+	__u8 rsvd12;
+	__le32 counter;
+};
+
+#ifdef CONFIG_CRYPTO_DEV_HISI_SEC2_FUSION
+struct sec_sqe_type1 {
+	/*
+	 * mac_len: 0~5 bits
+	 * a_key_len: 6~10 bits
+	 * a_alg: 11~16 bits
+	 */
+	__le32 mac_key_alg;
 
-int hisi_sec_register_to_crypto(int fusion_limit);
-void hisi_sec_unregister_from_crypto(int fusion_limit);
+	/*
+	 * c_icv_len: 0~5 bits
+	 * c_width: 6~8 bits
+	 * c_key_len: 9~11 bits
+	 * c_mode: 12~15 bits
+	 */
+	__le16 icvw_kmode;
+
+	/* cipher alg: 0~3 */
+	__le16 c_alg;
+
+	/* auth gran size: 0~23 */
+	__le32 auth_gran_size;
+
+	/* cipher gran size: 0~23 */
+	__le32 cipher_gran_size;
+
+	__le16 auth_src_offset;
+	__le16 cipher_src_offset;
+
+	__le16 gran_num;
+	__le16 rsvd0;
+
+	/* src buffer skip data len: 0~23 */
+	__le32 src_skip_data_len;
+
+	/* dst buffer skip data len: 0~23 */
+	__le32 dst_skip_data_len;
+
+	__le16 tag;
+	__le16 rsvd1;
+
+	/*
+	 * gen_page_pad_ctrl: 0~3 bits
+	 * gen_grd_ctrl: 4~7 bits
+	 * gen_ver_ctrl: 8~11 bits
+	 * gen_app_ctrl: 12~15 bits
+	 * gen_ver_val: 16~23 bits
+	 * gen_app_val: 24~31 bits
+	 */
+	__le32 gen_pgvava_area;
+
+	__le32 private_info;
+
+	/*
+	 * gen_ref_ctrl: 0~3 bits
+	 * page_pad_type: 4~5 bits
+	 */
+	__u8 grctrl_pptype;
+
+	/*
+	 * chk_grd_ctrl: 0~3 bits
+	 * chk_ref_ctrl: 4~7 bits
+	 */
+	__u8 cgrd_cref_ctrl;
+	__le16 block_size;
+	__le64 lba;
+	__le64 a_key_addr;
+	__le64 mac_addr;
+	__le64 c_ivin_addr;
+	__le64 c_key_addr;
+	__le64 data_src_addr;
+	__le64 data_dst_addr;
+
+	/*
+	 * done: 0 bit
+	 * icv: 1~3 bits
+	 * flag: 7~10 bits
+	 * dif_check: 11~13 bits
+	 */
+	__le16 dn_icvflg_dif;
+	__u8 error_type;
+	__u8 warning_type;
+	__le32 dw29;
+	__le32 dw30;
+	__le32 dw31;
+};
+#endif
+
+struct sec_sqe {
+	/*
+	 * type:	0~3 bits
+	 * cipher:	4~5 bits
+	 * auth:	6~7 bit s
+	 */
+	__u8 type_cipher_auth;
+
+	/*
+	 * seq:	0 bit
+	 * de:	1~2 bits
+	 * scene:	3~6 bits
+	 * src_addr_type: ~7 bit, with sdm_addr_type 0-1 bits
+	 */
+	__u8 sds_sa_type;
+
+	/*
+	 * src_addr_type: 0~1 bits, not used now,
+	 * if support PRP, set this field, or set zero.
+	 * dst_addr_type: 2~4 bits
+	 * mac_addr_type: 5~7 bits
+	 */
+	__u8 sdm_addr_type;
+	__u8 rsvd0;
+
+	/*
+	 * nonce_len(type2): 0~3 bits
+	 * huk(type2): 4 bit
+	 * key_s(type2): 5 bit
+	 * ci_gen: 6~7 bits
+	 */
+	__u8 huk_key_ci;
+
+	/*
+	 * ai_gen: 0~1 bits
+	 * a_pad(type2): 2~3 bits
+	 * c_s(type2): 4~5 bits
+	 */
+	__u8 ai_apd_cs;
+
+	/*
+	 * rhf(type2): 0 bit
+	 * c_key_type: 1~2 bits
+	 * a_key_type: 3~4 bits
+	 * write_frame_len(type2): 5~7 bits
+	 */
+	__u8 rca_key_frm;
+
+	/*
+	 * cal_iv_addr_en(type2): 0 bit
+	 * tls_up(type2): 1 bit
+	 * inveld: 7 bit
+	 */
+	__u8 iv_tls_ld;
+
+	union {
+#ifdef CONFIG_CRYPTO_DEV_HISI_SEC2_FUSION
+		struct sec_sqe_type1 type1;
+#endif
+		struct sec_sqe_type2 type2;
+	};
+};
 
+int sec_register_to_crypto(void);
+void sec_unregister_from_crypto(void);
 #endif

drivers/crypto/hisilicon/sec2/sec_usr_if.h

-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (c) 2018-2019 HiSilicon Limited.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-
-#ifndef HISI_SEC_USR_IF_H
-#define HISI_SEC_USR_IF_H
-
-struct hisi_sec_sqe_type1 {
-	__u32 rsvd2:6;
-	__u32 ci_gen:2;
-	__u32 ai_gen:2;
-	__u32 rsvd1:7;
-	__u32 c_key_type:2;
-	__u32 a_key_type:2;
-	__u32 rsvd0:10;
-	__u32 inveld:1;
-
-	__u32 mac_len:6;
-	__u32 a_key_len:5;
-	__u32 a_alg:6;
-	__u32 rsvd3:15;
-	__u32 c_icv_len:6;
-	__u32 c_width:3;
-	__u32 c_key_len:3;
-	__u32 c_mode:4;
-	__u32 c_alg:4;
-	__u32 rsvd4:12;
-	__u32 auth_gran_size:24;
-	__u32:8;
-	__u32 cipher_gran_size:24;
-	__u32:8;
-	__u32 auth_src_offset:16;
-	__u32 cipher_src_offset:16;
-	__u32 gran_num:16;
-	__u32 rsvd5:16;
-	__u32 src_skip_data_len:24;
-	__u32 rsvd6:8;
-	__u32 dst_skip_data_len:24;
-	__u32 rsvd7:8;
-	__u32 tag:16;
-	__u32 rsvd8:16;
-	__u32 gen_page_pad_ctrl:4;
-	__u32 gen_grd_ctrl:4;
-	__u32 gen_ver_ctrl:4;
-	__u32 gen_app_ctrl:4;
-	__u32 gen_ver_val:8;
-	__u32 gen_app_val:8;
-	__u32 private_info;
-	__u32 gen_ref_ctrl:4;
-	__u32 page_pad_type:2;
-	__u32 rsvd9:2;
-	__u32 chk_grd_ctrl:4;
-	__u32 chk_ref_ctrl:4;
-	__u32 block_size:16;
-	__u32 lba_l;
-	__u32 lba_h;
-	__u32 a_key_addr_l;
-	__u32 a_key_addr_h;
-	__u32 mac_addr_l;
-	__u32 mac_addr_h;
-	__u32 c_ivin_addr_l;
-	__u32 c_ivin_addr_h;
-	__u32 c_key_addr_l;
-	__u32 c_key_addr_h;
-	__u32 data_src_addr_l;
-	__u32 data_src_addr_h;
-	__u32 data_dst_addr_l;
-	__u32 data_dst_addr_h;
-	__u32 done:1;
-	__u32 icv:3;
-	__u32 rsvd11:3;
-	__u32 flag:4;
-	__u32 dif_check:3;
-	__u32 rsvd10:2;
-	__u32 error_type:8;
-	__u32 warning_type:8;
-	__u32 dw29;
-	__u32 dw30;
-	__u32 dw31;
-};
-
-struct hisi_sec_sqe_type2 {
-	__u32 nonce_len:4;
-	__u32 huk:1;
-	__u32 key_s:1;
-	__u32 ci_gen:2;
-	__u32 ai_gen:2;
-	__u32 a_pad:2;
-	__u32 c_s:2;
-	__u32 rsvd1:2;
-	__u32 rhf:1;
-	__u32 c_key_type:2;
-	__u32 a_key_type:2;
-	__u32 write_frame_len:3;
-	__u32 cal_iv_addr_en:1;
-	__u32 tls_up:1;
-	__u32 rsvd0:5;
-	__u32 inveld:1;
-	__u32 mac_len:5;
-	__u32 a_key_len:6;
-	__u32 a_alg:6;
-	__u32 rsvd3:15;
-	__u32 c_icv_len:6;
-	__u32 c_width:3;
-	__u32 c_key_len:3;
-	__u32 c_mode:4;
-	__u32 c_alg:4;
-	__u32 rsvd4:12;
-	__u32 a_len:24;
-	__u32 iv_offset_l:8;
-	__u32 c_len:24;
-	__u32 iv_offset_h:8;
-	__u32 auth_src_offset:16;
-	__u32 cipher_src_offset:16;
-	__u32 cs_ip_header_offset:16;
-	__u32 cs_udp_header_offset:16;
-	__u32 pass_word_len:16;
-	__u32 dk_len:16;
-	__u32 salt3:8;
-	__u32 salt2:8;
-	__u32 salt1:8;
-	__u32 salt0:8;
-	__u32 tag:16;
-	__u32 rsvd5:16;
-	__u32 c_pad_type:4;
-	__u32 c_pad_len:8;
-	__u32 c_pad_data_type:4;
-	__u32 c_pad_len_field:2;
-	__u32 rsvd6:14;
-	__u32 long_a_data_len_l;
-	__u32 long_a_data_len_h;
-	__u32 a_ivin_addr_l;
-	__u32 a_ivin_addr_h;
-	__u32 a_key_addr_l;
-	__u32 a_key_addr_h;
-	__u32 mac_addr_l;
-	__u32 mac_addr_h;
-	__u32 c_ivin_addr_l;
-	__u32 c_ivin_addr_h;
-	__u32 c_key_addr_l;
-	__u32 c_key_addr_h;
-	__u32 data_src_addr_l;
-	__u32 data_src_addr_h;
-	__u32 data_dst_addr_l;
-	__u32 data_dst_addr_h;
-	__u32 done:1;
-	__u32 icv:3;
-	__u32 rsvd11:3;
-	__u32 flag:4;
-	__u32 rsvd10:5;
-	__u32 error_type:8;
-	__u32 warning_type:8;
-	__u32 mac_i3:8;
-	__u32 mac_i2:8;
-	__u32 mac_i1:8;
-	__u32 mac_i0:8;
-	__u32 check_sum_i:16;
-	__u32 tls_pad_len_i:8;
-	__u32 rsvd12:8;
-	__u32 counter;
-};
-
-struct hisi_sec_sqe {
-	__u32 type:4;
-	__u32 cipher:2;
-	__u32 auth:2;
-	__u32 seq:1;
-	__u32 de:2;
-	__u32 scene:4;
-	__u32 src_addr_type:3;
-	__u32 dst_addr_type:3;
-	__u32 mac_addr_type:3;
-	__u32 rsvd0:8;
-	union {
-		struct hisi_sec_sqe_type1 type1;
-		struct hisi_sec_sqe_type2 type2;
-	};
-};
-
-#endif