diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index b7b626195edad5c3fb6bb8e1598ce2ad2f4a45e5..4f244019560d28fb833035ecc77f11aa33acb2dc 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -968,6 +968,7 @@ static bool ring_is_idle(struct intel_engine_cs *engine)
 {
 	struct drm_i915_private *dev_priv = engine->i915;
 	intel_wakeref_t wakeref;
+	unsigned long flags;
 	bool idle = true;
 
 	if (I915_SELFTEST_ONLY(!engine->mmio_base))
@@ -978,15 +979,19 @@ static bool ring_is_idle(struct intel_engine_cs *engine)
 	if (!wakeref)
 		return true;
 
-	/* First check that no commands are left in the ring */
-	if ((I915_READ_HEAD(engine) & HEAD_ADDR) !=
-	    (I915_READ_TAIL(engine) & TAIL_ADDR))
-		idle = false;
+	spin_lock_irqsave(&dev_priv->uncore.lock, flags);
 
-	/* No bit for gen2, so assume the CS parser is idle */
-	if (INTEL_GEN(dev_priv) > 2 && !(I915_READ_MODE(engine) & MODE_IDLE))
+	/*
+	 * Check that no commands are left in the ring.
+	 *
+	 * If the engine is not awake, both reads return 0 as we do so without
+	 * forcewake.
+	 */
+	if ((I915_READ_FW(RING_HEAD(engine->mmio_base)) & HEAD_ADDR) !=
+	    (I915_READ_FW(RING_TAIL(engine->mmio_base)) & TAIL_ADDR))
 		idle = false;
 
+	spin_unlock_irqrestore(&dev_priv->uncore.lock, flags);
 	intel_runtime_pm_put(dev_priv, wakeref);
 
 	return idle;