From 0b1f40437abfc0b2c61061e07cda5c914ecb55af Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Wed, 14 Jul 2021 10:14:56 +0800 Subject: [PATCH] irqchip/gic-v3-its: Add a cache invalidation right after vPE unmapping virt inclusion category: feature bugzilla: https://gitee.com/openeuler/kernel/issues/I3ZSU3 CVE: NA --------------------------- In order to be able to manipulate the VPT once a vPE has been unmapped, perform the required CMO to invalidate the CPU view of the VPT. Signed-off-by: Marc Zyngier Signed-off-by: Shenming Lu Link: https://lore.kernel.org/r/20210322060158.1584-2-lushenming@huawei.com Reviewed-by: Keqian Zhu Signed-off-by: Zheng Zengkai --- drivers/irqchip/irq-gic-v3-its.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 485c49b31ca1..8c248687f4b4 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -4551,6 +4551,15 @@ static void its_vpe_irq_domain_deactivate(struct irq_domain *domain, its_send_vmapp(its, vpe, false); } + + /* + * There may be a direct read to the VPT after unmapping the + * vPE, to guarantee the validity of this, we make the VPT + * memory coherent with the CPU caches here. + */ + if (find_4_1_its() && !atomic_read(&vpe->vmapp_count)) + gic_flush_dcache_to_poc(page_address(vpe->vpt_page), + LPI_PENDBASE_SZ); } static const struct irq_domain_ops its_vpe_domain_ops = { -- GitLab