提交 0a3f3a19 编写于 作者: E Ezequiel Garcia 提交者: Brian Norris

mtd: nand: pxa3xx: Replace host->page_size by mtd->writesize

There's no need to privately store the device page size as it's
available in mtd structure field mtd->writesize.
Also, this removes the hardcoded page size value, leaving the
auto-detected value only.
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
上级 2128b08c
...@@ -151,7 +151,6 @@ struct pxa3xx_nand_host { ...@@ -151,7 +151,6 @@ struct pxa3xx_nand_host {
void *info_data; void *info_data;
/* page size of attached chip */ /* page size of attached chip */
unsigned int page_size;
int use_ecc; int use_ecc;
int cs; int cs;
...@@ -610,12 +609,12 @@ static int prepare_command_pool(struct pxa3xx_nand_info *info, int command, ...@@ -610,12 +609,12 @@ static int prepare_command_pool(struct pxa3xx_nand_info *info, int command,
info->buf_start += mtd->writesize; info->buf_start += mtd->writesize;
/* Second command setting for large pages */ /* Second command setting for large pages */
if (host->page_size >= PAGE_CHUNK_SIZE) if (mtd->writesize >= PAGE_CHUNK_SIZE)
info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8); info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8);
case NAND_CMD_SEQIN: case NAND_CMD_SEQIN:
/* small page addr setting */ /* small page addr setting */
if (unlikely(host->page_size < PAGE_CHUNK_SIZE)) { if (unlikely(mtd->writesize < PAGE_CHUNK_SIZE)) {
info->ndcb1 = ((page_addr & 0xFFFFFF) << 8) info->ndcb1 = ((page_addr & 0xFFFFFF) << 8)
| (column & 0xFF); | (column & 0xFF);
...@@ -891,7 +890,6 @@ static int pxa3xx_nand_config_flash(struct pxa3xx_nand_info *info, ...@@ -891,7 +890,6 @@ static int pxa3xx_nand_config_flash(struct pxa3xx_nand_info *info,
} }
/* calculate flash information */ /* calculate flash information */
host->page_size = f->page_size;
host->read_id_bytes = (f->page_size == 2048) ? 4 : 2; host->read_id_bytes = (f->page_size == 2048) ? 4 : 2;
/* calculate addressing information */ /* calculate addressing information */
...@@ -930,11 +928,9 @@ static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info) ...@@ -930,11 +928,9 @@ static int pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info)
if (ndcr & NDCR_PAGE_SZ) { if (ndcr & NDCR_PAGE_SZ) {
/* Controller's FIFO size */ /* Controller's FIFO size */
info->fifo_size = 2048; info->fifo_size = 2048;
host->page_size = 2048;
host->read_id_bytes = 4; host->read_id_bytes = 4;
} else { } else {
info->fifo_size = 512; info->fifo_size = 512;
host->page_size = 512;
host->read_id_bytes = 2; host->read_id_bytes = 2;
} }
...@@ -1102,7 +1098,7 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd) ...@@ -1102,7 +1098,7 @@ static int pxa3xx_nand_scan(struct mtd_info *mtd)
def = pxa3xx_flash_ids; def = pxa3xx_flash_ids;
KEEP_CONFIG: KEEP_CONFIG:
chip->ecc.mode = NAND_ECC_HW; chip->ecc.mode = NAND_ECC_HW;
chip->ecc.size = host->page_size; chip->ecc.size = info->fifo_size;
chip->ecc.strength = 1; chip->ecc.strength = 1;
if (info->reg_ndcr & NDCR_DWIDTH_M) if (info->reg_ndcr & NDCR_DWIDTH_M)
......
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