diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c index 83c34747087bde8ed0a328ddaaa2db4032bbb049..5783c282ae7b3e3288160a1cab22bf4db71d8172 100644 --- a/arch/arm/mach-at91rm9200/gpio.c +++ b/arch/arm/mach-at91rm9200/gpio.c @@ -10,12 +10,13 @@ */ #include +#include +#include #include #include #include #include -#include #include #include @@ -340,7 +341,7 @@ static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs void __iomem *pio; u32 isr; - pio = desc->base; + pio = get_irq_chip_data(irq); /* temporarily mask (level sensitive) parent IRQ */ desc->chip->ack(irq); @@ -350,12 +351,12 @@ static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs if (!isr) break; - pin = (unsigned) desc->data; + pin = (unsigned) get_irq_data(irq); gpio = &irq_desc[pin]; while (isr) { if (isr & 1) { - if (unlikely(gpio->disable_depth)) { + if (unlikely(gpio->depth)) { /* * The core ARM interrupt handler lazily disables IRQs so * another IRQ must be generated before it actually gets @@ -364,7 +365,7 @@ static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs gpio_irq_mask(pin); } else - gpio->handle(pin, gpio, regs); + desc_handle_irq(pin, gpio, regs); } pin++; gpio++; diff --git a/arch/arm/mach-at91rm9200/time.c b/arch/arm/mach-at91rm9200/time.c index f2f080350ccb6d45a7db45dcda1d19e0c64121fc..1f080e6ea509ed9492b46f459e606c87f1fabb69 100644 --- a/arch/arm/mach-at91rm9200/time.c +++ b/arch/arm/mach-at91rm9200/time.c @@ -21,13 +21,13 @@ #include #include +#include #include #include #include #include #include -#include #include static unsigned long last_crtr;