ARM: CSR: Adding CSR SiRFprimaII board support
SiRFprimaII is the latest generation application processor from CSR’s Multifunction SoC product family. Designed around an ARM cortex A9 core, high-speed memory bus, advanced 3D accelerator and full-HD multi-format video decoder, SiRFprimaII is able to meet the needs of complicated applications for modern multifunction devices that require heavy concurrent applications and fluid user experience. Integrated with GPS baseband, analog and PMU, this new platform is designed to provide a cost effective solution for Automotive and Consumer markets. This patch adds the basic support for this SoC and EVB board based on device tree. It is following the ZYNQ of Xilinx in some degree. Signed-off-by: NBinghua Duan <Binghua.Duan@csr.com> Signed-off-by: NRongjun Ying <Rongjun.Ying@csr.com> Signed-off-by: NZhiwu Song <Zhiwu.Song@csr.com> Signed-off-by: NYuping Luo <Yuping.Luo@csr.com> Signed-off-by: NBin Shi <Bin.Shi@csr.com> Signed-off-by: NHuayi Li <Huayi.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Reviewed-by: NArnd Bergmann <arnd@arndb.de>
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arch/arm/boot/dts/prima2-cb.dts
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arch/arm/mach-prima2/Makefile
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arch/arm/mach-prima2/clock.c
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arch/arm/mach-prima2/common.h
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arch/arm/mach-prima2/irq.c
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arch/arm/mach-prima2/prima2.c
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arch/arm/mach-prima2/rstc.c
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arch/arm/mach-prima2/timer.c
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