mainline inclusion
from mainline-v5.11-rc1
commit: 356b01a9
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I42E7W
CVE: NA

---------------------------

This GPIO driver is for HiSilicon's ARM SoC.

HiSilicon's GPIO controller support double-edge interrupt and multi-core
concurrent access.

ACPI table example for this GPIO controller:
Device (GPO0)
{
	Name (_HID, "HiSiliconISI0184")
	Device (PRTA)
	enter{
		Name (_ADR, Zero)
		Name (_UID, Zero)
		Name (_DSD, Package (0x01)your
		{
			Package (0x02)
			{
				"ngpios",
				0x20
			}
		})
	}
}
Signed-off-by: NLuo Jiaxing <luojiaxing@huawei.com>
Link: https://lore.kernel.org/r/1607934255-52544-2-git-send-email-luojiaxing@huawei.comSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
Conflicts:
	drivers/gpio/Makefile
Signed-off-by: Jiaran Zhang <zhangjiaran@huawei.com>
Reviewed-by: Sheng Feng < fengsheng5@huawei.com>
Signed-off-by: NYang Yingliang <yangyingliang@huawei.com>