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    ARM: 6826/1: Merge v6 and v7 DEBUG_LL DCC support · dfad549d
    Stephen Boyd 提交于
    The inline assembly differences for v6 vs. v7 are purely
    optimizations. On a v7 processor, an mrc with the pc sets the
    condition codes to the 28-31 bits of the register being read. It
    just so happens that the TX/RX full bits the DCC support code is
    testing for are high enough in the register to be put into the
    condition codes. On a v6 processor, this "feature" isn't
    implemented and thus we have to do the usual read, mask, test
    operations to check for TX/RX full. Thus, we can drop the v7
    implementation and just use the v6 implementation for both.
    
    Cc: Tony Lindgren <tony@atomide.com>
    Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
    Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
    dfad549d
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