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    drm/i915: don't disable ERR_INT on the IRQ handler · 6ceeeec0
    Paulo Zanoni 提交于
    We currently disable the ERR_INT interrupts while running the IRQ
    handler because we fear that if we do an unclaimed register access
    from inside the IRQ handler we'll keep triggering the IRQ handler
    forever.
    
    The problem is that since we always disable the ERR_INT interrupts at
    the IRQ handler, when we get a FIFO underrun we'll always print both
    messages:
      - "uncleared fifo underrun on pipe A"
      - "Pipe A FIFO underrun"
    
    Because the "was_enabled" variable from
    ivybridge_set_fifo_underrun_reporting will always be false (since we
    disable ERR int at the IRQ handler!).
    
    Instead of actually fixing ivybridge_set_fifo_underrun_reporting,
    let's just remove the "disable ERR_INT during the IRQ handler" code.
    As far as we know we shouldn't really be triggering ERR_INT interrupts
    from the IRQ handler, so if we ever get stuck in the endless loop of
    interrupts we can git-bisect and revert (and we can even bisect and
    revert this patch in case I'm just wrong). As a bonus, our IRQ handler
    is now simpler and a few nanoseconds faster.
    Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
    Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
    Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
    6ceeeec0
i915_irq.c 92.4 KB