From ec1401b78a016ca49bd80503c91017fb52c0fff1 Mon Sep 17 00:00:00 2001
From: bdelsart <unknown>
Date: Wed, 14 Sep 2011 10:40:13 +0200
Subject: [PATCH] 7057978: improve robustness of c1 ARM back-end wrt non
 encodable constants Summary: ARM only, avoid assertion failures for huge
 constants generated by C1 shared code Reviewed-by: never, vladidan

---
 src/share/vm/c1/c1_LIR.cpp | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/share/vm/c1/c1_LIR.cpp b/src/share/vm/c1/c1_LIR.cpp
index f6e10ec6f..44f2b62a7 100644
--- a/src/share/vm/c1/c1_LIR.cpp
+++ b/src/share/vm/c1/c1_LIR.cpp
@@ -142,7 +142,8 @@ void LIR_Address::verify() const {
 #endif
 #ifdef ARM
   assert(disp() == 0 || index()->is_illegal(), "can't have both");
-  assert(-4096 < disp() && disp() < 4096, "architecture constraint");
+  // Note: offsets higher than 4096 must not be rejected here. They can
+  // be handled by the back-end or will be rejected if not.
 #endif
 #ifdef _LP64
   assert(base()->is_cpu_register(), "wrong base operand");
-- 
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