From e22f0d7675df3d8980e68958ad501ae758f68e6d Mon Sep 17 00:00:00 2001
From: vkempik <unknown>
Date: Fri, 21 Oct 2016 20:34:04 +0300
Subject: [PATCH] 8157184:
 java/lang/invoke/LFCaching/LFMultiThreadCachingTest.java failed with a fatal
 error Summary: Add missing cache_line_size > 0 checks. Reviewed-by: kvn

---
 src/cpu/sparc/vm/macroAssembler_sparc.cpp | 1 +
 src/cpu/sparc/vm/vm_version_sparc.cpp     | 4 ++--
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/cpu/sparc/vm/macroAssembler_sparc.cpp b/src/cpu/sparc/vm/macroAssembler_sparc.cpp
index d7396f68f..4dfc1dbba 100644
--- a/src/cpu/sparc/vm/macroAssembler_sparc.cpp
+++ b/src/cpu/sparc/vm/macroAssembler_sparc.cpp
@@ -4261,6 +4261,7 @@ void MacroAssembler::bis_zeroing(Register to, Register count, Register temp, Lab
   assert(UseBlockZeroing && VM_Version::has_block_zeroing(), "only works with BIS zeroing");
   Register end = count;
   int cache_line_size = VM_Version::prefetch_data_size();
+  assert(cache_line_size > 0, "cache line size should be known for this code");
   // Minimum count when BIS zeroing can be used since
   // it needs membar which is expensive.
   int block_zero_size  = MAX2(cache_line_size*3, (int)BlockZeroingLowLimit);
diff --git a/src/cpu/sparc/vm/vm_version_sparc.cpp b/src/cpu/sparc/vm/vm_version_sparc.cpp
index 72e98c6c2..b14a6e993 100644
--- a/src/cpu/sparc/vm/vm_version_sparc.cpp
+++ b/src/cpu/sparc/vm/vm_version_sparc.cpp
@@ -74,7 +74,7 @@ void VM_Version::initialize() {
     AllocatePrefetchDistance = AllocatePrefetchStepSize;
   }
 
-  if (AllocatePrefetchStyle == 3 && !has_blk_init()) {
+  if (AllocatePrefetchStyle == 3 && (!has_blk_init() || cache_line_size <= 0)) {
     warning("BIS instructions are not available on this CPU");
     FLAG_SET_DEFAULT(AllocatePrefetchStyle, 1);
   }
@@ -138,7 +138,7 @@ void VM_Version::initialize() {
       FLAG_SET_DEFAULT(InteriorEntryAlignment, 4);
     }
     if (is_niagara_plus()) {
-      if (has_blk_init() && UseTLAB &&
+      if (has_blk_init() && (cache_line_size > 0) && UseTLAB &&
           FLAG_IS_DEFAULT(AllocatePrefetchInstr)) {
         // Use BIS instruction for TLAB allocation prefetch.
         FLAG_SET_ERGO(intx, AllocatePrefetchInstr, 1);
-- 
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