提交 cfb3122a 编写于 作者: N never

6972540: sun/nio/ch/SocketChannelImpl compilation crashed when executing CompileTheWorld

Reviewed-by: kvn
上级 fcdfd13d
...@@ -211,6 +211,7 @@ void LIR_OprDesc::validate_type() const { ...@@ -211,6 +211,7 @@ void LIR_OprDesc::validate_type() const {
case T_BYTE: case T_BYTE:
case T_SHORT: case T_SHORT:
case T_INT: case T_INT:
case T_ADDRESS:
case T_OBJECT: case T_OBJECT:
case T_ARRAY: case T_ARRAY:
assert((kind_field() == cpu_register || kind_field() == stack_value) && assert((kind_field() == cpu_register || kind_field() == stack_value) &&
......
...@@ -280,7 +280,7 @@ class LIR_OprDesc: public CompilationResourceObj { ...@@ -280,7 +280,7 @@ class LIR_OprDesc: public CompilationResourceObj {
, int_type = 1 << type_shift , int_type = 1 << type_shift
, long_type = 2 << type_shift , long_type = 2 << type_shift
, object_type = 3 << type_shift , object_type = 3 << type_shift
, pointer_type = 4 << type_shift , address_type = 4 << type_shift
, float_type = 5 << type_shift , float_type = 5 << type_shift
, double_type = 6 << type_shift , double_type = 6 << type_shift
}; };
...@@ -303,6 +303,7 @@ class LIR_OprDesc: public CompilationResourceObj { ...@@ -303,6 +303,7 @@ class LIR_OprDesc: public CompilationResourceObj {
case T_BYTE: case T_BYTE:
case T_SHORT: case T_SHORT:
case T_INT: case T_INT:
case T_ADDRESS:
case T_OBJECT: case T_OBJECT:
case T_ARRAY: case T_ARRAY:
return single_size; return single_size;
...@@ -456,6 +457,7 @@ inline LIR_OprDesc::OprType as_OprType(BasicType type) { ...@@ -456,6 +457,7 @@ inline LIR_OprDesc::OprType as_OprType(BasicType type) {
case T_DOUBLE: return LIR_OprDesc::double_type; case T_DOUBLE: return LIR_OprDesc::double_type;
case T_OBJECT: case T_OBJECT:
case T_ARRAY: return LIR_OprDesc::object_type; case T_ARRAY: return LIR_OprDesc::object_type;
case T_ADDRESS: return LIR_OprDesc::address_type;
case T_ILLEGAL: // fall through case T_ILLEGAL: // fall through
default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type; default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;
} }
...@@ -468,6 +470,7 @@ inline BasicType as_BasicType(LIR_OprDesc::OprType t) { ...@@ -468,6 +470,7 @@ inline BasicType as_BasicType(LIR_OprDesc::OprType t) {
case LIR_OprDesc::float_type: return T_FLOAT; case LIR_OprDesc::float_type: return T_FLOAT;
case LIR_OprDesc::double_type: return T_DOUBLE; case LIR_OprDesc::double_type: return T_DOUBLE;
case LIR_OprDesc::object_type: return T_OBJECT; case LIR_OprDesc::object_type: return T_OBJECT;
case LIR_OprDesc::address_type: return T_ADDRESS;
case LIR_OprDesc::unknown_type: // fall through case LIR_OprDesc::unknown_type: // fall through
default: ShouldNotReachHere(); return T_ILLEGAL; default: ShouldNotReachHere(); return T_ILLEGAL;
} }
...@@ -550,8 +553,24 @@ class LIR_OprFact: public AllStatic { ...@@ -550,8 +553,24 @@ class LIR_OprFact: public AllStatic {
static LIR_Opr illegalOpr; static LIR_Opr illegalOpr;
static LIR_Opr single_cpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::int_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); } static LIR_Opr single_cpu(int reg) {
static LIR_Opr single_cpu_oop(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::object_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); } return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
LIR_OprDesc::int_type |
LIR_OprDesc::cpu_register |
LIR_OprDesc::single_size);
}
static LIR_Opr single_cpu_oop(int reg) {
return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
LIR_OprDesc::object_type |
LIR_OprDesc::cpu_register |
LIR_OprDesc::single_size);
}
static LIR_Opr single_cpu_address(int reg) {
return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
LIR_OprDesc::address_type |
LIR_OprDesc::cpu_register |
LIR_OprDesc::single_size);
}
static LIR_Opr double_cpu(int reg1, int reg2) { static LIR_Opr double_cpu(int reg1, int reg2) {
LP64_ONLY(assert(reg1 == reg2, "must be identical")); LP64_ONLY(assert(reg1 == reg2, "must be identical"));
return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
...@@ -633,6 +652,14 @@ class LIR_OprFact: public AllStatic { ...@@ -633,6 +652,14 @@ class LIR_OprFact: public AllStatic {
LIR_OprDesc::virtual_mask); LIR_OprDesc::virtual_mask);
break; break;
case T_ADDRESS:
res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
LIR_OprDesc::address_type |
LIR_OprDesc::cpu_register |
LIR_OprDesc::single_size |
LIR_OprDesc::virtual_mask);
break;
case T_LONG: case T_LONG:
res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
LIR_OprDesc::long_type | LIR_OprDesc::long_type |
...@@ -721,6 +748,13 @@ class LIR_OprFact: public AllStatic { ...@@ -721,6 +748,13 @@ class LIR_OprFact: public AllStatic {
LIR_OprDesc::single_size); LIR_OprDesc::single_size);
break; break;
case T_ADDRESS:
res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
LIR_OprDesc::address_type |
LIR_OprDesc::stack_value |
LIR_OprDesc::single_size);
break;
case T_LONG: case T_LONG:
res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
LIR_OprDesc::long_type | LIR_OprDesc::long_type |
......
...@@ -936,7 +936,6 @@ LIR_Opr LIRGenerator::new_register(BasicType type) { ...@@ -936,7 +936,6 @@ LIR_Opr LIRGenerator::new_register(BasicType type) {
} }
} }
_virtual_register_number += 1; _virtual_register_number += 1;
if (type == T_ADDRESS) type = T_INT;
return LIR_OprFact::virtual_register(vreg, type); return LIR_OprFact::virtual_register(vreg, type);
} }
...@@ -2829,4 +2828,3 @@ LIR_Opr LIRGenerator::call_runtime(BasicTypeArray* signature, LIRItemList* args, ...@@ -2829,4 +2828,3 @@ LIR_Opr LIRGenerator::call_runtime(BasicTypeArray* signature, LIRItemList* args,
} }
return result; return result;
} }
...@@ -2018,6 +2018,12 @@ LIR_Opr LinearScan::calc_operand_for_interval(const Interval* interval) { ...@@ -2018,6 +2018,12 @@ LIR_Opr LinearScan::calc_operand_for_interval(const Interval* interval) {
return LIR_OprFact::single_cpu_oop(assigned_reg); return LIR_OprFact::single_cpu_oop(assigned_reg);
} }
case T_ADDRESS: {
assert(assigned_reg >= pd_first_cpu_reg && assigned_reg <= pd_last_cpu_reg, "no cpu register");
assert(interval->assigned_regHi() == any_reg, "must not have hi register");
return LIR_OprFact::single_cpu_address(assigned_reg);
}
#ifdef __SOFTFP__ #ifdef __SOFTFP__
case T_FLOAT: // fall through case T_FLOAT: // fall through
#endif // __SOFTFP__ #endif // __SOFTFP__
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册