From 94aff6a87354a2a56188c13162d90ced3cb10082 Mon Sep 17 00:00:00 2001 From: mdoerr Date: Thu, 12 Oct 2017 16:36:12 +0100 Subject: [PATCH] 8181810: PPC64: Leverage extrdi for bitfield extract Reviewed-by: mdoerr, simonis Contributed-by: Matthew Brandyberry --- src/cpu/ppc/vm/ppc.ad | 40 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 39 insertions(+), 1 deletion(-) diff --git a/src/cpu/ppc/vm/ppc.ad b/src/cpu/ppc/vm/ppc.ad index 5d1df9754..76794c2e6 100644 --- a/src/cpu/ppc/vm/ppc.ad +++ b/src/cpu/ppc/vm/ppc.ad @@ -1,6 +1,6 @@ // // Copyright (c) 2011, 2014, Oracle and/or its affiliates. All rights reserved. -// Copyright 2012, 2014 SAP AG. All rights reserved. +// Copyright (c) 2012, 2017 SAP SE. All rights reserved. // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. // // This code is free software; you can redistribute it and/or modify it @@ -8610,6 +8610,44 @@ instruct shrP_convP2X_reg_imm6(iRegLdst dst, iRegP_N2P src1, uimmI6 src2) %{ ins_pipe(pipe_class_default); %} +// Bitfield Extract: URShiftI + AndI +instruct andI_urShiftI_regI_immI_immIpow2minus1(iRegIdst dst, iRegIsrc src1, immI src2, immIpow2minus1 src3) %{ + match(Set dst (AndI (URShiftI src1 src2) src3)); + + format %{ "EXTRDI $dst, $src1, shift=$src2, mask=$src3 \t// int bitfield extract" %} + size(4); + ins_encode %{ + // TODO: PPC port $archOpcode(ppc64Opcode_rldicl); + int rshift = ($src2$$constant) & 0x1f; + int length = log2_long(((jlong) $src3$$constant) + 1); + if (rshift + length > 32) { + // if necessary, adjust mask to omit rotated bits. + length = 32 - rshift; + } + __ extrdi($dst$$Register, $src1$$Register, length, 64 - (rshift + length)); + %} + ins_pipe(pipe_class_default); +%} + +// Bitfield Extract: URShiftL + AndL +instruct andL_urShiftL_regL_immI_immLpow2minus1(iRegLdst dst, iRegLsrc src1, immI src2, immLpow2minus1 src3) %{ + match(Set dst (AndL (URShiftL src1 src2) src3)); + + format %{ "EXTRDI $dst, $src1, shift=$src2, mask=$src3 \t// long bitfield extract" %} + size(4); + ins_encode %{ + // TODO: PPC port $archOpcode(ppc64Opcode_rldicl); + int rshift = ($src2$$constant) & 0x3f; + int length = log2_long(((jlong) $src3$$constant) + 1); + if (rshift + length > 64) { + // if necessary, adjust mask to omit rotated bits. + length = 64 - rshift; + } + __ extrdi($dst$$Register, $src1$$Register, length, 64 - (rshift + length)); + %} + ins_pipe(pipe_class_default); +%} + instruct sxtI_reg(iRegIdst dst, iRegIsrc src) %{ match(Set dst (ConvL2I (ConvI2L src))); -- GitLab