From 724c9a37171c6980c1f0a0e1af1994a9d9e9b6d5 Mon Sep 17 00:00:00 2001 From: zmajo Date: Fri, 30 Jan 2015 10:40:08 +0100 Subject: [PATCH] 8071818: Incorrect addressing mode used for ldf in SPARC assembler Summary: Update MacroAssembler::ldf to select addressing mode depending on Address parameter. Reviewed-by: kvn, dlong --- src/cpu/sparc/vm/macroAssembler_sparc.inline.hpp | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/cpu/sparc/vm/macroAssembler_sparc.inline.hpp b/src/cpu/sparc/vm/macroAssembler_sparc.inline.hpp index 7e3804fd3..3518d0b63 100644 --- a/src/cpu/sparc/vm/macroAssembler_sparc.inline.hpp +++ b/src/cpu/sparc/vm/macroAssembler_sparc.inline.hpp @@ -630,7 +630,12 @@ inline void MacroAssembler::ldf(FloatRegisterImpl::Width w, Register s1, Registe inline void MacroAssembler::ldf(FloatRegisterImpl::Width w, const Address& a, FloatRegister d, int offset) { relocate(a.rspec(offset)); - ldf(w, a.base(), a.disp() + offset, d); + if (a.has_index()) { + assert(offset == 0, ""); + ldf(w, a.base(), a.index(), d); + } else { + ldf(w, a.base(), a.disp() + offset, d); + } } // returns if membar generates anything, obviously this code should mirror -- GitLab