提交 7058b100 编写于 作者: A andrew

Merge

...@@ -2100,6 +2100,7 @@ class Assembler : public AbstractAssembler { ...@@ -2100,6 +2100,7 @@ class Assembler : public AbstractAssembler {
// Endianess specific concatenation of 2 loaded vectors. // Endianess specific concatenation of 2 loaded vectors.
inline void load_perm(VectorRegister perm, Register addr); inline void load_perm(VectorRegister perm, Register addr);
inline void vec_perm(VectorRegister first_dest, VectorRegister second, VectorRegister perm); inline void vec_perm(VectorRegister first_dest, VectorRegister second, VectorRegister perm);
inline void vec_perm(VectorRegister dest, VectorRegister first, VectorRegister second, VectorRegister perm);
// RegisterOrConstant versions. // RegisterOrConstant versions.
// These emitters choose between the versions using two registers and // These emitters choose between the versions using two registers and
......
...@@ -904,6 +904,14 @@ inline void Assembler::vec_perm(VectorRegister first_dest, VectorRegister second ...@@ -904,6 +904,14 @@ inline void Assembler::vec_perm(VectorRegister first_dest, VectorRegister second
#endif #endif
} }
inline void Assembler::vec_perm(VectorRegister dest, VectorRegister first, VectorRegister second, VectorRegister perm) {
#if defined(VM_LITTLE_ENDIAN)
vperm(dest, second, first, perm);
#else
vperm(dest, first, second, perm);
#endif
}
inline void Assembler::load_const(Register d, void* x, Register tmp) { inline void Assembler::load_const(Register d, void* x, Register tmp) {
load_const(d, (long)x, tmp); load_const(d, (long)x, tmp);
} }
......
...@@ -34,7 +34,7 @@ static bool returns_to_call_stub(address return_pc) { return return_pc == _call_ ...@@ -34,7 +34,7 @@ static bool returns_to_call_stub(address return_pc) { return return_pc == _call_
enum platform_dependent_constants { enum platform_dependent_constants {
code_size1 = 20000, // simply increase if too small (assembler will crash if too small) code_size1 = 20000, // simply increase if too small (assembler will crash if too small)
code_size2 = 22000 // simply increase if too small (assembler will crash if too small) code_size2 = 24000 // simply increase if too small (assembler will crash if too small)
}; };
// CRC32 Intrinsics. // CRC32 Intrinsics.
......
...@@ -174,7 +174,6 @@ void VM_Version::initialize() { ...@@ -174,7 +174,6 @@ void VM_Version::initialize() {
} }
// The AES intrinsic stubs require AES instruction support. // The AES intrinsic stubs require AES instruction support.
#if defined(VM_LITTLE_ENDIAN)
if (has_vcipher()) { if (has_vcipher()) {
if (FLAG_IS_DEFAULT(UseAES)) { if (FLAG_IS_DEFAULT(UseAES)) {
UseAES = true; UseAES = true;
...@@ -195,18 +194,6 @@ void VM_Version::initialize() { ...@@ -195,18 +194,6 @@ void VM_Version::initialize() {
FLAG_SET_DEFAULT(UseAESIntrinsics, false); FLAG_SET_DEFAULT(UseAESIntrinsics, false);
} }
#else
if (UseAES) {
warning("AES instructions are not available on this CPU");
FLAG_SET_DEFAULT(UseAES, false);
}
if (UseAESIntrinsics) {
if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
warning("AES intrinsics are not available on this CPU");
FLAG_SET_DEFAULT(UseAESIntrinsics, false);
}
#endif
if (has_vshasig()) { if (has_vshasig()) {
if (FLAG_IS_DEFAULT(UseSHA)) { if (FLAG_IS_DEFAULT(UseSHA)) {
UseSHA = true; UseSHA = true;
......
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