提交 3d1ac97e 编写于 作者: K kevinw

8160748: Inconsistent types for ideal_reg

Summary: Made ideal_reg consistently uint.
Reviewed-by: kvn, iveresov
上级 4a9ccec2
//
// Copyright (c) 2011, 2014, Oracle and/or its affiliates. All rights reserved.
// Copyright (c) 2011, 2018, Oracle and/or its affiliates. All rights reserved.
// Copyright (c) 2012, 2017 SAP SE. All rights reserved.
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
//
......@@ -2174,12 +2174,12 @@ const int Matcher::vector_width_in_bytes(BasicType bt) {
}
// Vector ideal reg.
const int Matcher::vector_ideal_reg(int size) {
const uint Matcher::vector_ideal_reg(int size) {
assert(MaxVectorSize == 8 && size == 8, "");
return Op_RegL;
}
const int Matcher::vector_shift_count_ideal_reg(int size) {
const uint Matcher::vector_shift_count_ideal_reg(int size) {
fatal("vector shift is not supported");
return Node::NotAMachineReg;
}
......
//
// Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved.
// Copyright (c) 1998, 2018, Oracle and/or its affiliates. All rights reserved.
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
//
// This code is free software; you can redistribute it and/or modify it
......@@ -1877,12 +1877,12 @@ const int Matcher::vector_width_in_bytes(BasicType bt) {
}
// Vector ideal reg
const int Matcher::vector_ideal_reg(int size) {
const uint Matcher::vector_ideal_reg(int size) {
assert(MaxVectorSize == 8, "");
return Op_RegD;
}
const int Matcher::vector_shift_count_ideal_reg(int size) {
const uint Matcher::vector_shift_count_ideal_reg(int size) {
fatal("vector shift is not supported");
return Node::NotAMachineReg;
}
......
//
// Copyright (c) 2011, 2012, Oracle and/or its affiliates. All rights reserved.
// Copyright (c) 2011, 2018, Oracle and/or its affiliates. All rights reserved.
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
//
// This code is free software; you can redistribute it and/or modify it
......@@ -683,7 +683,7 @@ const int Matcher::min_vector_size(const BasicType bt) {
}
// Vector ideal reg corresponding to specidied size in bytes
const int Matcher::vector_ideal_reg(int size) {
const uint Matcher::vector_ideal_reg(int size) {
assert(MaxVectorSize >= size, "");
switch(size) {
case 4: return Op_VecS;
......@@ -696,7 +696,7 @@ const int Matcher::vector_ideal_reg(int size) {
}
// Only lowest bits of xmm reg are used for vector shift count.
const int Matcher::vector_shift_count_ideal_reg(int size) {
const uint Matcher::vector_shift_count_ideal_reg(int size) {
return Op_VecS;
}
......
/*
* Copyright (c) 1998, 2013, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1998, 2018, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
......@@ -4177,11 +4177,11 @@ void ArchDesc::buildFrameMethods(FILE *fp_cpp) {
fprintf(fp_cpp,"%s\n", _frame->_c_calling_convention);
fprintf(fp_cpp,"}\n\n");
// Java Return Value Location
fprintf(fp_cpp,"OptoRegPair Matcher::return_value(int ideal_reg, bool is_outgoing) {\n");
fprintf(fp_cpp,"OptoRegPair Matcher::return_value(uint ideal_reg, bool is_outgoing) {\n");
fprintf(fp_cpp,"%s\n", _frame->_return_value);
fprintf(fp_cpp,"}\n\n");
// Native Return Value Location
fprintf(fp_cpp,"OptoRegPair Matcher::c_return_value(int ideal_reg, bool is_outgoing) {\n");
fprintf(fp_cpp,"OptoRegPair Matcher::c_return_value(uint ideal_reg, bool is_outgoing) {\n");
fprintf(fp_cpp,"%s\n", _frame->_c_return_value);
fprintf(fp_cpp,"}\n\n");
......
/*
* Copyright (c) 2000, 2015, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
......@@ -755,7 +755,7 @@ void PhaseChaitin::gather_lrg_masks( bool after_aggressive ) {
const RegMask &rm = n->out_RegMask();
lrg.AND( rm );
int ireg = n->ideal_reg();
uint ireg = n->ideal_reg();
assert( !n->bottom_type()->isa_oop_ptr() || ireg == Op_RegP,
"oops must be in Op_RegP's" );
......@@ -961,7 +961,7 @@ void PhaseChaitin::gather_lrg_masks( bool after_aggressive ) {
// Check for bound register masks
const RegMask &lrgmask = lrg.mask();
int kreg = n->in(k)->ideal_reg();
uint kreg = n->in(k)->ideal_reg();
bool is_vect = RegMask::is_vector(kreg);
assert(n->in(k)->bottom_type()->isa_vect() == NULL ||
is_vect || kreg == Op_RegD || kreg == Op_RegL,
......
/*
* Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
......@@ -193,7 +193,7 @@ void Matcher::match( ) {
const TypeTuple *range = C->tf()->range();
if( range->cnt() > TypeFunc::Parms ) { // If not a void function
// Get ideal-register return type
int ireg = range->field_at(TypeFunc::Parms)->ideal_reg();
uint ireg = range->field_at(TypeFunc::Parms)->ideal_reg();
// Get machine return register
uint sop = C->start()->Opcode();
OptoRegPair regs = return_value(ireg, false);
......
/*
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
......@@ -283,8 +283,8 @@ public:
}
// Vector ideal reg
static const int vector_ideal_reg(int len);
static const int vector_shift_count_ideal_reg(int len);
static const uint vector_ideal_reg(int len);
static const uint vector_shift_count_ideal_reg(int len);
// CPU supports misaligned vectors store/load.
static const bool misaligned_vectors_ok();
......@@ -326,8 +326,8 @@ public:
virtual OptoReg::Name return_addr() const;
RegMask _return_addr_mask;
// Return value register. On Intel it is EAX. On Sparc i0/o0.
static OptoRegPair return_value(int ideal_reg, bool is_outgoing);
static OptoRegPair c_return_value(int ideal_reg, bool is_outgoing);
static OptoRegPair return_value(uint ideal_reg, bool is_outgoing);
static OptoRegPair c_return_value(uint ideal_reg, bool is_outgoing);
RegMask _return_value_mask;
// Inline Cache Register
static OptoReg::Name inline_cache_reg();
......
/*
* Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
......@@ -59,7 +59,7 @@ Node *PhaseChaitin::get_spillcopy_wide( Node *def, Node *use, uint uidx ) {
// If ideal reg doesn't exist we've got a bad schedule happening
// that is forcing us to spill something that isn't spillable.
// Bail rather than abort
int ireg = def->ideal_reg();
uint ireg = def->ideal_reg();
if( ireg == 0 || ireg == Op_RegFlags ) {
assert(false, "attempted to spill a non-spillable item");
C->record_method_not_compilable("attempted to spill a non-spillable item");
......@@ -1163,7 +1163,7 @@ uint PhaseChaitin::Split(uint maxlrg, ResourceArea* split_arena) {
// Grab UP info for DEF
const RegMask &dmask = n->out_RegMask();
bool defup = dmask.is_UP();
int ireg = n->ideal_reg();
uint ireg = n->ideal_reg();
bool is_vect = RegMask::is_vector(ireg);
// Only split at Def if this is a HRP block or bound (and spilled once)
if( !n->rematerialize() &&
......
/*
* Copyright (c) 1997, 2016, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2017, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
......@@ -51,7 +51,7 @@ PRAGMA_FORMAT_MUTE_WARNINGS_FOR_GCC
Dict* Type::_shared_type_dict = NULL;
// Array which maps compiler types to Basic Types
Type::TypeInfo Type::_type_info[Type::lastype] = {
const Type::TypeInfo Type::_type_info[Type::lastype] = {
{ Bad, T_ILLEGAL, "bad", false, Node::NotAMachineReg, relocInfo::none }, // Bad
{ Control, T_ILLEGAL, "control", false, 0, relocInfo::none }, // Control
{ Bottom, T_VOID, "top", false, 0, relocInfo::none }, // Top
......
/*
* Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
......@@ -130,17 +130,17 @@ public:
private:
typedef struct {
const TYPES dual_type;
const BasicType basic_type;
TYPES dual_type;
BasicType basic_type;
const char* msg;
const bool isa_oop;
const int ideal_reg;
const relocInfo::relocType reloc;
bool isa_oop;
uint ideal_reg;
relocInfo::relocType reloc;
} TypeInfo;
// Dictionary of types shared among compilations.
static Dict* _shared_type_dict;
static TypeInfo _type_info[];
static const TypeInfo _type_info[];
static int uhash( const Type *const t );
// Structural equality check. Assumes that cmp() has already compared
......@@ -407,7 +407,7 @@ public:
// Mapping from compiler type to VM BasicType
BasicType basic_type() const { return _type_info[_base].basic_type; }
int ideal_reg() const { return _type_info[_base].ideal_reg; }
uint ideal_reg() const { return _type_info[_base].ideal_reg; }
const char* msg() const { return _type_info[_base].msg; }
bool isa_oop_ptr() const { return _type_info[_base].isa_oop; }
relocInfo::relocType reloc() const { return _type_info[_base].reloc; }
......
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