Merge

.hgtags

@@ -412,6 +412,14 @@ c89630a122b43d0eabd78b74f6498a1c3cf04ca3 jdk8u20-b00
 c89630a122b43d0eabd78b74f6498a1c3cf04ca3 hs25.20-b00
 9b9816164447214f21b06ccf646893c281c76a42 hs25-b66
 df333ee12bba67e2e928f8ce1da37afd9bf95b48 jdk8-b124
+3585183c191aa6b4d0375ea659515335e1804417 hs25-b67
+df333ee12bba67e2e928f8ce1da37afd9bf95b48 jdk8-b125
+c8218f1072a0370f3ce4714469ced0613ee543ab jdk8-b126
+d45454002494d147c0761e6b37d8a73064f3cf92 hs25-b68
+32f017489ba5dd1bedabb9fa1d26bcc74d0a72b6 hs25-b69
+35038da7bb9ddd367a0a6bf926dfb281aee1d554 jdk8-b127
+874c0b4a946c362bbf20d37c2a564b39093152e6 jdk8-b128
+cb39165c4a65bbff8db356df411e762f9e5423b8 jdk8-b129
 412d3b5fe90e54c0ff9d9ac7374b98607c561d5a hs25.20-b01
 4638c4d7ff106db0f29ef7f18b128dd7e69bc470 hs25.20-b02
 e56d11f8cc2158d4280f80e56d196193349c150a hs25.20-b03

src/cpu/sparc/vm/sparc.ad

@@ -3355,8 +3355,8 @@ operand immI16() %{
   interface(CONST_INTER);
 %}
 
-// Unsigned (positive) Integer Immediate: 13-bit
-operand immU13() %{
+// Unsigned Integer Immediate: 12-bit (non-negative that fits in simm13)
+operand immU12() %{
   predicate((0 <= n->get_int()) && Assembler::is_simm13(n->get_int()));
   match(ConI);
   op_cost(0);
@@ -3392,6 +3392,17 @@ operand immI5() %{
   interface(CONST_INTER);
 %}
 
+// Int Immediate non-negative
+operand immU31()
+%{
+  predicate(n->get_int() >= 0);
+  match(ConI);
+
+  op_cost(0);
+  format %{ %}
+  interface(CONST_INTER);
+%}
+
 // Integer Immediate: 0-bit
 operand immI0() %{
   predicate(n->get_int() == 0);
@@ -5720,7 +5731,6 @@ instruct loadUS2L_immI16(iRegL dst, memory mem, immI16 mask, iRegL tmp) %{
   effect(TEMP dst, TEMP tmp);
   ins_cost(MEMORY_REF_COST + 2*DEFAULT_COST);
 
-  size((3+1)*4);  // set may use two instructions.
   format %{ "LDUH   $mem,$dst\t! ushort/char & 16-bit mask -> long\n\t"
             "SET    $mask,$tmp\n\t"
             "AND    $dst,$tmp,$dst" %}
@@ -5842,13 +5852,13 @@ instruct loadI2L_immI_65535(iRegL dst, indOffset13m7 mem, immI_65535 mask) %{
   ins_pipe(iload_mem);
 %}
 
-// Load Integer with a 13-bit mask into a Long Register
-instruct loadI2L_immI13(iRegL dst, memory mem, immI13 mask) %{
+// Load Integer with a 12-bit mask into a Long Register
+instruct loadI2L_immU12(iRegL dst, memory mem, immU12 mask) %{
   match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
   ins_cost(MEMORY_REF_COST + DEFAULT_COST);
 
   size(2*4);
-  format %{ "LDUW   $mem,$dst\t! int & 13-bit mask -> long\n\t"
+  format %{ "LDUW   $mem,$dst\t! int & 12-bit mask -> long\n\t"
             "AND    $dst,$mask,$dst" %}
   ins_encode %{
     Register Rdst = $dst$$Register;
@@ -5858,14 +5868,13 @@ instruct loadI2L_immI13(iRegL dst, memory mem, immI13 mask) %{
   ins_pipe(iload_mem);
 %}
 
-// Load Integer with a 32-bit mask into a Long Register
-instruct loadI2L_immI(iRegL dst, memory mem, immI mask, iRegL tmp) %{
+// Load Integer with a 31-bit mask into a Long Register
+instruct loadI2L_immU31(iRegL dst, memory mem, immU31 mask, iRegL tmp) %{
   match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
   effect(TEMP dst, TEMP tmp);
   ins_cost(MEMORY_REF_COST + 2*DEFAULT_COST);
 
-  size((3+1)*4);  // set may use two instructions.
-  format %{ "LDUW   $mem,$dst\t! int & 32-bit mask -> long\n\t"
+  format %{ "LDUW   $mem,$dst\t! int & 31-bit mask -> long\n\t"
             "SET    $mask,$tmp\n\t"
             "AND    $dst,$tmp,$dst" %}
   ins_encode %{
@@ -8960,7 +8969,7 @@ instruct testL_reg_con(flagsRegL xcc, iRegL op1, immL13 con, immL0 zero) %{
   ins_pipe(ialu_cconly_reg_reg);
 %}
 
-instruct compU_iReg_imm13(flagsRegU icc, iRegI op1, immU13 op2 ) %{
+instruct compU_iReg_imm13(flagsRegU icc, iRegI op1, immU12 op2 ) %{
   match(Set icc (CmpU op1 op2));
 
   size(4);

src/cpu/x86/vm/c1_LIRAssembler_x86.cpp

@@ -38,6 +38,7 @@
 #include "nativeInst_x86.hpp"
 #include "oops/objArrayKlass.hpp"
 #include "runtime/sharedRuntime.hpp"
+#include "vmreg_x86.inline.hpp"
 
 
 // These masks are used to provide 128-bit aligned bitmasks to the XMM
@@ -1006,6 +1007,9 @@ void LIR_Assembler::reg2mem(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_Patch
     if (UseCompressedOops && !wide) {
       __ movptr(compressed_src, src->as_register());
       __ encode_heap_oop(compressed_src);
+      if (patch_code != lir_patch_none) {
+        info->oop_map()->set_narrowoop(compressed_src->as_VMReg());
+      }
     }
 #endif
   }

src/cpu/x86/vm/c1_LIRGenerator_x86.cpp

@@ -941,6 +941,8 @@ void LIRGenerator::do_update_CRC32(Intrinsic* x) {
     case vmIntrinsics::_updateCRC32: {
       LIRItem crc(x->argument_at(0), this);
       LIRItem val(x->argument_at(1), this);
+      // val is destroyed by update_crc32
+      val.set_destroys_register();
       crc.load_item();
       val.load_item();
       __ update_crc32(crc.result(), val.result(), result);

src/cpu/x86/vm/x86_32.ad

@@ -3889,6 +3889,17 @@ operand immI16() %{
   interface(CONST_INTER);
 %}
 
+// Int Immediate non-negative
+operand immU31()
+%{
+  predicate(n->get_int() >= 0);
+  match(ConI);
+
+  op_cost(0);
+  format %{ %}
+  interface(CONST_INTER);
+%}
+
 // Constant for long shifts
 operand immI_32() %{
   predicate( n->get_int() == 32 );
@@ -6119,12 +6130,12 @@ instruct loadI2L_immI_65535(eRegL dst, memory mem, immI_65535 mask, eFlagsReg cr
   ins_pipe(ialu_reg_mem);
 %}
 
-// Load Integer with 32-bit mask into Long Register
-instruct loadI2L_immI(eRegL dst, memory mem, immI mask, eFlagsReg cr) %{
+// Load Integer with 31-bit mask into Long Register
+instruct loadI2L_immU31(eRegL dst, memory mem, immU31 mask, eFlagsReg cr) %{
   match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
   effect(KILL cr);
 
-  format %{ "MOV    $dst.lo,$mem\t# int & 32-bit mask -> long\n\t"
+  format %{ "MOV    $dst.lo,$mem\t# int & 31-bit mask -> long\n\t"
             "XOR    $dst.hi,$dst.hi\n\t"
             "AND    $dst.lo,$mask" %}
   ins_encode %{

src/cpu/x86/vm/x86_64.ad

@@ -3086,6 +3086,17 @@ operand immI16()
   interface(CONST_INTER);
 %}
 
+// Int Immediate non-negative
+operand immU31()
+%{
+  predicate(n->get_int() >= 0);
+  match(ConI);
+
+  op_cost(0);
+  format %{ %}
+  interface(CONST_INTER);
+%}
+
 // Constant for long shifts
 operand immI_32()
 %{
@@ -5042,12 +5053,12 @@ instruct loadI2L_immI_65535(rRegL dst, memory mem, immI_65535 mask) %{
   ins_pipe(ialu_reg_mem);
 %}
 
-// Load Integer with a 32-bit mask into Long Register
-instruct loadI2L_immI(rRegL dst, memory mem, immI mask, rFlagsReg cr) %{
+// Load Integer with a 31-bit mask into Long Register
+instruct loadI2L_immU31(rRegL dst, memory mem, immU31 mask, rFlagsReg cr) %{
   match(Set dst (ConvI2L (AndI (LoadI mem) mask)));
   effect(KILL cr);
 
-  format %{ "movl    $dst, $mem\t# int & 32-bit mask -> long\n\t"
+  format %{ "movl    $dst, $mem\t# int & 31-bit mask -> long\n\t"
             "andl    $dst, $mask" %}
   ins_encode %{
     Register Rdst = $dst$$Register;

src/share/vm/code/dependencies.cpp

@@ -1161,11 +1161,9 @@ bool Dependencies::is_concrete_method(Method* m) {
 
   // We could also return false if m does not yet appear to be
   // executed, if the VM version supports this distinction also.
+  // Default methods are considered "concrete" as well.
   return !m->is_abstract() &&
-         !InstanceKlass::cast(m->method_holder())->is_interface();
-         // TODO: investigate whether default methods should be
-         // considered as "concrete" in this situation.  For now they
-         // are not.
+         !m->is_overpass(); // error functions aren't concrete
 }
 
 

src/share/vm/opto/c2_globals.hpp

@@ -445,7 +445,7 @@
   notproduct(bool, PrintEliminateLocks, false,                              \
           "Print out when locks are eliminated")                            \
                                                                             \
-  product(bool, EliminateAutoBox, true,                                     \
+  product(bool, EliminateAutoBox, false,                                    \
           "Control optimizations for autobox elimination")                  \
                                                                             \
   experimental(bool, UseImplicitStableValues, false,                        \

test/compiler/codegen/LoadWithMask.java

+/*
+ * Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved.
+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 only, as
+ * published by the Free Software Foundation.
+ *
+ * This code is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * version 2 for more details (a copy is included in the LICENSE file that
+ * accompanied this code).
+ *
+ * You should have received a copy of the GNU General Public License version
+ * 2 along with this work; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
+ * or visit www.oracle.com if you need additional information or have any
+ * questions.
+ */
+
+/*
+ * @test
+ * @bug 8032207
+ * @summary Invalid node sizing for loadUS2L_immI16 and loadI2L_immI
+ * @run main/othervm -server -Xbatch -XX:-TieredCompilation -XX:CompileCommand=compileonly,LoadWithMask.foo LoadWithMask
+ *
+ */
+public class LoadWithMask {
+  static int x[] = new int[1];
+  static long foo() {
+    return x[0] & 0xfff0ffff;
+  }
+
+  public static void main(String[] args) {
+    x[0] = -1;
+    long l = 0;
+    for (int i = 0; i < 100000; ++i) {
+      l = foo();
+    }
+  }
+}

test/compiler/codegen/LoadWithMask2.java

+/*
+ * Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved.
+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 only, as
+ * published by the Free Software Foundation.
+ *
+ * This code is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * version 2 for more details (a copy is included in the LICENSE file that
+ * accompanied this code).
+ *
+ * You should have received a copy of the GNU General Public License version
+ * 2 along with this work; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
+ * or visit www.oracle.com if you need additional information or have any
+ * questions.
+ */
+
+/*
+ * @test
+ * @bug 8031743
+ * @summary loadI2L_immI broken for negative memory values
+ * @run main/othervm -server -Xbatch -XX:-TieredCompilation -XX:CompileCommand=compileonly,*.foo* LoadWithMask2
+ *
+ */
+public class LoadWithMask2 {
+  static int x;
+  static long foo1() {
+    return x & 0xfffffffe;
+  }
+  static long foo2() {
+    return x & 0xff000000;
+  }
+  static long foo3() {
+    return x & 0x8abcdef1;
+  }
+
+  public static void main(String[] args) {
+    x = -1;
+    long l = 0;
+    for (int i = 0; i < 100000; ++i) {
+      l = foo1() & foo2() & foo3();
+    }
+    if (l > 0) {
+      System.out.println("FAILED");
+      System.exit(97);
+    }
+    System.out.println("PASSED");
+  }
+}

test/compiler/inlining/DefaultAndConcreteMethodsCHA.java

+/*
+ * Copyright (c) 2014, Oracle and/or its affiliates. All rights reserved.
+ * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
+ *
+ * This code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 only, as
+ * published by the Free Software Foundation.
+ *
+ * This code is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ * version 2 for more details (a copy is included in the LICENSE file that
+ * accompanied this code).
+ *
+ * You should have received a copy of the GNU General Public License version
+ * 2 along with this work; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
+ * or visit www.oracle.com if you need additional information or have any
+ * questions.
+ */
+
+/**
+ * @test
+ * @bug 8031695
+ * @summary CHA ignores default methods during analysis leading to incorrect code generation
+ *
+ * @run main/othervm -Xbatch DefaultAndConcreteMethodsCHA
+ */
+interface I {
+    default int m() { return 0; }
+}
+
+class A implements I {}
+
+class C extends A { }
+class D extends A { public int m() { return 1; } }
+
+public class DefaultAndConcreteMethodsCHA {
+    public static int test(A obj) {
+        return obj.m();
+    }
+    public static void main(String[] args) {
+        for (int i = 0; i < 10000; i++) {
+            int idC = test(new C());
+            if (idC != 0) {
+                throw new Error("C.m didn't invoke I.m: id "+idC);
+            }
+
+            int idD = test(new D());
+            if (idD != 1) {
+                throw new Error("D.m didn't invoke D.m: id "+idD);
+            }
+        }
+
+    }
+}