From 032b930ba1f5b31d3d72c8b9632d97513f4b3d81 Mon Sep 17 00:00:00 2001 From: iveresov Date: Thu, 27 May 2010 22:01:55 -0700 Subject: [PATCH] 6955349: C1: Make G1 barriers work with x64 Summary: This fixes G1 barriers in c1 on x64. Reviewed-by: never --- src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp | 6 +-- src/cpu/x86/vm/c1_LIRAssembler_x86.cpp | 9 ++++ src/cpu/x86/vm/c1_LIRGenerator_x86.cpp | 4 +- src/cpu/x86/vm/c1_Runtime1_x86.cpp | 61 ++++++++++++++++++---- src/share/vm/c1/c1_LIR.hpp | 11 +++- src/share/vm/c1/c1_LIRGenerator.cpp | 11 ++-- 6 files changed, 78 insertions(+), 24 deletions(-) diff --git a/src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp b/src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp index 87b471243..43185ffe7 100644 --- a/src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp +++ b/src/cpu/sparc/vm/c1_LIRGenerator_sparc.cpp @@ -221,7 +221,7 @@ LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_o if (needs_card_mark) { LIR_Opr ptr = new_pointer_register(); __ add(base_opr, LIR_OprFact::intptrConst(offset), ptr); - return new LIR_Address(ptr, 0, type); + return new LIR_Address(ptr, type); } else { return new LIR_Address(base_opr, offset, type); } @@ -231,7 +231,7 @@ LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_o void LIRGenerator::increment_counter(address counter, int step) { LIR_Opr pointer = new_pointer_register(); __ move(LIR_OprFact::intptrConst(counter), pointer); - LIR_Address* addr = new LIR_Address(pointer, 0, T_INT); + LIR_Address* addr = new LIR_Address(pointer, T_INT); increment_counter(addr, step); } @@ -1159,7 +1159,7 @@ void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data, if (type == T_ARRAY || type == T_OBJECT) { LIR_Opr tmp = new_pointer_register(); __ add(base_op, index_op, tmp); - addr = new LIR_Address(tmp, 0, type); + addr = new LIR_Address(tmp, type); } else { addr = new LIR_Address(base_op, index_op, type); } diff --git a/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp b/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp index d532d264e..e49749328 100644 --- a/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp +++ b/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp @@ -2462,9 +2462,18 @@ void LIR_Assembler::logic_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr } #endif // _LP64 } else { +#ifdef _LP64 + Register r_lo; + if (right->type() == T_OBJECT || right->type() == T_ARRAY) { + r_lo = right->as_register(); + } else { + r_lo = right->as_register_lo(); + } +#else Register r_lo = right->as_register_lo(); Register r_hi = right->as_register_hi(); assert(l_lo != r_hi, "overwriting registers"); +#endif switch (code) { case lir_logic_and: __ andptr(l_lo, r_lo); diff --git a/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp b/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp index f98bfaa8e..7cd2fe5c3 100644 --- a/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp +++ b/src/cpu/x86/vm/c1_LIRGenerator_x86.cpp @@ -175,7 +175,7 @@ LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_o // store and again for the card mark. LIR_Opr tmp = new_pointer_register(); __ leal(LIR_OprFact::address(addr), tmp); - return new LIR_Address(tmp, 0, type); + return new LIR_Address(tmp, type); } else { return addr; } @@ -185,7 +185,7 @@ LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_o void LIRGenerator::increment_counter(address counter, int step) { LIR_Opr pointer = new_pointer_register(); __ move(LIR_OprFact::intptrConst(counter), pointer); - LIR_Address* addr = new LIR_Address(pointer, 0, T_INT); + LIR_Address* addr = new LIR_Address(pointer, T_INT); increment_counter(addr, step); } diff --git a/src/cpu/x86/vm/c1_Runtime1_x86.cpp b/src/cpu/x86/vm/c1_Runtime1_x86.cpp index 3ca8ef636..134409f60 100644 --- a/src/cpu/x86/vm/c1_Runtime1_x86.cpp +++ b/src/cpu/x86/vm/c1_Runtime1_x86.cpp @@ -1581,7 +1581,6 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) { __ should_not_reach_here(); break; } - __ push(rax); __ push(rdx); @@ -1605,8 +1604,8 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) { // Can we store original value in the thread's buffer? - LP64_ONLY(__ movslq(tmp, queue_index);) #ifdef _LP64 + __ movslq(tmp, queue_index); __ cmpq(tmp, 0); #else __ cmpl(queue_index, 0); @@ -1628,13 +1627,33 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) { __ jmp(done); __ bind(runtime); - // load the pre-value __ push(rcx); +#ifdef _LP64 + __ push(r8); + __ push(r9); + __ push(r10); + __ push(r11); +# ifndef _WIN64 + __ push(rdi); + __ push(rsi); +# endif +#endif + // load the pre-value f.load_argument(0, rcx); __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_pre), rcx, thread); +#ifdef _LP64 +# ifndef _WIN64 + __ pop(rsi); + __ pop(rdi); +# endif + __ pop(r11); + __ pop(r10); + __ pop(r9); + __ pop(r8); +#endif __ pop(rcx); - __ bind(done); + __ pop(rdx); __ pop(rax); } @@ -1664,13 +1683,13 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) { PtrQueue::byte_offset_of_buf())); __ push(rax); - __ push(rdx); + __ push(rcx); NOT_LP64(__ get_thread(thread);) ExternalAddress cardtable((address)ct->byte_map_base); assert(sizeof(*ct->byte_map_base) == sizeof(jbyte), "adjust this code"); - const Register card_addr = rdx; + const Register card_addr = rcx; #ifdef _LP64 const Register tmp = rscratch1; f.load_argument(0, card_addr); @@ -1679,7 +1698,7 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) { // get the address of the card __ addq(card_addr, tmp); #else - const Register card_index = rdx; + const Register card_index = rcx; f.load_argument(0, card_index); __ shrl(card_index, CardTableModRefBS::card_shift); @@ -1716,12 +1735,32 @@ OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) { __ jmp(done); __ bind(runtime); - NOT_LP64(__ push(rcx);) + __ push(rdx); +#ifdef _LP64 + __ push(r8); + __ push(r9); + __ push(r10); + __ push(r11); +# ifndef _WIN64 + __ push(rdi); + __ push(rsi); +# endif +#endif __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::g1_wb_post), card_addr, thread); - NOT_LP64(__ pop(rcx);) - - __ bind(done); +#ifdef _LP64 +# ifndef _WIN64 + __ pop(rsi); + __ pop(rdi); +# endif + __ pop(r11); + __ pop(r10); + __ pop(r9); + __ pop(r8); +#endif __ pop(rdx); + __ bind(done); + + __ pop(rcx); __ pop(rax); } diff --git a/src/share/vm/c1/c1_LIR.hpp b/src/share/vm/c1/c1_LIR.hpp index 1f55c259b..98ce39061 100644 --- a/src/share/vm/c1/c1_LIR.hpp +++ b/src/share/vm/c1/c1_LIR.hpp @@ -505,15 +505,22 @@ class LIR_Address: public LIR_OprPtr { , _type(type) , _disp(0) { verify(); } - LIR_Address(LIR_Opr base, int disp, BasicType type): + LIR_Address(LIR_Opr base, intx disp, BasicType type): _base(base) , _index(LIR_OprDesc::illegalOpr()) , _scale(times_1) , _type(type) , _disp(disp) { verify(); } + LIR_Address(LIR_Opr base, BasicType type): + _base(base) + , _index(LIR_OprDesc::illegalOpr()) + , _scale(times_1) + , _type(type) + , _disp(0) { verify(); } + #ifdef X86 - LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, int disp, BasicType type): + LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type): _base(base) , _index(index) , _scale(scale) diff --git a/src/share/vm/c1/c1_LIRGenerator.cpp b/src/share/vm/c1/c1_LIRGenerator.cpp index 68b4294ea..2a89c8216 100644 --- a/src/share/vm/c1/c1_LIRGenerator.cpp +++ b/src/share/vm/c1/c1_LIRGenerator.cpp @@ -1309,7 +1309,7 @@ void LIRGenerator::G1SATBCardTableModRef_pre_barrier(LIR_Opr addr_opr, bool patc __ cmp(lir_cond_notEqual, flag_val, LIR_OprFact::intConst(0)); if (!addr_opr->is_address()) { assert(addr_opr->is_register(), "must be"); - addr_opr = LIR_OprFact::address(new LIR_Address(addr_opr, 0, T_OBJECT)); + addr_opr = LIR_OprFact::address(new LIR_Address(addr_opr, T_OBJECT)); } CodeStub* slow = new G1PreBarrierStub(addr_opr, pre_val, pre_val_patch_code, info); @@ -1325,7 +1325,7 @@ void LIRGenerator::G1SATBCardTableModRef_post_barrier(LIR_OprDesc* addr, LIR_Opr new_val->as_constant_ptr()->as_jobject() == NULL) return; if (!new_val->is_register()) { - LIR_Opr new_val_reg = new_pointer_register(); + LIR_Opr new_val_reg = new_register(T_OBJECT); if (new_val->is_constant()) { __ move(new_val, new_val_reg); } else { @@ -1337,7 +1337,7 @@ void LIRGenerator::G1SATBCardTableModRef_post_barrier(LIR_OprDesc* addr, LIR_Opr if (addr->is_address()) { LIR_Address* address = addr->as_address_ptr(); - LIR_Opr ptr = new_pointer_register(); + LIR_Opr ptr = new_register(T_OBJECT); if (!address->index()->is_valid() && address->disp() == 0) { __ move(address->base(), ptr); } else { @@ -1350,7 +1350,6 @@ void LIRGenerator::G1SATBCardTableModRef_post_barrier(LIR_OprDesc* addr, LIR_Opr LIR_Opr xor_res = new_pointer_register(); LIR_Opr xor_shift_res = new_pointer_register(); - if (TwoOperandLIRForm ) { __ move(addr, xor_res); __ logical_xor(xor_res, new_val, xor_res); @@ -1368,7 +1367,7 @@ void LIRGenerator::G1SATBCardTableModRef_post_barrier(LIR_OprDesc* addr, LIR_Opr } if (!new_val->is_register()) { - LIR_Opr new_val_reg = new_pointer_register(); + LIR_Opr new_val_reg = new_register(T_OBJECT); __ leal(new_val, new_val_reg); new_val = new_val_reg; } @@ -1377,7 +1376,7 @@ void LIRGenerator::G1SATBCardTableModRef_post_barrier(LIR_OprDesc* addr, LIR_Opr __ cmp(lir_cond_notEqual, xor_shift_res, LIR_OprFact::intptrConst(NULL_WORD)); CodeStub* slow = new G1PostBarrierStub(addr, new_val); - __ branch(lir_cond_notEqual, T_INT, slow); + __ branch(lir_cond_notEqual, LP64_ONLY(T_LONG) NOT_LP64(T_INT), slow); __ branch_destination(slow->continuation()); } -- GitLab