/* * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ /* AM437x GP EVM */ /dts-v1/; #include "am4372.dtsi" #include #include #include / { model = "TI AM437x GP EVM"; compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43"; aliases { display0 = &lcd0; }; vmmcsd_fixed: fixedregulator-sd { compatible = "regulator-fixed"; regulator-name = "vmmcsd_fixed"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; enable-active-high; }; vtt_fixed: fixedregulator-vtt { compatible = "regulator-fixed"; regulator-name = "vtt_fixed"; regulator-min-microvolt = <1500000>; regulator-max-microvolt = <1500000>; regulator-always-on; regulator-boot-on; enable-active-high; gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>; }; backlight { compatible = "pwm-backlight"; pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>; brightness-levels = <0 51 53 56 62 75 101 152 255>; default-brightness-level = <8>; }; matrix_keypad: matrix_keypad@0 { compatible = "gpio-matrix-keypad"; debounce-delay-ms = <5>; col-scan-delay-us = <2>; row-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH /* Bank3, pin21 */ &gpio4 3 GPIO_ACTIVE_HIGH /* Bank4, pin3 */ &gpio4 2 GPIO_ACTIVE_HIGH>; /* Bank4, pin2 */ col-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH /* Bank3, pin19 */ &gpio3 20 GPIO_ACTIVE_HIGH>; /* Bank3, pin20 */ linux,keymap = <0x00000201 /* P1 */ 0x00010202 /* P2 */ 0x01000067 /* UP */ 0x0101006a /* RIGHT */ 0x02000069 /* LEFT */ 0x0201006c>; /* DOWN */ }; lcd0: display { compatible = "osddisplays,osd057T0559-34ts", "panel-dpi"; label = "lcd"; pinctrl-names = "default"; pinctrl-0 = <&lcd_pins>; /* * SelLCDorHDMI, LOW to select HDMI. This is not really the * panel's enable GPIO, but we don't have HDMI driver support nor * support to switch between two displays, so using this gpio as * panel's enable should be safe. */ enable-gpios = <&gpio5 8 GPIO_ACTIVE_HIGH>; panel-timing { clock-frequency = <33000000>; hactive = <800>; vactive = <480>; hfront-porch = <210>; hback-porch = <16>; hsync-len = <30>; vback-porch = <10>; vfront-porch = <22>; vsync-len = <13>; hsync-active = <0>; vsync-active = <0>; de-active = <1>; pixelclk-active = <1>; }; port { lcd_in: endpoint { remote-endpoint = <&dpi_out>; }; }; }; }; &am43xx_pinmux { i2c0_pins: i2c0_pins { pinctrl-single,pins = < 0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ >; }; i2c1_pins: i2c1_pins { pinctrl-single,pins = < 0x15c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */ 0x158 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */ >; }; mmc1_pins: pinmux_mmc1_pins { pinctrl-single,pins = < 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ >; }; ecap0_pins: backlight_pins { pinctrl-single,pins = < 0x164 MUX_MODE0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */ >; }; pixcir_ts_pins: pixcir_ts_pins { pinctrl-single,pins = < 0x264 (PIN_INPUT_PULLUP | MUX_MODE7) /* spi2_d0.gpio3_22 */ >; }; cpsw_default: cpsw_default { pinctrl-single,pins = < /* Slave 1 */ 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_txen */ 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rxctl */ 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd3 */ 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd2 */ 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd1 */ 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd0 */ 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rmii1_tclk */ 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd3 */ 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd2 */ 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd1 */ 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd0 */ >; }; cpsw_sleep: cpsw_sleep { pinctrl-single,pins = < /* Slave 1 reset value */ 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) >; }; davinci_mdio_default: davinci_mdio_default { pinctrl-single,pins = < /* MDIO */ 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ >; }; davinci_mdio_sleep: davinci_mdio_sleep { pinctrl-single,pins = < /* MDIO reset value */ 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) >; }; nand_flash_x8: nand_flash_x8 { pinctrl-single,pins = < 0x26c(PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* spi2_cs0.gpio/eMMCorNANDsel */ 0x0 (PIN_INPUT | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ 0x4 (PIN_INPUT | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ 0x8 (PIN_INPUT | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ 0xc (PIN_INPUT | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ 0x10 (PIN_INPUT | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ 0x14 (PIN_INPUT | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ 0x18 (PIN_INPUT | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ 0x1c (PIN_INPUT | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ 0x74 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpmc_wpn */ 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ >; }; dss_pins: dss_pins { pinctrl-single,pins = < 0x020 (PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */ 0x024 (PIN_OUTPUT_PULLUP | MUX_MODE1) 0x028 (PIN_OUTPUT_PULLUP | MUX_MODE1) 0x02c (PIN_OUTPUT_PULLUP | MUX_MODE1) 0x030 (PIN_OUTPUT_PULLUP | MUX_MODE1) 0x034 (PIN_OUTPUT_PULLUP | MUX_MODE1) 0x038 (PIN_OUTPUT_PULLUP | MUX_MODE1) 0x03c (PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */ 0x0a0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */ 0x0a4 (PIN_OUTPUT_PULLUP | MUX_MODE0) 0x0a8 (PIN_OUTPUT_PULLUP | MUX_MODE0) 0x0ac (PIN_OUTPUT_PULLUP | MUX_MODE0) 0x0b0 (PIN_OUTPUT_PULLUP | MUX_MODE0) 0x0b4 (PIN_OUTPUT_PULLUP | MUX_MODE0) 0x0b8 (PIN_OUTPUT_PULLUP | MUX_MODE0) 0x0bc (PIN_OUTPUT_PULLUP | MUX_MODE0) 0x0c0 (PIN_OUTPUT_PULLUP | MUX_MODE0) 0x0c4 (PIN_OUTPUT_PULLUP | MUX_MODE0) 0x0c8 (PIN_OUTPUT_PULLUP | MUX_MODE0) 0x0cc (PIN_OUTPUT_PULLUP | MUX_MODE0) 0x0d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) 0x0d4 (PIN_OUTPUT_PULLUP | MUX_MODE0) 0x0d8 (PIN_OUTPUT_PULLUP | MUX_MODE0) 0x0dc (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */ 0x0e0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */ 0x0e4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */ 0x0e8 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */ 0x0ec (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */ >; }; lcd_pins: lcd_pins { pinctrl-single,pins = < /* GPIO 5_8 to select LCD / HDMI */ 0x238 (PIN_OUTPUT_PULLUP | MUX_MODE7) >; }; }; &i2c0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; }; &i2c1 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins>; pixcir_ts@5c { compatible = "pixcir,pixcir_tangoc"; pinctrl-names = "default"; pinctrl-0 = <&pixcir_ts_pins>; reg = <0x5c>; interrupt-parent = <&gpio3>; interrupts = <22 0>; attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; x-size = <1024>; y-size = <600>; }; }; &epwmss0 { status = "okay"; }; &ecap0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&ecap0_pins>; }; &gpio0 { status = "okay"; }; &gpio3 { status = "okay"; }; &gpio4 { status = "okay"; }; &mmc1 { status = "okay"; vmmc-supply = <&vmmcsd_fixed>; bus-width = <4>; pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins>; cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; }; &usb2_phy1 { status = "okay"; }; &usb1 { dr_mode = "peripheral"; status = "okay"; }; &usb2_phy2 { status = "okay"; }; &usb2 { dr_mode = "host"; status = "okay"; }; &mac { slaves = <1>; pinctrl-names = "default", "sleep"; pinctrl-0 = <&cpsw_default>; pinctrl-1 = <&cpsw_sleep>; status = "okay"; }; &davinci_mdio { pinctrl-names = "default", "sleep"; pinctrl-0 = <&davinci_mdio_default>; pinctrl-1 = <&davinci_mdio_sleep>; status = "okay"; }; &cpsw_emac0 { phy_id = <&davinci_mdio>, <0>; phy-mode = "rgmii"; }; &elm { status = "okay"; }; &gpmc { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&nand_flash_x8>; ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */ nand@0,0 { reg = <0 0 4>; /* device IO registers */ ti,nand-ecc-opt = "bch8"; ti,elm-id = <&elm>; nand-bus-width = <8>; gpmc,device-width = <1>; gpmc,sync-clk-ps = <0>; gpmc,cs-on-ns = <0>; gpmc,cs-rd-off-ns = <40>; gpmc,cs-wr-off-ns = <40>; gpmc,adv-on-ns = <0>; gpmc,adv-rd-off-ns = <25>; gpmc,adv-wr-off-ns = <25>; gpmc,we-on-ns = <0>; gpmc,we-off-ns = <20>; gpmc,oe-on-ns = <3>; gpmc,oe-off-ns = <30>; gpmc,access-ns = <30>; gpmc,rd-cycle-ns = <40>; gpmc,wr-cycle-ns = <40>; gpmc,wait-pin = <0>; gpmc,wait-on-read; gpmc,wait-on-write; gpmc,bus-turnaround-ns = <0>; gpmc,cycle2cycle-delay-ns = <0>; gpmc,clk-activation-ns = <0>; gpmc,wait-monitoring-ns = <0>; gpmc,wr-access-ns = <40>; gpmc,wr-data-mux-bus-ns = <0>; /* MTD partition table */ /* All SPL-* partitions are sized to minimal length * which can be independently programmable. For * NAND flash this is equal to size of erase-block */ #address-cells = <1>; #size-cells = <1>; partition@0 { label = "NAND.SPL"; reg = <0x00000000 0x00040000>; }; partition@1 { label = "NAND.SPL.backup1"; reg = <0x00040000 0x00040000>; }; partition@2 { label = "NAND.SPL.backup2"; reg = <0x00080000 0x00040000>; }; partition@3 { label = "NAND.SPL.backup3"; reg = <0x000c0000 0x00040000>; }; partition@4 { label = "NAND.u-boot-spl-os"; reg = <0x00100000 0x00080000>; }; partition@5 { label = "NAND.u-boot"; reg = <0x00180000 0x00100000>; }; partition@6 { label = "NAND.u-boot-env"; reg = <0x00280000 0x00040000>; }; partition@7 { label = "NAND.u-boot-env.backup1"; reg = <0x002c0000 0x00040000>; }; partition@8 { label = "NAND.kernel"; reg = <0x00300000 0x00700000>; }; partition@9 { label = "NAND.file-system"; reg = <0x00a00000 0x1f600000>; }; }; }; &dss { status = "ok"; pinctrl-names = "default"; pinctrl-0 = <&dss_pins>; port { dpi_out: endpoint@0 { remote-endpoint = <&lcd_in>; data-lines = <24>; }; }; };