1. 20 4月, 2009 6 次提交
  2. 16 4月, 2009 6 次提交
  3. 29 7月, 2008 1 次提交
  4. 28 1月, 2008 1 次提交
  5. 12 7月, 2007 2 次提交
  6. 07 5月, 2007 1 次提交
  7. 27 9月, 2006 2 次提交
  8. 12 7月, 2005 1 次提交
  9. 28 6月, 2005 2 次提交
    • A
      [PATCH] PCI: fix up errors after dma bursting patch and CONFIG_PCI=n · bb4a61b6
      Andrew Morton 提交于
      With CONFIG_PCI=n:
      
      In file included from include/linux/pci.h:917,
                       from lib/iomap.c:6:
      include/asm/pci.h:104: warning: `enum pci_dma_burst_strategy' declared inside parameter list
      include/asm/pci.h:104: warning: its scope is only this definition or declaration, which is probably not what you want.
      include/asm/pci.h: In function `pci_dma_burst_advice':
      include/asm/pci.h:106: dereferencing pointer to incomplete type
      include/asm/pci.h:106: `PCI_DMA_BURST_INFINITY' undeclared (first use in this function)
      include/asm/pci.h:106: (Each undeclared identifier is reported only once
      include/asm/pci.h:106: for each function it appears in.)
      make[1]: *** [lib/iomap.o] Error 1
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      bb4a61b6
    • D
      [PATCH] PCI: DMA bursting advice · e24c2d96
      David S. Miller 提交于
      After seeing, at best, "guesses" as to the following kind
      of information in several drivers, I decided that we really
      need a way for platforms to specifically give advice in this
      area for what works best with their PCI controller implementation.
      
      Basically, this new interface gives DMA bursting advice on
      PCI.  There are three forms of the advice:
      
      1) Burst as much as possible, it is not necessary to end bursts
         on some particular boundary for best performance.
      
      2) Burst on some byte count multiple.  A DMA burst to some multiple of
         number of bytes may be done, but it is important to end the burst
         on an exact multiple for best performance.
      
         The best example of this I am aware of are the PPC64 PCI
         controllers, where if you end a burst mid-cacheline then
         chip has to refetch the data and the IOMMU translations
         which hurts performance a lot.
      
      3) Burst on a single byte count multiple.  Bursts shall end
         exactly on the next multiple boundary for best performance.
      
         Sparc64 and Alpha's PCI controllers operate this way.  They
         disconnect any device which tries to burst across a cacheline
         boundary.
      
         Actually, newer sparc64 PCI controllers do not have this behavior.
         That is why the "pdev" is passed into the interface, so I can
         add code later to check which PCI controller the system is using
         and give advice accordingly.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      e24c2d96
  10. 17 4月, 2005 1 次提交
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4