1. 03 7月, 2009 1 次提交
  2. 17 6月, 2009 3 次提交
    • W
      MIPS: Add hibernation support · 363c55ca
      Wu Zhangjin 提交于
      [Ralf: SMP support requires CPU hotplugging which MIPS currently doesn't
      support.  As implemented in this patch cache and tlb flushing will also be
      invoked with interrupts disabled so smp_call_function() will blow up in
      charming ways.  So limit to !SMP.]
      Reviewed-by: NPavel Machek <pavel@ucw.cz>
      Reviewed-by: NYan Hua <yanh@lemote.com>
      Reviewed-by: NArnaud Patard <apatard@mandriva.com>
      Reviewed-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
      Signed-off-by: NWu Zhangjin <wuzj@lemote.com>
      Signed-off-by: NHu Hongbing <huhb@lemote.com>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      363c55ca
    • M
      MIPS: Alchemy: Rewrite GPIO support. · 51e02b02
      Manuel Lauss 提交于
      The current in-kernel Alchemy GPIO support is far too inflexible for
      all my use cases.  To address this, the following changes are made:
      
      * create generic functions which deal with manipulating the on-chip
        GPIO1/2 blocks.  Such functions are universally useful.
      * Macros for GPIO2 shared interrupt management and block control.
      * support for both built-in CONFIG_GPIOLIB and fast, inlined GPIO macros.
      
        If CONFIG_GPIOLIB is not enabled, provide linux gpio framework
        compatibility by directly inlining the GPIO1/2 functions.  GPIO access
        is limited to on-chip ones and they can be accessed as documented in
        the datasheets (GPIO0-31 and 200-215).
      
        If CONFIG_GPIOLIB is selected, two (2) gpio_chip-s, one for GPIO1 and
        one for GPIO2, are registered.  GPIOs can still be accessed by using
        the numberspace established in the databooks.
      
        However this is not yet flexible enough for my uses:  My Alchemy
        systems have a documented "external" gpio interface (fixed, different
        numberspace) and can support a variety of baseboards, some of which
        are equipped with I2C gpio expanders.  I want to be able to provide
        the default 16 GPIOs of the CPU board numbered as 0..15 and also
        support gpio expanders, if present, starting as gpio16.
      
        To achieve this, a new Kconfig symbol for Alchemy is introduced,
        CONFIG_ALCHEMY_GPIO_INDIRECT, which boards can enable to signal
        that they don't want the Alchemy numberspace exposed to the outside
        world, but instead want to provide their own.  Boards are now respon-
        sible for providing the linux gpio interface glue code (either in a
        custom gpio.h header (in board include directory) or with gpio_chips).
      
        To make the board-specific inlined gpio functions work, the MIPS
        Makefile must be changed so that the mach-au1x00/gpio.h header is
        included _after_ the board headers, by moving the inclusion of
        the mach-au1x00/ to the end of the header list.
      
        See arch/mips/include/asm/mach-au1x00/gpio.h for more info.
      Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com>
      Acked-by: NFlorian Fainelli <florian@openwrt.org>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      51e02b02
    • I
      MIPS: Sibyte: Remove standalone kernel support · 05f94eeb
      Imre Kaloz 提交于
      CFE is the only supported and used bootloader on the SiByte boards,
      the standalone kernel support has been never used outside Broadcom.
      Remove it and make the kernel use CFE by default.
      Signed-off-by: NImre Kaloz <kaloz@openwrt.org>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      05f94eeb
  3. 21 5月, 2009 1 次提交
  4. 14 5月, 2009 2 次提交
  5. 30 3月, 2009 1 次提交
  6. 14 3月, 2009 1 次提交
  7. 11 1月, 2009 2 次提交
  8. 28 10月, 2008 4 次提交
  9. 11 10月, 2008 3 次提交
  10. 20 7月, 2008 1 次提交
  11. 16 7月, 2008 9 次提交
  12. 16 6月, 2008 2 次提交
  13. 29 4月, 2008 1 次提交
  14. 01 4月, 2008 1 次提交
  15. 12 3月, 2008 1 次提交
  16. 29 1月, 2008 5 次提交
    • R
      [MIPS] Qemu: Remove platform. · 302922e5
      Ralf Baechle 提交于
      The Qemu platform was originally implemented to have an easily supportable
      platform until Qemu reaches a state where it emulates a real world system.
      Since the latest release Qemu is capable of emulating the MIPSsim and
      Malta platforms, so this goal has been reached.  The Qemu plaform is also
      rather underfeatured so less useful than a Malta emulation.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      302922e5
    • R
      [MIPS] Altas, Malta: Switch boot file format to raw. · fa71c960
      Ralf Baechle 提交于
      A raw binary boots about twice as fast as SREC.
      
      The possibility to generate SREC binaries remains by simply using the
      vmlinux.srec target but seems only useful for the probably hypothetical
      case where one of these systems is booted over a serial interface.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      fa71c960
    • T
      [MIPS] RM: Collected changes · 231a35d3
      Thomas Bogendoerfer 提交于
      - EISA support for non PCI RMs (RM200 and RM400-xxx). The major part
        is the splitting of the EISA and onboard ISA of the RM200, which
        makes the EISA bus on the RM200 look like on other RMs.
      - 64bit kernel support
      - system type detection is now common for big and little endian
      - moved sniprom code to arch/mips/fw
      - added call_o32 function to arch/mips/fw/lib, which uses a private
        stack for calling prom functions
      - fix problem with ISA interrupts, which makes using PIT clockevent
        possible
      Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      231a35d3
    • T
      [MIPS] IP28 support · e2defae5
      Thomas Bogendoerfer 提交于
      Add support for SGI IP28 machines (Indigo 2 with R10k CPUs)
      This work is mainly based on Peter Fuersts work.
      Signed-off-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      e2defae5
    • M
      [MIPS] R4000/R4400 errata workarounds · 20d60d99
      Maciej W. Rozycki 提交于
       This is the gereric part of R4000/R4400 errata workarounds.  They include 
      compiler and assembler support as well as some source code modifications 
      to address the problems with some combinations of multiply/divide+shift 
      instructions as well as the daddi and daddiu instructions.
      
       Changes included are as follows:
      
      1. New Kconfig options to select workarounds by platforms as necessary.
      
      2. Arch top-level Makefile to pass necessary options to the compiler; also 
         incompatible configurations are detected (-mno-sym32 unsupported as 
         horribly intrusive for little gain).
      
      3. Bug detection updated and shuffled -- the multiply/divide+shift problem 
         is lethal enough that if not worked around it makes the kernel crash in 
         time_init() because of a division by zero; the daddiu erratum might 
         also trigger early potentially, though I have not observed it.  On the 
         other hand the daddi detection code requires the exception subsystem to 
         have been initialised (and is there mainly for information).
      
      4. r4k_daddiu_bug() added so that the existence of the erratum can be 
         queried by code at the run time as necessary; useful for generated code 
         like TLB fault and copy/clear page handlers.
      
      5. __udelay() updated as it uses multiplication in inline assembly.
      
       Note that -mdaddi requires modified toolchain (which has been maintained 
      by myself and available from my site for ~4years now -- versions covered 
      are GCC 2.95.4 - 4.1.2 and binutils from 2.13 onwards).  The -mfix-r4000 
      and -mfix-r4400 have been standard for a while though.
      Signed-off-by: NMaciej W. Rozycki <macro@linux-mips.org>
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      20d60d99
  17. 16 11月, 2007 1 次提交
  18. 23 10月, 2007 1 次提交