- 11 11月, 2016 1 次提交
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由 Ravikant B Sharma 提交于
Replace direct comparisons to NULL i.e. 'x == NULL' with '!x'. As per coding standard. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NRavikant B Sharma <ravikant.s2@samsung.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 09 11月, 2016 1 次提交
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由 Junwei Zhang 提交于
v2: agd: rebase and squash in all the previous optimizations and changes so everything compiles. v3: squash in Slava's 32bit build fix v4: rebase on drm-next (fence -> dma_fence), squash in Monk's ioctl update patch Signed-off-by: NJunwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: NMonk Liu <monk.liu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NSumit Semwal <sumit.semwal@linaro.org> [sumits: fix checkpatch warnings] Link: http://patchwork.freedesktop.org/patch/msgid/1478290570-30982-2-git-send-email-alexander.deucher@amd.com
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- 25 10月, 2016 1 次提交
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由 Chris Wilson 提交于
I plan to usurp the short name of struct fence for a core kernel struct, and so I need to rename the specialised fence/timeline for DMA operations to make room. A consensus was reached in https://lists.freedesktop.org/archives/dri-devel/2016-July/113083.html that making clear this fence applies to DMA operations was a good thing. Since then the patch has grown a bit as usage increases, so hopefully it remains a good thing! (v2...: rebase, rerun spatch) v3: Compile on msm, spotted a manual fixup that I broke. v4: Try again for msm, sorry Daniel coccinelle script: @@ @@ - struct fence + struct dma_fence @@ @@ - struct fence_ops + struct dma_fence_ops @@ @@ - struct fence_cb + struct dma_fence_cb @@ @@ - struct fence_array + struct dma_fence_array @@ @@ - enum fence_flag_bits + enum dma_fence_flag_bits @@ @@ ( - fence_init + dma_fence_init | - fence_release + dma_fence_release | - fence_free + dma_fence_free | - fence_get + dma_fence_get | - fence_get_rcu + dma_fence_get_rcu | - fence_put + dma_fence_put | - fence_signal + dma_fence_signal | - fence_signal_locked + dma_fence_signal_locked | - fence_default_wait + dma_fence_default_wait | - fence_add_callback + dma_fence_add_callback | - fence_remove_callback + dma_fence_remove_callback | - fence_enable_sw_signaling + dma_fence_enable_sw_signaling | - fence_is_signaled_locked + dma_fence_is_signaled_locked | - fence_is_signaled + dma_fence_is_signaled | - fence_is_later + dma_fence_is_later | - fence_later + dma_fence_later | - fence_wait_timeout + dma_fence_wait_timeout | - fence_wait_any_timeout + dma_fence_wait_any_timeout | - fence_wait + dma_fence_wait | - fence_context_alloc + dma_fence_context_alloc | - fence_array_create + dma_fence_array_create | - to_fence_array + to_dma_fence_array | - fence_is_array + dma_fence_is_array | - trace_fence_emit + trace_dma_fence_emit | - FENCE_TRACE + DMA_FENCE_TRACE | - FENCE_WARN + DMA_FENCE_WARN | - FENCE_ERR + DMA_FENCE_ERR ) ( ... ) Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Reviewed-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk> Acked-by: NSumit Semwal <sumit.semwal@linaro.org> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20161025120045.28839-1-chris@chris-wilson.co.uk
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- 09 6月, 2016 1 次提交
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由 Monk Liu 提交于
This help fix reloading driver hang issue of SDMA ring Signed-off-by: NMonk Liu <Monk.Liu@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 02 6月, 2016 1 次提交
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由 Christian König 提交于
Fence contexts are created on the fly (for example) by the GPU scheduler used in the amdgpu driver as a result of an userspace request. Because of this userspace could in theory force a wrap around of the 32bit context number if it doesn't behave well. Avoid this by increasing the context number to 64bits. This way even when userspace manages to allocate a billion contexts per second it takes more than 500 years for the context number to wrap around. v2: fix printf formats as well. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk> Acked-by: NSumit Semwal <sumit.semwal@linaro.org> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1464786612-5010-2-git-send-email-deathsimple@vodafone.de
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- 15 3月, 2016 1 次提交
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由 Christian König 提交于
The ring index will always collide as hash into the fence list, so use the context number instead. That can still cause collisions, but they are less likely than using ring indices. Signed-off-by: NChristian König <christian.koenig@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 11 2月, 2016 2 次提交
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由 Christian König 提交于
Crashing the system doesn't helps at all. Also properly return -EINVAL if size or alignment are outside valid ranges. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Nicolai Hähnle 提交于
An arbitrary amount of time can pass between spin_unlock and fence_wait_any_timeout, so we need to ensure that nobody frees the fences from under us. A stress test (rapidly starting and killing hundreds of glxgears instances) ran into a deadlock in fence_wait_any_timeout after about an hour, and this race condition appears to be a plausible cause. v2: agd: rebase on upstream Signed-off-by: NNicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Cc: stable@vger.kernel.org
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- 17 11月, 2015 1 次提交
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由 Junwei Zhang 提交于
Signed-off-by: NJunwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com>
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- 30 10月, 2015 2 次提交
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由 Christian König 提交于
Going to need that elsewhere as well. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
No need to duplicate the functionality any more. v2: fix handling if no fence is available. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
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- 21 10月, 2015 1 次提交
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由 Junwei Zhang 提交于
Signed-off-by: NJunwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com>
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- 24 9月, 2015 3 次提交
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由 Christian König 提交于
Embed the scheduler into the ring structure instead of allocating it. Use the ring name directly instead of the id. v2: rebased, whitespace cleanup Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NJunwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Chunming Zhou<david1.zhou@amd.com>
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由 Christian König 提交于
Just to be consistent with the other members. v2: rename the ring member as well. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> (v1) Reviewed-by: Chunming Zhou<david1.zhou@amd.com> -
由 Christian König 提交于
Adds an extra argument to amdgpu_bo_create, which is only used in amdgpu_prime.c. Port of radeon commit 831b6966. v2: fix up kfd. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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- 03 9月, 2015 1 次提交
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由 Christian König 提交于
That isn't used any more. v2: rebase Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NChunming Zhou <david1.zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 25 8月, 2015 4 次提交
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由 Christian König 提交于
Entity don't live as long as scheduler fences. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NChunming Zhou <david1.zhou@amd.com>
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由 Christian König 提交于
Simply not used any more. Only keep 32bit atomic for fence sequence numbering. v2: trivial rebase Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1) Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> (v1) Reviewed-by: Chunming Zhou <david1.zhou@amd.com> (v1) -
由 Chunming Zhou 提交于
Signed-off-by: NChunming Zhou <david1.zhou@amd.com> Reviewed-by: NChristian K?nig <christian.koenig@amd.com>
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由 Junwei Zhang 提交于
Rename the function and update the related code with this modified function. Add the new parameter of bool wait_all. If wait_all is true, it will return when all fences are signaled or timeout. If wait_all is false, it will return when any fence is signaled or timeout. Signed-off-by: NJunwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: NMonk Liu <monk.liu@amd.com> Reviewed-by: NJammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com>
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- 18 8月, 2015 3 次提交
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由 monk.liu 提交于
remaining timeout returned by amdgpu_fence_wait_any can be larger than max int value, thus the truncated 32 bit value in r ends up being negative while its original long value is positive. Signed-off-by: Nmonk.liu <monk.liu@amd.com> Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NJammy Zhou <jammy.zhou@amd.com>
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由 Christian König 提交于
The common kernel function does the same thing. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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由 monk.liu 提交于
origninal method will sleep/schedule at the granurarity of HZ/2 and based on seq signal method, the new implement is based on kernel fance interface, no unnecessary schedule at all v2: replace logic of original amdgpu_fence_wait_any Signed-off-by: Nmonk.liu <monk.liu@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com>
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- 04 6月, 2015 1 次提交
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由 Alex Deucher 提交于
This adds the non-asic specific core driver code. v2: remove extra kconfig option v3: implement minor fixes from Fengguang Wu v4: fix cast in amdgpu_ucode.c Acked-by: NChristian König <christian.koenig@amd.com> Acked-by: NJammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 03 10月, 2014 1 次提交
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由 Maarten Lankhorst 提交于
Adds an extra argument to radeon_bo_create, which is only used in radeon_prime.c. Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 05 8月, 2014 1 次提交
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由 Michel Dänzer 提交于
v2: fix rebase onto drm-fixes Signed-off-by: NMichel Dänzer <michel.daenzer@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 03 3月, 2014 1 次提交
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由 Christian König 提交于
Not needed any more. Signed-off-by: NChristian König <christian.koenig@amd.com>
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- 25 12月, 2013 1 次提交
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由 Christian König 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 14 7月, 2013 1 次提交
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由 Alex Deucher 提交于
There are cases where we need more than 4k alignment. No functional change with this commit. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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- 02 5月, 2013 1 次提交
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由 Christian König 提交于
This avoid moving the BO directly after allocating it. Signed-off-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 03 10月, 2012 2 次提交
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由 David Howells 提交于
Convert #include "..." to #include <path/...> in drivers/gpu/. Signed-off-by: NDavid Howells <dhowells@redhat.com> Acked-by: NDave Airlie <airlied@redhat.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: NDave Jones <davej@redhat.com>
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由 David Howells 提交于
Remove redundant DRM UAPI header #inclusions from drivers/gpu/. Remove redundant #inclusions of core DRM UAPI headers (drm.h, drm_mode.h and drm_sarea.h). They are now #included via drmP.h and drm_crtc.h via a preceding patch. Without this patch and the patch to make include the UAPI headers from the core headers, after the UAPI split, the DRM C sources cannot find these UAPI headers because the DRM code relies on specific -I flags to make #include "..." work on headers in include/drm/ - but that does not work after the UAPI split without adding more -I flags. Signed-off-by: NDavid Howells <dhowells@redhat.com> Acked-by: NDave Airlie <airlied@redhat.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NPaul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: NDave Jones <davej@redhat.com>
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- 21 9月, 2012 1 次提交
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由 Christian König 提交于
Removing the need to wait for anything. Still not ideal, since we need to free pt on va remove. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NJerome Glisse <jglisse@redhat.com>
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- 18 7月, 2012 1 次提交
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由 Christian König 提交于
Otherwise we can encounter out of memory situations under extreme load. v2: add documentation for the new function Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
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- 21 6月, 2012 1 次提交
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由 Christian König 提交于
It is completely unnecessary to create fences before they are emitted, so remove it and a bunch of checks if fences are emitted or not. Signed-off-by: NChristian König <deathsimple@vodafone.de> Reviewed-by: NJerome Glisse <jglisse@redhat.com>
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- 23 5月, 2012 1 次提交
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由 Alex Deucher 提交于
This adds prime->fd and fd->prime support to radeon. It passes the sg object to ttm and then populates the gart entries using it. Compile tested only. v2: stub kmap + use new helpers + add reimporting Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NJerome Glisse <jglisse@redhat.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 10 5月, 2012 4 次提交
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由 Christian König 提交于
A startover with a new idea for a multiple ring allocator. Should perform as well as a normal ring allocator as long as only one ring does somthing, but falls back to a more complex algorithm if more complex things start to happen. We store the last allocated bo in last, we always try to allocate after the last allocated bo. Principle is that in a linear GPU ring progression was is after last is the oldest bo we allocated and thus the first one that should no longer be in use by the GPU. If it's not the case we skip over the bo after last to the closest done bo if such one exist. If none exist and we are not asked to block we report failure to allocate. If we are asked to block we wait on all the oldest fence of all rings. We just wait for any of those fence to complete. v2: We need to be able to let hole point to the list_head, otherwise try free will never free the first allocation of the list. Also stop calling radeon_fence_signalled more than necessary. v3: Don't free allocations without considering them as a hole, otherwise we might lose holes. Also return ENOMEM instead of ENOENT when running out of fences to wait for. Limit the number of holes we try for each ring to 3. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NDave Airlie <airlied@redhat.com> -
由 Christian König 提交于
Define the interface without modifying the allocation algorithm in any way. v2: rebase on top of fence new uint64 patch v3: add ring to debugfs output Signed-off-by: NJerome Glisse <jglisse@redhat.com> Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Christian König 提交于
Allocating and freeing it seperately. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Christian König 提交于
Instead of offset + size keep start and end offset directly. Signed-off-by: NChristian König <deathsimple@vodafone.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
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