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  1. 31 8月, 2007 8 次提交
  3. 24 8月, 2007 1 次提交
  5. 23 8月, 2007 5 次提交
    • T
      libata: don't check n_sectors during revalidation if zero · b54eebd6
      由 Tejun Heo 提交于 
      If the initial configuration fails early, n_sectors is left at zero.
Checking against it during revalidation makes retried configuration
fail due to n_sectors mismatch.  Ignore zero n_sectors during
revalidation.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      b54eebd6
    • A
      pata_via: Add Arima W730-K8 and other rebadgings · 9edbdbea
      由 Alan Cox 提交于 
      More cable funnies
Signed-off-by: NAlan Cox <alan@redhat.com>
Tested-by: NMikael Pettersson <mikpe@it.uu.se>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      9edbdbea
    • A
      pata_sis: Add the FSC Amilo and friends · 4f2d47cf
      由 Alan Cox 提交于 
      More short cables
Signed-off-by: NAlan Cox <alan@redhat.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      4f2d47cf
    • M
      pata_pdc2027x: PLL detection fixes · 78c4af0b
      由 Mikael Pettersson 提交于 
      Previously I reported that the pata_pdc2027x PLL detection changes
in kernel 2.6.22 broke the driver on my PowerMac:

>pata_pdc2027x: Invalid PLL input clock 1691742kHz, give up!

This is followed by a number of errors and speed reduction
steps on the affected ports.

There are two bugs in pata_pdc2027x's PLL detection code:

1. The PLL counter's start value is read before the chip is
   put in "test mode". Outside of test mode the counter is
   halted, and on the PowerMac the counter is zero because
   the chip hasn't been initialised by its BIOS.

   The fix is to move the read of the start value to after
   test mode is started, but before the mdelay() in test mode.
   This also improves the precision of the PLL detection.

2. The code to compute the number of PLL decrements during the
   mdelay() in test mode fails to consider that the PLL counter
   only is 30 bits wide. If there is a wraparound, it will compute
   an incorrect and much too large value. On the PowerMac, the
   start count is zero, the end count is a large 30-bit value, so
   wraparound occurs and an out of bounds PLL clock is detected.

   The fix is to mask the (start - end) computation to 30 bits.

While debugging this I also noticed that pdc_read_counter()
reads the two halves of the 30-bit PLL counter as 16-bit values,
and then combines them as if the halves only are 15 bits wide.
To avoid confusion, the halves should be read as 15-bit values.

This patch implements all three changes. It fixes the PLL detection
failure on my PowerMac, and doesn't cause any regressions on an x86
with an identical card.
Signed-off-by: NMikael Pettersson <mikpe@it.uu.se>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      78c4af0b
    • T
      libata: fix n_sectors failure handling during revalidation · 8270bec4
      由 Tejun Heo 提交于 
      If revalidation fails because device has different n_sectors after
configuration the original n_sectors should be restored before failing
revalidation.  Without this fix, n_sectors difference will incorrectly
and silently pass revalidation when revalidation is retried.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Acked-by: NAlan Cox <alan@redhat.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      8270bec4
  7. 15 8月, 2007 8 次提交
  9. 06 8月, 2007 1 次提交
  11. 01 8月, 2007 7 次提交
  13. 25 7月, 2007 3 次提交
  15. 24 7月, 2007 1 次提交
  17. 21 7月, 2007 1 次提交
  19. 20 7月, 2007 5 次提交
    • T
      libata: implement EH fast drain · 5ddf24c5
      由 Tejun Heo 提交于 
      In most cases, when EH is scheduled, all in-flight commands are
aborted causing EH to kick in immediately.  However, in some cases
(especially with PMP), it's unclear which commands are affected by the
error condition and although aborting all in-flight commands work, it
isn't optimal and may cause unnecessary disruption.  On the other
hand, waiting for in-flight commands to drain themselves can take up
to 30seconds.

This patch implements EH fast drain to handle such situations.  It
gives in-flight commands some time to finish up but doesn't wait for
too long.  After EH is scheduled, fast drain timer is started and if
no other completion occurs in ATA_EH_FASTDRAIN_INTERVAL all in-flight
commands are aborted.  If any completion occurred in the interval, the
port is given another interval to finish up itself.

Currently ATA_EH_FASTDRAIN_INTERVAL is 3 secs which should be enough
for finishing up most commands.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      5ddf24c5
    • T
      libata: schedule probing after SError access failure during autopsy · 4e57c517
      由 Tejun Heo 提交于 
      If SError isn't accessible, EH can't tell whether hotplug has happened
or not.  Report SError read failure with AC_ERR_OTHER and schedule
probing with hardreset.  This will be mainly useful for PMPs.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      4e57c517
    • T
      libata: clear HOTPLUG flag after a reset · fccb6ea5
      由 Tejun Heo 提交于 
      ATA_EHI_HOTPLUGGED is a hint for reset functions indicating the the
port might have gone through hotplug/unplug just before entering EH.
Reset functions modify their behaviors a bit to handle the situation
better - e.g. using longer debouncing delay.

Currently, once HOTPLUG is set, it isn't cleared till the end of EH.
This is unnecessary and makes EH take longer.  Clear the HOTPLUGGED
flag after a reset try (successful or not).
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      fccb6ea5
    • T
      libata: improve SCSI scan failure handling · 1ae46317
      由 Tejun Heo 提交于 
      SCSI scan may fail due to memory allocation failure even if EH is not
in progress.  Due to use of GFP_ATOMIC in SCSI scan path, allocation
failure isn't too rare especially while probing multiple devices at
once which is the case when a bunch of devices are connected to PMP.

This patch moves SCSI scan failure detetion logic from
ata_scsi_hotplug() to ata_scsi_scan_host() and implement synchronous
scan behavior.  The synchronous path sleeps briefly and repeats SCSI
scan if some devices aren't attached properly.  It contains robust
retry loop to minimize the chance of device misdetection during boot
and falls back to async retry if everything fails.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      1ae46317
    • T
      libata: quickly trigger SATA SPD down after debouncing failed · f1545154
      由 Tejun Heo 提交于 
      Debouncing failure is a good indicator of basic link problem.  Use
-EPIPE to indicate debouncing failure and make ata_eh_reset() invoke
sata_down_spd_limit() if the error occurs during reset.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      f1545154