From fc8d2968d0548de3c32cea4317ecefe753ad0a11 Mon Sep 17 00:00:00 2001 From: Peng Wang Date: Tue, 25 Aug 2020 15:31:18 +0800 Subject: [PATCH] alinux: arm64: adjust tk_core memory layout to #29722367 On some specific hardware with 128 bytes LLC cacheline, tk_core may cause false sharing problem. We can align it to 128 bytes so that it won't be affected by other global variables. This change will make a bit waste on cache utilization but get good number of performance improvement. So for both 64 and 128 bytes aligned LLC cacheline, we adjust tk_core memory layout to avoid potential cacheline contention. Signed-off-by: Peng Wang Acked-by: Shanpei Chen Reviewed-by: Shile Zhang --- arch/arm64/Kconfig | 10 ++++++++++ configs/config-4.19.y-aarch64 | 1 + configs/config-4.19.y-aarch64-debug | 1 + kernel/time/timekeeping.c | 15 +++++++++++++++ 4 files changed, 27 insertions(+) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index d4bf547562cd..8f77da2fa0e9 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -865,6 +865,16 @@ config ARCH_WANT_HUGE_PMD_SHARE config ARCH_HAS_CACHE_LINE_SIZE def_bool y +config ARCH_LLC_128_WORKAROUND + bool "Workaround for 128 bytes LLC cacheline" + depends on ARM64 + default n + help + LLC cacheline size may be up to 128 bytes, and this + is useful if you want to do workaround on such + case. It can be used to align memory address to get + good cache utilization et al. + config SECCOMP bool "Enable seccomp to safely compute untrusted bytecode" ---help--- diff --git a/configs/config-4.19.y-aarch64 b/configs/config-4.19.y-aarch64 index 2874a84e4ad8..a94394a4743d 100644 --- a/configs/config-4.19.y-aarch64 +++ b/configs/config-4.19.y-aarch64 @@ -435,6 +435,7 @@ CONFIG_HW_PERF_EVENTS=y CONFIG_SYS_SUPPORTS_HUGETLBFS=y CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_LLC_128_WORKAROUND=y CONFIG_SECCOMP=y CONFIG_PARAVIRT=y CONFIG_PARAVIRT_TIME_ACCOUNTING=y diff --git a/configs/config-4.19.y-aarch64-debug b/configs/config-4.19.y-aarch64-debug index cf12cc91628a..3b4b3639dccb 100644 --- a/configs/config-4.19.y-aarch64-debug +++ b/configs/config-4.19.y-aarch64-debug @@ -436,6 +436,7 @@ CONFIG_HW_PERF_EVENTS=y CONFIG_SYS_SUPPORTS_HUGETLBFS=y CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y +CONFIG_ARCH_LLC_128_WORKAROUND=y CONFIG_SECCOMP=y CONFIG_PARAVIRT=y CONFIG_PARAVIRT_TIME_ACCOUNTING=y diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c index 81ee5b83c920..4b80c7c025f8 100644 --- a/kernel/time/timekeeping.c +++ b/kernel/time/timekeeping.c @@ -48,9 +48,24 @@ enum timekeeping_adv_mode { * cache line. */ static struct { +#ifdef CONFIG_ARCH_LLC_128_WORKAROUND + /* Start seq on the middle of 128 bytes aligned address to + * keep some members of tk_core in the same 64 bytes for + * principle of locality while pushing others to another LLC + * cacheline to avoid false sharing. + */ + u8 padding1[64]; + seqcount_t seq; + /* Push some timekeeper memebers to another LLC cacheline */ + u8 padding2[16]; + struct timekeeper timekeeper; + /* For 128 bytes LLC cacheline */ +} tk_core __aligned(128) = { +#else seqcount_t seq; struct timekeeper timekeeper; } tk_core ____cacheline_aligned = { +#endif .seq = SEQCNT_ZERO(tk_core.seq), }; -- GitLab