提交 ef4ce0bc 编写于 作者: B Bastian Hecht 提交者: David Woodhouse

mtd: sh_flctl: Fix hardware ECC behaviour

The flctl uses 10 bytes ECC data for every 512 bytes sector. This patch
makes the controller write all 40 bytes instead of 10 bytes only.
Signed-off-by: NBastian Hecht <hechtb@gmail.com>
Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
上级 aa32d1f0
...@@ -427,30 +427,20 @@ static void execmd_read_page_sector(struct mtd_info *mtd, int page_addr) ...@@ -427,30 +427,20 @@ static void execmd_read_page_sector(struct mtd_info *mtd, int page_addr)
static void execmd_read_oob(struct mtd_info *mtd, int page_addr) static void execmd_read_oob(struct mtd_info *mtd, int page_addr)
{ {
struct sh_flctl *flctl = mtd_to_flctl(mtd); struct sh_flctl *flctl = mtd_to_flctl(mtd);
int page_sectors = flctl->page_size ? 4 : 1;
int i;
set_cmd_regs(mtd, NAND_CMD_READ0, set_cmd_regs(mtd, NAND_CMD_READ0,
(NAND_CMD_READSTART << 8) | NAND_CMD_READ0); (NAND_CMD_READSTART << 8) | NAND_CMD_READ0);
empty_fifo(flctl); empty_fifo(flctl);
if (flctl->page_size) {
int i;
/* In case that the page size is 2k */
for (i = 0; i < 16 * 3; i++)
flctl->done_buff[i] = 0xFF;
set_addr(mtd, 3 * 528 + 512, page_addr); for (i = 0; i < page_sectors; i++) {
writel(16, FLDTCNTR(flctl)); set_addr(mtd, (512 + 16) * i + 512 , page_addr);
start_translation(flctl);
read_fiforeg(flctl, 16, 16 * 3);
wait_completion(flctl);
} else {
/* In case that the page size is 512b */
set_addr(mtd, 512, page_addr);
writel(16, FLDTCNTR(flctl)); writel(16, FLDTCNTR(flctl));
start_translation(flctl); start_translation(flctl);
read_fiforeg(flctl, 16, 0); read_fiforeg(flctl, 16, 16 * i);
wait_completion(flctl); wait_completion(flctl);
} }
} }
...@@ -495,18 +485,12 @@ static void execmd_write_oob(struct mtd_info *mtd) ...@@ -495,18 +485,12 @@ static void execmd_write_oob(struct mtd_info *mtd)
int page_addr = flctl->seqin_page_addr; int page_addr = flctl->seqin_page_addr;
int sector, page_sectors; int sector, page_sectors;
if (flctl->page_size) { page_sectors = flctl->page_size ? 4 : 1;
sector = 3;
page_sectors = 4;
} else {
sector = 0;
page_sectors = 1;
}
set_cmd_regs(mtd, NAND_CMD_PAGEPROG, set_cmd_regs(mtd, NAND_CMD_PAGEPROG,
(NAND_CMD_PAGEPROG << 8) | NAND_CMD_SEQIN); (NAND_CMD_PAGEPROG << 8) | NAND_CMD_SEQIN);
for (; sector < page_sectors; sector++) { for (sector = 0; sector < page_sectors; sector++) {
empty_fifo(flctl); empty_fifo(flctl);
set_addr(mtd, sector * 528 + 512, page_addr); set_addr(mtd, sector * 528 + 512, page_addr);
writel(16, FLDTCNTR(flctl)); /* set read size */ writel(16, FLDTCNTR(flctl)); /* set read size */
......
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