提交 ee3387f9 编写于 作者: I Iain Paton 提交者: Shawn Guo

ARM: imx6: clk: i.MX6 DualLite/Solo i2c4 clock

Compared to i.MX6 Quad/Dual the CCM_CCGR1 register in the i.MX6 Solo/DualLite
replaces the ecspi5 clock with the i2c4 clock.

Handle this difference using cpu_is_imx6dl().
Signed-off-by: NIain Paton <ipaton0@gmail.com>
Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
上级 4fcad492
......@@ -352,6 +352,10 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
clk[ecspi2] = imx_clk_gate2("ecspi2", "ecspi_root", base + 0x6c, 2);
clk[ecspi3] = imx_clk_gate2("ecspi3", "ecspi_root", base + 0x6c, 4);
clk[ecspi4] = imx_clk_gate2("ecspi4", "ecspi_root", base + 0x6c, 6);
if (cpu_is_imx6dl())
/* ecspi5 is replaced with i2c4 on imx6dl & imx6s */
clk[ecspi5] = imx_clk_gate2("i2c4", "ipg_per", base + 0x6c, 8);
else
clk[ecspi5] = imx_clk_gate2("ecspi5", "ecspi_root", base + 0x6c, 8);
clk[enet] = imx_clk_gate2("enet", "ipg", base + 0x6c, 10);
clk[esai] = imx_clk_gate2("esai", "esai_podf", base + 0x6c, 16);
......
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册