“17b5001b5143e3b7fce1c584bdcffd726dd8667c”上不存在“drivers/gpu/drm/imx/parallel-display.c”
提交 ee0a227b 编写于 作者: C Chris Wilson 提交者: Daniel Vetter

drm/i915: Replace WARN inside I915_READ64_2x32 with retry loop

Since we may conceivably encounter situations where the upper part of the
64bit register changes between reads, for example when a timestamp
counter overflows, change the WARN into a retry loop.
Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
上级 cbfe8fa6
...@@ -3303,14 +3303,13 @@ int intel_freq_opcode(struct drm_i915_private *dev_priv, int val); ...@@ -3303,14 +3303,13 @@ int intel_freq_opcode(struct drm_i915_private *dev_priv, int val);
#define I915_READ64(reg) dev_priv->uncore.funcs.mmio_readq(dev_priv, (reg), true) #define I915_READ64(reg) dev_priv->uncore.funcs.mmio_readq(dev_priv, (reg), true)
#define I915_READ64_2x32(lower_reg, upper_reg) ({ \ #define I915_READ64_2x32(lower_reg, upper_reg) ({ \
u32 upper = I915_READ(upper_reg); \ u32 upper, lower, tmp; \
u32 lower = I915_READ(lower_reg); \ tmp = I915_READ(upper_reg); \
u32 tmp = I915_READ(upper_reg); \ do { \
if (upper != tmp) { \
upper = tmp; \ upper = tmp; \
lower = I915_READ(lower_reg); \ lower = I915_READ(lower_reg); \
WARN_ON(I915_READ(upper_reg) != upper); \ tmp = I915_READ(upper_reg); \
} \ } while (upper != tmp); \
(u64)upper << 32 | lower; }) (u64)upper << 32 | lower; })
#define POSTING_READ(reg) (void)I915_READ_NOTRACE(reg) #define POSTING_READ(reg) (void)I915_READ_NOTRACE(reg)
......
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