From e5590717afd5fb6f494323206a1a35ea25610c2d Mon Sep 17 00:00:00 2001 From: Paul Fulghum Date: Tue, 22 Jul 2008 11:21:39 +0100 Subject: [PATCH] synclink_gt: add serial bit order control Add control of hardware serial bit order between LSB first (default/standard) and MSB first. Signed-off-by: Paul Fulghum Signed-off-by: Andrew Morton Signed-off-by: Alan Cox Signed-off-by: Linus Torvalds --- drivers/char/synclink_gt.c | 2 ++ include/linux/synclink.h | 1 + 2 files changed, 3 insertions(+) diff --git a/drivers/char/synclink_gt.c b/drivers/char/synclink_gt.c index 0e59cf54adaf..3cfc9e1f8882 100644 --- a/drivers/char/synclink_gt.c +++ b/drivers/char/synclink_gt.c @@ -4403,6 +4403,8 @@ static void msc_set_vcr(struct slgt_info *info) break; } + if (info->if_mode & MGSL_INTERFACE_MSB_FIRST) + val |= BIT4; if (info->signals & SerialSignal_DTR) val |= BIT3; if (info->signals & SerialSignal_RTS) diff --git a/include/linux/synclink.h b/include/linux/synclink.h index 45f6bc82d317..c844a229acc9 100644 --- a/include/linux/synclink.h +++ b/include/linux/synclink.h @@ -136,6 +136,7 @@ #define MGSL_INTERFACE_RTS_EN 0x10 #define MGSL_INTERFACE_LL 0x20 #define MGSL_INTERFACE_RL 0x40 +#define MGSL_INTERFACE_MSB_FIRST 0x80 typedef struct _MGSL_PARAMS { -- GitLab