clk: sunxi: codec clock support
The codec clock on sun4i, sun5i and sun7i is a simple gate with PLL2 as parent. Add a driver for such a clock. Signed-off-by: NEmilio López <emilio@elopez.com.ar> Signed-off-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: NChen-Yu Tsai <wens@csie.org>
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drivers/clk/sunxi/clk-a10-codec.c
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